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/*
* Driver for Vitesse PHYs
*
* Author : Kriston Carson
*
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* Copyright ( c ) 2005 , 2009 , 2011 Freescale Semiconductor , Inc .
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*
* This program is free software ; you can redistribute it and / or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation ; either version 2 of the License , or ( at your
* option ) any later version .
*
*/
# include <linux/kernel.h>
# include <linux/module.h>
# include <linux/mii.h>
# include <linux/ethtool.h>
# include <linux/phy.h>
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/* Vitesse Extended Page Magic Register(s) */
# define MII_VSC82X4_EXT_PAGE_16E 0x10
# define MII_VSC82X4_EXT_PAGE_17E 0x11
# define MII_VSC82X4_EXT_PAGE_18E 0x12
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/* Vitesse Extended Control Register 1 */
# define MII_VSC8244_EXT_CON1 0x17
# define MII_VSC8244_EXTCON1_INIT 0x0000
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# define MII_VSC8244_EXTCON1_TX_SKEW_MASK 0x0c00
# define MII_VSC8244_EXTCON1_RX_SKEW_MASK 0x0300
# define MII_VSC8244_EXTCON1_TX_SKEW 0x0800
# define MII_VSC8244_EXTCON1_RX_SKEW 0x0200
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/* Vitesse Interrupt Mask Register */
# define MII_VSC8244_IMASK 0x19
# define MII_VSC8244_IMASK_IEN 0x8000
# define MII_VSC8244_IMASK_SPEED 0x4000
# define MII_VSC8244_IMASK_LINK 0x2000
# define MII_VSC8244_IMASK_DUPLEX 0x1000
# define MII_VSC8244_IMASK_MASK 0xf000
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# define MII_VSC8221_IMASK_MASK 0xa000
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/* Vitesse Interrupt Status Register */
# define MII_VSC8244_ISTAT 0x1a
# define MII_VSC8244_ISTAT_STATUS 0x8000
# define MII_VSC8244_ISTAT_SPEED 0x4000
# define MII_VSC8244_ISTAT_LINK 0x2000
# define MII_VSC8244_ISTAT_DUPLEX 0x1000
/* Vitesse Auxiliary Control/Status Register */
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# define MII_VSC8244_AUX_CONSTAT 0x1c
# define MII_VSC8244_AUXCONSTAT_INIT 0x0000
# define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020
# define MII_VSC8244_AUXCONSTAT_SPEED 0x0018
# define MII_VSC8244_AUXCONSTAT_GBIT 0x0010
# define MII_VSC8244_AUXCONSTAT_100 0x0008
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# define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */
# define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004
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/* Vitesse Extended Page Access Register */
# define MII_VSC82X4_EXT_PAGE_ACCESS 0x1f
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# define PHY_ID_VSC8234 0x000fc620
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# define PHY_ID_VSC8244 0x000fc6c0
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# define PHY_ID_VSC8514 0x00070670
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# define PHY_ID_VSC8574 0x000704a0
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# define PHY_ID_VSC8601 0x00070420
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# define PHY_ID_VSC8662 0x00070660
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# define PHY_ID_VSC8221 0x000fc550
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# define PHY_ID_VSC8211 0x000fc4b0
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MODULE_DESCRIPTION ( " Vitesse PHY driver " ) ;
MODULE_AUTHOR ( " Kriston Carson " ) ;
MODULE_LICENSE ( " GPL " ) ;
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static int vsc824x_add_skew ( struct phy_device * phydev )
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{
int err ;
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int extcon ;
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extcon = phy_read ( phydev , MII_VSC8244_EXT_CON1 ) ;
if ( extcon < 0 )
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return extcon ;
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extcon & = ~ ( MII_VSC8244_EXTCON1_TX_SKEW_MASK |
MII_VSC8244_EXTCON1_RX_SKEW_MASK ) ;
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extcon | = ( MII_VSC8244_EXTCON1_TX_SKEW |
MII_VSC8244_EXTCON1_RX_SKEW ) ;
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err = phy_write ( phydev , MII_VSC8244_EXT_CON1 , extcon ) ;
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return err ;
}
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static int vsc824x_config_init ( struct phy_device * phydev )
{
int err ;
err = phy_write ( phydev , MII_VSC8244_AUX_CONSTAT ,
MII_VSC8244_AUXCONSTAT_INIT ) ;
if ( err < 0 )
return err ;
if ( phydev - > interface = = PHY_INTERFACE_MODE_RGMII_ID )
err = vsc824x_add_skew ( phydev ) ;
return err ;
}
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static int vsc824x_ack_interrupt ( struct phy_device * phydev )
{
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int err = 0 ;
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/* Don't bother to ACK the interrupts if interrupts
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* are disabled . The 824 x cannot clear the interrupts
* if they are disabled .
*/
if ( phydev - > interrupts = = PHY_INTERRUPT_ENABLED )
err = phy_read ( phydev , MII_VSC8244_ISTAT ) ;
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return ( err < 0 ) ? err : 0 ;
}
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static int vsc82xx_config_intr ( struct phy_device * phydev )
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{
int err ;
if ( phydev - > interrupts = = PHY_INTERRUPT_ENABLED )
err = phy_write ( phydev , MII_VSC8244_IMASK ,
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( phydev - > drv - > phy_id = = PHY_ID_VSC8234 | |
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phydev - > drv - > phy_id = = PHY_ID_VSC8244 | |
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phydev - > drv - > phy_id = = PHY_ID_VSC8514 | |
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phydev - > drv - > phy_id = = PHY_ID_VSC8574 | |
phydev - > drv - > phy_id = = PHY_ID_VSC8601 ) ?
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MII_VSC8244_IMASK_MASK :
MII_VSC8221_IMASK_MASK ) ;
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else {
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/* The Vitesse PHY cannot clear the interrupt
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* once it has disabled them , so we clear them first
*/
err = phy_read ( phydev , MII_VSC8244_ISTAT ) ;
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if ( err < 0 )
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return err ;
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err = phy_write ( phydev , MII_VSC8244_IMASK , 0 ) ;
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}
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return err ;
}
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static int vsc8221_config_init ( struct phy_device * phydev )
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{
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int err ;
err = phy_write ( phydev , MII_VSC8244_AUX_CONSTAT ,
MII_VSC8221_AUXCONSTAT_INIT ) ;
return err ;
/* Perhaps we should set EXT_CON1 based on the interface?
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* Options are 802.3 Z SerDes or SGMII
*/
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}
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/* vsc82x4_config_autocross_enable - Enable auto MDI/MDI-X for forced links
* @ phydev : target phy_device struct
*
* Enable auto MDI / MDI - X when in 10 / 100 forced link speeds by writing
* special values in the VSC8234 / VSC8244 extended reserved registers
*/
static int vsc82x4_config_autocross_enable ( struct phy_device * phydev )
{
int ret ;
if ( phydev - > autoneg = = AUTONEG_ENABLE | | phydev - > speed > SPEED_100 )
return 0 ;
/* map extended registers set 0x10 - 0x1e */
ret = phy_write ( phydev , MII_VSC82X4_EXT_PAGE_ACCESS , 0x52b5 ) ;
if ( ret > = 0 )
ret = phy_write ( phydev , MII_VSC82X4_EXT_PAGE_18E , 0x0012 ) ;
if ( ret > = 0 )
ret = phy_write ( phydev , MII_VSC82X4_EXT_PAGE_17E , 0x2803 ) ;
if ( ret > = 0 )
ret = phy_write ( phydev , MII_VSC82X4_EXT_PAGE_16E , 0x87fa ) ;
/* map standard registers set 0x10 - 0x1e */
if ( ret > = 0 )
ret = phy_write ( phydev , MII_VSC82X4_EXT_PAGE_ACCESS , 0x0000 ) ;
else
phy_write ( phydev , MII_VSC82X4_EXT_PAGE_ACCESS , 0x0000 ) ;
return ret ;
}
/* vsc82x4_config_aneg - restart auto-negotiation or write BMCR
* @ phydev : target phy_device struct
*
* Description : If auto - negotiation is enabled , we configure the
* advertising , and then restart auto - negotiation . If it is not
* enabled , then we write the BMCR and also start the auto
* MDI / MDI - X feature
*/
static int vsc82x4_config_aneg ( struct phy_device * phydev )
{
int ret ;
/* Enable auto MDI/MDI-X when in 10/100 forced link speeds by
* writing special values in the VSC8234 extended reserved registers
*/
if ( phydev - > autoneg ! = AUTONEG_ENABLE & & phydev - > speed < = SPEED_100 ) {
ret = genphy_setup_forced ( phydev ) ;
if ( ret < 0 ) /* error */
return ret ;
return vsc82x4_config_autocross_enable ( phydev ) ;
}
return genphy_config_aneg ( phydev ) ;
}
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/* Vitesse 82xx */
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static struct phy_driver vsc82xx_driver [ ] = {
{
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. phy_id = PHY_ID_VSC8234 ,
. name = " Vitesse VSC8234 " ,
. phy_id_mask = 0x000ffff0 ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc824x_config_init ,
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. config_aneg = & vsc82x4_config_aneg ,
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. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
} , {
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. phy_id = PHY_ID_VSC8244 ,
. name = " Vitesse VSC8244 " ,
. phy_id_mask = 0x000fffc0 ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc824x_config_init ,
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. config_aneg = & vsc82x4_config_aneg ,
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. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} , {
. phy_id = PHY_ID_VSC8514 ,
. name = " Vitesse VSC8514 " ,
. phy_id_mask = 0x000ffff0 ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc824x_config_init ,
. config_aneg = & vsc82x4_config_aneg ,
. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} , {
. phy_id = PHY_ID_VSC8574 ,
. name = " Vitesse VSC8574 " ,
. phy_id_mask = 0x000ffff0 ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc824x_config_init ,
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. config_aneg = & vsc82x4_config_aneg ,
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. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} , {
. phy_id = PHY_ID_VSC8601 ,
. name = " Vitesse VSC8601 " ,
. phy_id_mask = 0x000ffff0 ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & genphy_config_init ,
. config_aneg = & genphy_config_aneg ,
. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} , {
. phy_id = PHY_ID_VSC8662 ,
. name = " Vitesse VSC8662 " ,
. phy_id_mask = 0x000ffff0 ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc824x_config_init ,
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. config_aneg = & vsc82x4_config_aneg ,
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. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} , {
/* Vitesse 8221 */
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. phy_id = PHY_ID_VSC8221 ,
. phy_id_mask = 0x000ffff0 ,
. name = " Vitesse VSC8221 " ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc8221_config_init ,
. config_aneg = & genphy_config_aneg ,
. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} , {
/* Vitesse 8211 */
. phy_id = PHY_ID_VSC8211 ,
. phy_id_mask = 0x000ffff0 ,
. name = " Vitesse VSC8211 " ,
. features = PHY_GBIT_FEATURES ,
. flags = PHY_HAS_INTERRUPT ,
. config_init = & vsc8221_config_init ,
. config_aneg = & genphy_config_aneg ,
. read_status = & genphy_read_status ,
. ack_interrupt = & vsc824x_ack_interrupt ,
. config_intr = & vsc82xx_config_intr ,
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} } ;
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module_phy_driver ( vsc82xx_driver ) ;
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static struct mdio_device_id __maybe_unused vitesse_tbl [ ] = {
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{ PHY_ID_VSC8234 , 0x000ffff0 } ,
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{ PHY_ID_VSC8244 , 0x000fffc0 } ,
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{ PHY_ID_VSC8514 , 0x000ffff0 } ,
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{ PHY_ID_VSC8574 , 0x000ffff0 } ,
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{ PHY_ID_VSC8662 , 0x000ffff0 } ,
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{ PHY_ID_VSC8221 , 0x000ffff0 } ,
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{ PHY_ID_VSC8211 , 0x000ffff0 } ,
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{ }
} ;
MODULE_DEVICE_TABLE ( mdio , vitesse_tbl ) ;