2008-06-26 13:21:34 +04:00
/*
* Generic helpers for smp ipi calls
*
* ( C ) Jens Axboe < jens . axboe @ oracle . com > 2008
*/
# include <linux/rcupdate.h>
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# include <linux/rculist.h>
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# include <linux/kernel.h>
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# include <linux/module.h>
# include <linux/percpu.h>
# include <linux/init.h>
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# include <linux/smp.h>
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# include <linux/cpu.h>
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static DEFINE_PER_CPU ( struct call_single_queue , call_single_queue ) ;
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static struct {
struct list_head queue ;
spinlock_t lock ;
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} call_function __cacheline_aligned_in_smp =
{
. queue = LIST_HEAD_INIT ( call_function . queue ) ,
. lock = __SPIN_LOCK_UNLOCKED ( call_function . lock ) ,
} ;
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enum {
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CSD_FLAG_LOCK = 0x01 ,
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} ;
struct call_function_data {
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struct call_single_data csd ;
spinlock_t lock ;
unsigned int refs ;
cpumask_var_t cpumask ;
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} ;
struct call_single_queue {
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struct list_head list ;
spinlock_t lock ;
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} ;
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static DEFINE_PER_CPU ( struct call_function_data , cfd_data ) = {
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. lock = __SPIN_LOCK_UNLOCKED ( cfd_data . lock ) ,
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} ;
static int
hotplug_cfd ( struct notifier_block * nfb , unsigned long action , void * hcpu )
{
long cpu = ( long ) hcpu ;
struct call_function_data * cfd = & per_cpu ( cfd_data , cpu ) ;
switch ( action ) {
case CPU_UP_PREPARE :
case CPU_UP_PREPARE_FROZEN :
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if ( ! zalloc_cpumask_var_node ( & cfd - > cpumask , GFP_KERNEL ,
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cpu_to_node ( cpu ) ) )
return NOTIFY_BAD ;
break ;
# ifdef CONFIG_CPU_HOTPLUG
case CPU_UP_CANCELED :
case CPU_UP_CANCELED_FROZEN :
case CPU_DEAD :
case CPU_DEAD_FROZEN :
free_cpumask_var ( cfd - > cpumask ) ;
break ;
# endif
} ;
return NOTIFY_OK ;
}
static struct notifier_block __cpuinitdata hotplug_cfd_notifier = {
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. notifier_call = hotplug_cfd ,
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} ;
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static int __cpuinit init_call_single_data ( void )
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{
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void * cpu = ( void * ) ( long ) smp_processor_id ( ) ;
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int i ;
for_each_possible_cpu ( i ) {
struct call_single_queue * q = & per_cpu ( call_single_queue , i ) ;
spin_lock_init ( & q - > lock ) ;
INIT_LIST_HEAD ( & q - > list ) ;
}
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hotplug_cfd ( & hotplug_cfd_notifier , CPU_UP_PREPARE , cpu ) ;
register_cpu_notifier ( & hotplug_cfd_notifier ) ;
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return 0 ;
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}
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early_initcall ( init_call_single_data ) ;
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/*
* csd_lock / csd_unlock used to serialize access to per - cpu csd resources
*
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* For non - synchronous ipi calls the csd can still be in use by the
* previous function call . For multi - cpu calls its even more interesting
* as we ' ll have to ensure no other cpu is observing our csd .
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*/
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static void csd_lock_wait ( struct call_single_data * data )
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{
while ( data - > flags & CSD_FLAG_LOCK )
cpu_relax ( ) ;
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}
static void csd_lock ( struct call_single_data * data )
{
csd_lock_wait ( data ) ;
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data - > flags = CSD_FLAG_LOCK ;
/*
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* prevent CPU from reordering the above assignment
* to - > flags with any subsequent assignments to other
* fields of the specified call_single_data structure :
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*/
smp_mb ( ) ;
}
static void csd_unlock ( struct call_single_data * data )
{
WARN_ON ( ! ( data - > flags & CSD_FLAG_LOCK ) ) ;
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/*
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* ensure we ' re all done before releasing data :
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*/
smp_mb ( ) ;
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data - > flags & = ~ CSD_FLAG_LOCK ;
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}
/*
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* Insert a previously allocated call_single_data element
* for execution on the given CPU . data must already have
* - > func , - > info , and - > flags set .
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*/
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static
void generic_exec_single ( int cpu , struct call_single_data * data , int wait )
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{
struct call_single_queue * dst = & per_cpu ( call_single_queue , cpu ) ;
unsigned long flags ;
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int ipi ;
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spin_lock_irqsave ( & dst - > lock , flags ) ;
ipi = list_empty ( & dst - > list ) ;
list_add_tail ( & data - > list , & dst - > list ) ;
spin_unlock_irqrestore ( & dst - > lock , flags ) ;
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/*
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 08:22:45 +03:00
* The list addition should be visible before sending the IPI
* handler locks the list to pull the entry off it because of
* normal cache coherency rules implied by spinlocks .
*
* If IPIs can go out of order to the cache coherency protocol
* in an architecture , sufficient synchronisation should be added
* to arch code to make it appear to obey cache coherency WRT
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* locking and barrier primitives . Generic code isn ' t really
* equipped to do the right thing . . .
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*/
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if ( ipi )
arch_send_call_function_single_ipi ( cpu ) ;
if ( wait )
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csd_lock_wait ( data ) ;
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}
/*
* Invoked by arch to handle an IPI for call function . Must be called with
* interrupts disabled .
*/
void generic_smp_call_function_interrupt ( void )
{
struct call_function_data * data ;
int cpu = get_cpu ( ) ;
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 08:22:45 +03:00
/*
* Ensure entry is visible on call_function_queue after we have
* entered the IPI . See comment in smp_call_function_many .
* If we don ' t have this , then we may miss an entry on the list
* and never get another IPI to process it .
*/
smp_mb ( ) ;
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/*
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* It ' s ok to use list_for_each_rcu ( ) here even though we may
* delete ' pos ' , since list_del_rcu ( ) doesn ' t clear - > next
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*/
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list_for_each_entry_rcu ( data , & call_function . queue , csd . list ) {
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int refs ;
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spin_lock ( & data - > lock ) ;
if ( ! cpumask_test_cpu ( cpu , data - > cpumask ) ) {
spin_unlock ( & data - > lock ) ;
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continue ;
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}
cpumask_clear_cpu ( cpu , data - > cpumask ) ;
spin_unlock ( & data - > lock ) ;
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data - > csd . func ( data - > csd . info ) ;
spin_lock ( & data - > lock ) ;
WARN_ON ( data - > refs = = 0 ) ;
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refs = - - data - > refs ;
if ( ! refs ) {
spin_lock ( & call_function . lock ) ;
list_del_rcu ( & data - > csd . list ) ;
spin_unlock ( & call_function . lock ) ;
}
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spin_unlock ( & data - > lock ) ;
if ( refs )
continue ;
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csd_unlock ( & data - > csd ) ;
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}
put_cpu ( ) ;
}
/*
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* Invoked by arch to handle an IPI for call function single . Must be
* called from the arch with interrupts disabled .
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*/
void generic_smp_call_function_single_interrupt ( void )
{
struct call_single_queue * q = & __get_cpu_var ( call_single_queue ) ;
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 08:22:45 +03:00
unsigned int data_flags ;
2009-02-25 18:52:11 +03:00
LIST_HEAD ( list ) ;
2008-06-26 13:21:34 +04:00
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 08:22:45 +03:00
spin_lock ( & q - > lock ) ;
list_replace_init ( & q - > list , & list ) ;
spin_unlock ( & q - > lock ) ;
2008-06-26 13:21:34 +04:00
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 08:22:45 +03:00
while ( ! list_empty ( & list ) ) {
struct call_single_data * data ;
2008-06-26 13:21:34 +04:00
2009-02-25 18:52:11 +03:00
data = list_entry ( list . next , struct call_single_data , list ) ;
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 08:22:45 +03:00
list_del ( & data - > list ) ;
2008-06-26 13:21:34 +04:00
/*
2009-02-25 18:52:11 +03:00
* ' data ' can be invalid after this call if flags = = 0
* ( when called through generic_exec_single ( ) ) ,
* so save them away before making the call :
2008-06-26 13:21:34 +04:00
*/
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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data_flags = data - > flags ;
data - > func ( data - > info ) ;
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/*
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* Unlocked CSDs are valid through generic_exec_single ( ) :
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*/
if ( data_flags & CSD_FLAG_LOCK )
csd_unlock ( data ) ;
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}
}
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static DEFINE_PER_CPU ( struct call_single_data , csd_data ) ;
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/*
* smp_call_function_single - Run a function on a specific CPU
* @ func : The function to run . This must be fast and non - blocking .
* @ info : An arbitrary pointer to pass to the function .
* @ wait : If true , wait until function has completed on other CPUs .
*
* Returns 0 on success , else a negative status code . Note that @ wait
* will be implicitly turned on in case of allocation failures , since
* we fall back to on - stack allocation .
*/
int smp_call_function_single ( int cpu , void ( * func ) ( void * info ) , void * info ,
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int wait )
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{
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struct call_single_data d = {
. flags = 0 ,
} ;
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unsigned long flags ;
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int this_cpu ;
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int err = 0 ;
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/*
* prevent preemption and reschedule on another processor ,
* as well as CPU removal
*/
this_cpu = get_cpu ( ) ;
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/* Can deadlock when called with interrupts disabled */
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WARN_ON_ONCE ( irqs_disabled ( ) & & ! oops_in_progress ) ;
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if ( cpu = = this_cpu ) {
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local_irq_save ( flags ) ;
func ( info ) ;
local_irq_restore ( flags ) ;
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} else {
if ( ( unsigned ) cpu < nr_cpu_ids & & cpu_online ( cpu ) ) {
struct call_single_data * data = & d ;
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if ( ! wait )
data = & __get_cpu_var ( csd_data ) ;
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csd_lock ( data ) ;
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data - > func = func ;
data - > info = info ;
generic_exec_single ( cpu , data , wait ) ;
} else {
err = - ENXIO ; /* CPU not online */
}
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}
put_cpu ( ) ;
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return err ;
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}
EXPORT_SYMBOL ( smp_call_function_single ) ;
/**
* __smp_call_function_single ( ) : Run a function on another CPU
* @ cpu : The CPU to run on .
* @ data : Pre - allocated and setup data structure
*
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* Like smp_call_function_single ( ) , but allow caller to pass in a
* pre - allocated data structure . Useful for embedding @ data inside
* other structures , for instance .
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*/
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void __smp_call_function_single ( int cpu , struct call_single_data * data ,
int wait )
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{
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csd_lock ( data ) ;
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/* Can deadlock when called with interrupts disabled */
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WARN_ON_ONCE ( wait & & irqs_disabled ( ) & & ! oops_in_progress ) ;
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generic_exec_single ( cpu , data , wait ) ;
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}
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/* Deprecated: shim for archs using old arch_send_call_function_ipi API. */
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# ifndef arch_send_call_function_ipi_mask
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# define arch_send_call_function_ipi_mask(maskp) \
arch_send_call_function_ipi ( * ( maskp ) )
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# endif
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/**
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* smp_call_function_many ( ) : Run a function on a set of other CPUs .
* @ mask : The set of cpus to run on ( only runs on online subset ) .
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* @ func : The function to run . This must be fast and non - blocking .
* @ info : An arbitrary pointer to pass to the function .
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* @ wait : If true , wait ( atomically ) until function has completed
* on other CPUs .
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*
* If @ wait is true , then returns once @ func has returned . Note that @ wait
* will be implicitly turned on in case of allocation failures , since
* we fall back to on - stack allocation .
*
* You must not call this function with disabled interrupts or from a
* hardware interrupt handler or from a bottom half handler . Preemption
* must be disabled when calling this function .
*/
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void smp_call_function_many ( const struct cpumask * mask ,
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void ( * func ) ( void * ) , void * info , bool wait )
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{
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struct call_function_data * data ;
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unsigned long flags ;
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int cpu , next_cpu , this_cpu = smp_processor_id ( ) ;
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/* Can deadlock when called with interrupts disabled */
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WARN_ON_ONCE ( irqs_disabled ( ) & & ! oops_in_progress ) ;
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/* So, what's a CPU they want? Ignoring this one. */
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cpu = cpumask_first_and ( mask , cpu_online_mask ) ;
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if ( cpu = = this_cpu )
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cpu = cpumask_next_and ( cpu , mask , cpu_online_mask ) ;
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/* No online cpus? We're done. */
if ( cpu > = nr_cpu_ids )
return ;
/* Do we have another CPU which isn't us? */
next_cpu = cpumask_next_and ( cpu , mask , cpu_online_mask ) ;
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if ( next_cpu = = this_cpu )
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next_cpu = cpumask_next_and ( next_cpu , mask , cpu_online_mask ) ;
/* Fastpath: do that cpu by itself. */
if ( next_cpu > = nr_cpu_ids ) {
smp_call_function_single ( cpu , func , info , wait ) ;
return ;
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}
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data = & __get_cpu_var ( cfd_data ) ;
csd_lock ( & data - > csd ) ;
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spin_lock_irqsave ( & data - > lock , flags ) ;
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data - > csd . func = func ;
data - > csd . info = info ;
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cpumask_and ( data - > cpumask , mask , cpu_online_mask ) ;
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cpumask_clear_cpu ( this_cpu , data - > cpumask ) ;
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data - > refs = cpumask_weight ( data - > cpumask ) ;
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spin_lock ( & call_function . lock ) ;
/*
* Place entry at the _HEAD_ of the list , so that any cpu still
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* observing the entry in generic_smp_call_function_interrupt ( )
* will not miss any other list entries :
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*/
list_add_rcu ( & data - > csd . list , & call_function . queue ) ;
spin_unlock ( & call_function . lock ) ;
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spin_unlock_irqrestore ( & data - > lock , flags ) ;
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/*
* Make the list addition visible before sending the ipi .
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* ( IPIs must obey or appear to obey normal Linux cache
* coherency rules - - see comment in generic_exec_single ) .
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*/
smp_mb ( ) ;
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/* Send a message to all CPUs in the map */
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arch_send_call_function_ipi_mask ( data - > cpumask ) ;
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/* Optionally wait for the CPUs to complete */
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if ( wait )
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csd_lock_wait ( & data - > csd ) ;
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}
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EXPORT_SYMBOL ( smp_call_function_many ) ;
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/**
* smp_call_function ( ) : Run a function on all other CPUs .
* @ func : The function to run . This must be fast and non - blocking .
* @ info : An arbitrary pointer to pass to the function .
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* @ wait : If true , wait ( atomically ) until function has completed
* on other CPUs .
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*
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* Returns 0.
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*
* If @ wait is true , then returns once @ func has returned ; otherwise
* it returns just before the target cpu calls @ func . In case of allocation
* failure , @ wait will be implicitly turned on .
*
* You must not call this function with disabled interrupts or from a
* hardware interrupt handler or from a bottom half handler .
*/
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int smp_call_function ( void ( * func ) ( void * ) , void * info , int wait )
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{
preempt_disable ( ) ;
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smp_call_function_many ( cpu_online_mask , func , info , wait ) ;
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preempt_enable ( ) ;
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return 0 ;
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}
EXPORT_SYMBOL ( smp_call_function ) ;
void ipi_call_lock ( void )
{
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spin_lock ( & call_function . lock ) ;
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}
void ipi_call_unlock ( void )
{
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spin_unlock ( & call_function . lock ) ;
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}
void ipi_call_lock_irq ( void )
{
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spin_lock_irq ( & call_function . lock ) ;
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}
void ipi_call_unlock_irq ( void )
{
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spin_unlock_irq ( & call_function . lock ) ;
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}