2006-01-31 18:29:18 -08:00
/ * tsb. S : S p a r c64 T S B t a b l e h a n d l i n g .
*
* Copyright ( C ) 2 0 0 6 D a v i d S . M i l l e r < d a v e m @davemloft.net>
* /
2006-03-22 00:49:59 -08:00
2006-01-31 18:29:18 -08:00
# include < a s m / t s b . h >
2006-02-09 17:21:53 -08:00
# include < a s m / h y p e r v i s o r . h >
2006-03-22 00:49:59 -08:00
# include < a s m / p a g e . h >
# include < a s m / c p u d a t a . h >
# include < a s m / m m u . h >
2006-01-31 18:29:18 -08:00
.text
.align 32
/ * Invoked f r o m T L B m i s s h a n d l e r , w e a r e i n t h e
* MMU g l o b a l r e g i s t e r s a n d t h e y a r e s e t u p l i k e
* this :
*
* % g1 : TSB e n t r y p o i n t e r
* % g2 : available t e m p o r a r y
* % g3 : FAULT_ C O D E _ { D ,I } T L B
* % g4 : available t e m p o r a r y
* % g5 : available t e m p o r a r y
* % g6 : TAG T A R G E T
2006-02-06 23:44:37 -08:00
* % g7 : available t e m p o r a r y , w i l l b e l o a d e d b y u s w i t h
* the p h y s i c a l a d d r e s s b a s e o f t h e l i n u x p a g e
2006-01-31 18:29:18 -08:00
* tables f o r t h e c u r r e n t a d d r e s s s p a c e
* /
tsb_miss_dtlb :
mov T L B _ T A G _ A C C E S S , % g 4
2016-07-27 17:50:26 -07:00
ldxa [ % g 4 ] A S I _ D M M U , % g 4
srlx % g 4 , P A G E _ S H I F T , % g 4
2006-01-31 18:29:18 -08:00
ba,p t % x c c , t s b _ m i s s _ p a g e _ t a b l e _ w a l k
2016-07-27 17:50:26 -07:00
sllx % g 4 , P A G E _ S H I F T , % g 4
2006-01-31 18:29:18 -08:00
tsb_miss_itlb :
mov T L B _ T A G _ A C C E S S , % g 4
2016-07-27 17:50:26 -07:00
ldxa [ % g 4 ] A S I _ I M M U , % g 4
srlx % g 4 , P A G E _ S H I F T , % g 4
2006-01-31 18:29:18 -08:00
ba,p t % x c c , t s b _ m i s s _ p a g e _ t a b l e _ w a l k
2016-07-27 17:50:26 -07:00
sllx % g 4 , P A G E _ S H I F T , % g 4
2006-01-31 18:29:18 -08:00
2006-02-11 00:29:34 -08:00
/ * At t h i s p o i n t w e h a v e :
2006-03-22 00:49:59 -08:00
* % g1 - - P A G E _ S I Z E T S B e n t r y a d d r e s s
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
* % g3 - - F A U L T _ C O D E _ { D ,I } T L B
* % g4 - - m i s s i n g v i r t u a l a d d r e s s
2006-02-17 18:01:02 -08:00
* % g6 - - T A G T A R G E T ( v a d d r > > 2 2 )
2006-02-06 23:44:37 -08:00
* /
2006-01-31 18:29:18 -08:00
tsb_miss_page_table_walk :
2006-03-22 00:49:59 -08:00
TRAP_ L O A D _ T R A P _ B L O C K ( % g 7 , % g 5 )
2006-02-26 23:24:22 -08:00
2006-03-22 00:49:59 -08:00
/ * Before c o m m i t t i n g t o a f u l l p a g e t a b l e w a l k ,
* check t h e h u g e p a g e T S B .
* /
2012-10-08 16:34:29 -07:00
# if d e f i n e d ( C O N F I G _ H U G E T L B _ P A G E ) | | d e f i n e d ( C O N F I G _ T R A N S P A R E N T _ H U G E P A G E )
2006-03-22 00:49:59 -08:00
661 : ldx [ % g 7 + T R A P _ P E R _ C P U _ T S B _ H U G E ] , % g 5
nop
.section .sun4v_2insn_patch , " ax"
.word 661b
mov S C R A T C H P A D _ U T S B R E G 2 , % g 5
ldxa [ % g 5 ] A S I _ S C R A T C H P A D , % g 5
.previous
cmp % g 5 , - 1
be,p t % x c c , 8 0 f
nop
/ * We n e e d a n a l i g n e d p a i r o f r e g i s t e r s c o n t a i n i n g 2 v a l u e s
* which c a n b e e a s i l y r e m a t e r i a l i z e d . % g 6 a n d % g 7 f o o t t h e
* bill j u s t n i c e l y . W e ' l l s a v e % g 6 a w a y i n t o % g 2 f o r t h e
* huge p a g e T S B T A G c o m p a r i s o n .
*
* Perform a h u g e p a g e T S B l o o k u p .
* /
mov % g 6 , % g 2
and % g 5 , 0 x7 , % g 6
mov 5 1 2 , % g 7
andn % g 5 , 0 x7 , % g 5
sllx % g 7 , % g 6 , % g 7
sparc64: Move from 4MB to 8MB huge pages.
The impetus for this is that we would like to move to 64-bit PMDs and
PGDs, but that would result in only supporting a 42-bit address space
with the current page table layout. It'd be nice to support at least
43-bits.
The reason we'd end up with only 42-bits after making PMDs and PGDs
64-bit is that we only use half-page sized PTE tables in order to make
PMDs line up to 4MB, the hardware huge page size we use.
So what we do here is we make huge pages 8MB, and fabricate them using
4MB hw TLB entries.
Facilitate this by providing a "REAL_HPAGE_SHIFT" which is used in
places that really need to operate on hardware 4MB pages.
Use full pages (512 entries) for PTE tables, and adjust PMD_SHIFT,
PGD_SHIFT, and the build time CPP test as needed. Use a CPP test to
make sure REAL_HPAGE_SHIFT and the _PAGE_SZHUGE_* we use match up.
This makes the pgtable cache completely unused, so remove the code
managing it and the state used in mm_context_t. Now we have less
spinlocks taken in the page table allocation path.
The technique we use to fabricate the 8MB pages is to transfer bit 22
from the missing virtual address into the PTEs physical address field.
That takes care of the transparent huge pages case.
For hugetlb, we fill things in at the PTE level and that code already
puts the sub huge page physical bits into the PTEs, based upon the
offset, so there is nothing special we need to do. It all just works
out.
So, a small amount of complexity in the THP case, but this code is
about to get much simpler when we move the 64-bit PMDs as we can move
away from the fancy 32-bit huge PMD encoding and just put a real PTE
value in there.
With bug fixes and help from Bob Picco.
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-09-25 13:48:49 -07:00
srlx % g 4 , R E A L _ H P A G E _ S H I F T , % g 6
2006-03-22 00:49:59 -08:00
sub % g 7 , 1 , % g 7
and % g 6 , % g 7 , % g 6
sllx % g 6 , 4 , % g 6
add % g 5 , % g 6 , % g 5
TSB_ L O A D _ Q U A D ( % g 5 , % g 6 )
cmp % g 6 , % g 2
be,a ,p t % x c c , t s b _ t l b _ r e l o a d
mov % g 7 , % g 5
/ * No m a t c h , r e m e m b e r t h e h u g e p a g e T S B e n t r y a d d r e s s ,
* and r e s t o r e % g 6 a n d % g 7 .
* /
TRAP_ L O A D _ T R A P _ B L O C K ( % g 7 , % g 6 )
srlx % g 4 , 2 2 , % g 6
80 : stx % g 5 , [ % g 7 + T R A P _ P E R _ C P U _ T S B _ H U G E _ T E M P ]
# endif
ldx [ % g 7 + T R A P _ P E R _ C P U _ P G D _ P A D D R ] , % g 7
2006-01-31 18:29:18 -08:00
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
/ * At t h i s p o i n t w e h a v e :
* % g1 - - T S B e n t r y a d d r e s s
* % g3 - - F A U L T _ C O D E _ { D ,I } T L B
2006-03-22 00:49:59 -08:00
* % g4 - - m i s s i n g v i r t u a l a d d r e s s
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
* % g6 - - T A G T A R G E T ( v a d d r > > 2 2 )
2006-03-22 00:49:59 -08:00
* % g7 - - p a g e t a b l e p h y s i c a l a d d r e s s
*
* We k n o w t h a t b o t h t h e b a s e P A G E _ S I Z E T S B a n d t h e H P A G E _ S I Z E
* TSB b o t h l a c k a m a t c h i n g e n t r y .
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
* /
2006-03-22 00:49:59 -08:00
tsb_miss_page_table_walk_sun4v_fastpath :
USER_ P G T A B L E _ W A L K _ T L 1 ( % g 4 , % g 7 , % g 5 , % g 2 , t s b _ d o _ f a u l t )
2006-01-31 18:29:18 -08:00
2012-10-08 16:34:29 -07:00
/* Valid PTE is now in %g5. */
2006-03-22 00:49:59 -08:00
2012-10-08 16:34:29 -07:00
# if d e f i n e d ( C O N F I G _ H U G E T L B _ P A G E ) | | d e f i n e d ( C O N F I G _ T R A N S P A R E N T _ H U G E P A G E )
2006-03-22 00:49:59 -08:00
661 : sethi % u h i ( _ P A G E _ S Z A L L _ 4 U ) , % g 7
sllx % g 7 , 3 2 , % g 7
.section .sun4v_2insn_patch , " ax"
.word 661b
mov _ P A G E _ S Z A L L _ 4 V , % g 7
nop
.previous
and % g 5 , % g 7 , % g 2
661 : sethi % u h i ( _ P A G E _ S Z H U G E _ 4 U ) , % g 7
sllx % g 7 , 3 2 , % g 7
.section .sun4v_2insn_patch , " ax"
.word 661b
mov _ P A G E _ S Z H U G E _ 4 V , % g 7
nop
.previous
cmp % g 2 , % g 7
bne,p t % x c c , 6 0 f
nop
/ * It i s a h u g e p a g e , u s e h u g e p a g e T S B e n t r y a d d r e s s w e
2013-02-19 22:34:10 -08:00
* calculated a b o v e . I f t h e h u g e p a g e T S B h a s n o t b e e n
* allocated, s e t u p a t r a p s t a c k a n d c a l l h u g e t l b _ s e t u p ( )
* to d o s o , t h e n r e t u r n f r o m t h e t r a p t o r e p l a y t h e T L B
* miss.
*
* This i s n e c e s s a r y t o h a n d l e t h e c a s e o f t r a n s p a r e n t h u g e
* pages w h e r e w e d o n ' t r e a l l y h a v e a n o n - a t o m i c c o n t e x t
* in w h i c h t o a l l o c a t e t h e h u g e p a g e T S B h a s h t a b l e . W h e n
* the ' m m ' f a u l t s i n t h e h u g e p a g e f o r t h e f i r s t t i m e , w e
* thus h a n d l e i t h e r e . T h i s a l s o m a k e s s u r e t h a t w e c a n
* allocate t h e T S B h a s h t a b l e o n t h e c o r r e c t N U M A n o d e .
2006-03-22 00:49:59 -08:00
* /
TRAP_ L O A D _ T R A P _ B L O C K ( % g 7 , % g 2 )
2013-02-19 22:34:10 -08:00
ldx [ % g 7 + T R A P _ P E R _ C P U _ T S B _ H U G E _ T E M P ] , % g 1
cmp % g 1 , - 1
bne,p t % x c c , 6 0 f
nop
661 : rdpr % p s t a t e , % g 5
wrpr % g 5 , P S T A T E _ A G | P S T A T E _ M G , % p s t a t e
.section .sun4v_2insn_patch , " ax"
.word 661b
SET_ G L ( 1 )
nop
.previous
2014-10-18 23:03:09 -04:00
rdpr % t l , % g 7
cmp % g 7 , 1
2013-02-19 22:34:10 -08:00
bne,p n % x c c , w i n f i x _ t r a m p o l i n e
2014-10-18 23:03:09 -04:00
mov % g 3 , % g 4
2013-02-19 22:34:10 -08:00
ba,p t % x c c , e t r a p
rd % p c , % g 7
call h u g e t l b _ s e t u p
add % s p , P T R E G S _ O F F , % o 0
ba,p t % x c c , r t r a p
nop
2006-03-22 00:49:59 -08:00
60 :
# endif
2006-01-31 18:29:18 -08:00
2006-03-22 00:49:59 -08:00
/ * At t h i s p o i n t w e h a v e :
* % g1 - - T S B e n t r y a d d r e s s
* % g3 - - F A U L T _ C O D E _ { D ,I } T L B
* % g5 - - v a l i d P T E
* % g6 - - T A G T A R G E T ( v a d d r > > 2 2 )
* /
tsb_reload :
TSB_ L O C K _ T A G ( % g 1 , % g 2 , % g 7 )
2006-01-31 18:29:18 -08:00
TSB_ W R I T E ( % g 1 , % g 5 , % g 6 )
/* Finally, load TLB and return from trap. */
tsb_tlb_reload :
cmp % g 3 , F A U L T _ C O D E _ D T L B
bne,p n % x c c , t s b _ i t l b _ l o a d
nop
tsb_dtlb_load :
2006-02-06 23:44:37 -08:00
661 : stxa % g 5 , [ % g 0 ] A S I _ D T L B _ D A T A _ I N
2006-01-31 18:29:18 -08:00
retry
2006-02-07 00:00:16 -08:00
.section .sun4v_2insn_patch , " ax"
2006-02-06 23:44:37 -08:00
.word 661b
nop
nop
.previous
/ * For s u n 4 v t h e A S I _ D T L B _ D A T A _ I N s t o r e a n d t h e r e t r y
* instruction g e t n o p ' d o u t a n d w e g e t h e r e t o b r a n c h
* to t h e s u n 4 v t l b l o a d c o d e . T h e r e g i s t e r s a r e s e t u p
* as f o l l o w s :
*
* % g4 : vaddr
* % g5 : PTE
* % g6 : TAG
*
* The s u n 4 v T L B l o a d w a n t s t h e P T E i n % g 3 s o w e f i x t h a t
* up h e r e .
* /
ba,p t % x c c , s u n 4 v _ d t l b _ l o a d
mov % g 5 , % g 3
2006-01-31 18:29:18 -08:00
tsb_itlb_load :
2006-03-01 22:42:18 -08:00
/* Executable bit must be set. */
2010-02-19 15:19:52 -08:00
661 : sethi % h i ( _ P A G E _ E X E C _ 4 U ) , % g 4
andcc % g 5 , % g 4 , % g 0
.section .sun4v_2insn_patch , " ax"
2006-03-01 22:42:18 -08:00
.word 661b
andcc % g 5 , _ P A G E _ E X E C _ 4 V , % g 0
2010-02-19 15:19:52 -08:00
nop
2006-03-01 22:42:18 -08:00
.previous
be,p n % x c c , t s b _ d o _ f a u l t
nop
2006-02-06 23:44:37 -08:00
661 : stxa % g 5 , [ % g 0 ] A S I _ I T L B _ D A T A _ I N
2006-01-31 18:29:18 -08:00
retry
2006-02-07 00:00:16 -08:00
.section .sun4v_2insn_patch , " ax"
2006-02-06 23:44:37 -08:00
.word 661b
nop
nop
.previous
/ * For s u n 4 v t h e A S I _ I T L B _ D A T A _ I N s t o r e a n d t h e r e t r y
* instruction g e t n o p ' d o u t a n d w e g e t h e r e t o b r a n c h
* to t h e s u n 4 v t l b l o a d c o d e . T h e r e g i s t e r s a r e s e t u p
* as f o l l o w s :
*
* % g4 : vaddr
* % g5 : PTE
* % g6 : TAG
*
* The s u n 4 v T L B l o a d w a n t s t h e P T E i n % g 3 s o w e f i x t h a t
* up h e r e .
* /
ba,p t % x c c , s u n 4 v _ i t l b _ l o a d
mov % g 5 , % g 3
2006-01-31 18:29:18 -08:00
/ * No v a l i d e n t r y i n t h e p a g e t a b l e s , d o f u l l f a u l t
* processing.
* /
.globl tsb_do_fault
tsb_do_fault :
cmp % g 3 , F A U L T _ C O D E _ D T L B
2006-02-05 22:27:28 -08:00
661 : rdpr % p s t a t e , % g 5
wrpr % g 5 , P S T A T E _ A G | P S T A T E _ M G , % p s t a t e
2006-02-07 00:00:16 -08:00
.section .sun4v_2insn_patch , " ax"
2006-02-05 22:27:28 -08:00
.word 661b
2006-02-17 14:58:02 -08:00
SET_ G L ( 1 )
2006-02-17 18:01:02 -08:00
ldxa [ % g 0 ] A S I _ S C R A T C H P A D , % g 4
2006-02-05 22:27:28 -08:00
.previous
2006-01-31 18:29:18 -08:00
bne,p n % x c c , t s b _ d o _ i t l b _ f a u l t
2006-02-05 22:27:28 -08:00
nop
2006-01-31 18:29:18 -08:00
tsb_do_dtlb_fault :
2006-02-06 23:44:37 -08:00
rdpr % t l , % g 3
cmp % g 3 , 1
661 : mov T L B _ T A G _ A C C E S S , % g 4
2006-01-31 18:29:18 -08:00
ldxa [ % g 4 ] A S I _ D M M U , % g 5
2006-02-07 00:00:16 -08:00
.section .sun4v_2insn_patch , " ax"
2006-02-06 23:44:37 -08:00
.word 661b
2006-02-17 18:01:02 -08:00
ldx [ % g 4 + H V _ F A U L T _ D _ A D D R _ O F F S E T ] , % g 5
2006-02-06 23:44:37 -08:00
nop
.previous
2016-07-27 17:50:26 -07:00
/* Clear context ID bits. */
srlx % g 5 , P A G E _ S H I F T , % g 5
sllx % g 5 , P A G E _ S H I F T , % g 5
2006-01-31 18:29:18 -08:00
be,p t % x c c , s p a r c64 _ r e a l f a u l t _ c o m m o n
mov F A U L T _ C O D E _ D T L B , % g 4
ba,p t % x c c , w i n f i x _ t r a m p o l i n e
nop
tsb_do_itlb_fault :
rdpr % t p c , % g 5
ba,p t % x c c , s p a r c64 _ r e a l f a u l t _ c o m m o n
mov F A U L T _ C O D E _ I T L B , % g 4
.globl sparc64_realfault_common
sparc64_realfault_common :
2006-01-31 18:34:21 -08:00
/ * fault c o d e i n % g 4 , f a u l t a d d r e s s i n % g 5 , e t r a p w i l l
* preserve t h e s e t w o v a l u e s i n % l 4 a n d % l 5 r e s p e c t i v e l y
* /
2006-01-31 18:29:18 -08:00
ba,p t % x c c , e t r a p ! S a v e t r a p s t a t e
1 : rd % p c , % g 7 ! . . .
2006-01-31 18:34:21 -08:00
stb % l 4 , [ % g 6 + T I _ F A U L T _ C O D E ] ! S a v e f a u l t c o d e
stx % l 5 , [ % g 6 + T I _ F A U L T _ A D D R ] ! S a v e f a u l t a d d r e s s
2006-01-31 18:29:18 -08:00
call d o _ s p a r c64 _ f a u l t ! C a l l f a u l t h a n d l e r
add % s p , P T R E G S _ O F F , % o 0 ! C o m p u t e p t _ r e g s a r g
2008-04-24 03:15:22 -07:00
ba,p t % x c c , r t r a p ! R e s t o r e c p u s t a t e
2006-01-31 18:29:18 -08:00
nop ! D e l a y s l o t ( f i l l m e )
winfix_trampoline :
rdpr % t p c , % g 3 ! P r e p a r e w i n f i x u p T N P C
or % g 3 , 0 x7 c , % g 3 ! C o m p u t e b r a n c h o f f s e t
wrpr % g 3 , % t n p c ! W r i t e i t i n t o T N P C
done ! T r a p r e t u r n
2006-01-31 18:32:04 -08:00
/ * Insert a n e n t r y i n t o t h e T S B .
*
2006-02-01 15:55:21 -08:00
* % o0 : TSB e n t r y p o i n t e r ( v i r t o r p h y s a d d r e s s )
2006-01-31 18:32:04 -08:00
* % o1 : tag
* % o2 : pte
* /
.align 32
2006-02-01 15:55:21 -08:00
.globl __tsb_insert
__tsb_insert :
2006-01-31 18:32:04 -08:00
rdpr % p s t a t e , % o 5
wrpr % o 5 , P S T A T E _ I E , % p s t a t e
TSB_ L O C K _ T A G ( % o 0 , % g 2 , % g 3 )
TSB_ W R I T E ( % o 0 , % o 2 , % o 1 )
wrpr % o 5 , % p s t a t e
retl
nop
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
.size _ _ tsb_ i n s e r t , . - _ _ t s b _ i n s e r t
2006-01-31 18:32:04 -08:00
2006-02-01 15:55:21 -08:00
/ * Flush t h e g i v e n T S B e n t r y i f i t h a s t h e m a t c h i n g
* tag.
*
* % o0 : TSB e n t r y p o i n t e r ( v i r t o r p h y s a d d r e s s )
* % o1 : tag
* /
.align 32
.globl tsb_flush
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
.type _ f l u s h ,#f u n c t i o n
2006-02-01 15:55:21 -08:00
tsb_flush :
sethi % h i ( T S B _ T A G _ L O C K _ H I G H ) , % g 2
1 : TSB_ L O A D _ T A G ( % o 0 , % g 1 )
srlx % g 1 , 3 2 , % o 3
andcc % o 3 , % g 2 , % g 0
bne,p n % i c c , 1 b
2008-11-15 13:33:25 -08:00
nop
2006-02-01 15:55:21 -08:00
cmp % g 1 , % o 1
2006-02-17 18:01:02 -08:00
mov 1 , % o 3
2006-02-01 15:55:21 -08:00
bne,p t % x c c , 2 f
2006-02-17 18:01:02 -08:00
sllx % o 3 , T S B _ T A G _ I N V A L I D _ B I T , % o 3
2006-02-01 15:55:21 -08:00
TSB_ C A S _ T A G ( % o 0 , % g 1 , % o 3 )
cmp % g 1 , % o 3
bne,p n % x c c , 1 b
nop
2 : retl
2008-11-15 13:33:25 -08:00
nop
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
.size _ f l u s h , . - t s b _ f l u s h
2006-02-01 15:55:21 -08:00
2006-01-31 18:29:18 -08:00
/ * Reload M M U r e l a t e d c o n t e x t s w i t c h s t a t e a t
* schedule( ) t i m e .
*
* % o0 : page t a b l e p h y s i c a l a d d r e s s
2006-03-22 00:49:59 -08:00
* % o1 : TSB b a s e c o n f i g p o i n t e r
* % o2 : TSB h u g e c o n f i g p o i n t e r , o r N U L L i f n o n e
* % o3 : Hypervisor T S B d e s c r i p t o r p h y s i c a l a d d r e s s
2006-01-31 18:31:20 -08:00
*
* We h a v e t o r u n t h i s w h o l e t h i n g w i t h i n t e r r u p t s
* disabled s o t h a t t h e c u r r e n t c p u d o e s n ' t c h a n g e
* due t o p r e e m p t i o n .
2006-01-31 18:29:18 -08:00
* /
2006-02-26 23:24:22 -08:00
.align 32
2006-01-31 18:31:20 -08:00
.globl __tsb_context_switch
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
.type _ _ tsb_ c o n t e x t _ s w i t c h ,#f u n c t i o n
2006-01-31 18:31:20 -08:00
__tsb_context_switch :
2006-03-22 00:49:59 -08:00
rdpr % p s t a t e , % g 1
wrpr % g 1 , P S T A T E _ I E , % p s t a t e
TRAP_ L O A D _ T R A P _ B L O C K ( % g 2 , % g 3 )
2006-01-31 18:29:18 -08:00
2006-01-31 18:31:20 -08:00
stx % o 0 , [ % g 2 + T R A P _ P E R _ C P U _ P G D _ P A D D R ]
2006-01-31 18:29:18 -08:00
2006-03-22 00:49:59 -08:00
ldx [ % o 1 + T S B _ C O N F I G _ R E G _ V A L ] , % o 0
brz,p t % o 2 , 1 f
mov - 1 , % g 3
ldx [ % o 2 + T S B _ C O N F I G _ R E G _ V A L ] , % g 3
1 : stx % g 3 , [ % g 2 + T R A P _ P E R _ C P U _ T S B _ H U G E ]
sethi % h i ( t l b _ t y p e ) , % g 2
lduw [ % g 2 + % l o ( t l b _ t y p e ) ] , % g 2
cmp % g 2 , 3
bne,p t % i c c , 5 0 f
2006-02-09 17:21:53 -08:00
nop
/* Hypervisor TSB switch. */
2006-03-22 00:49:59 -08:00
mov S C R A T C H P A D _ U T S B R E G 1 , % o 5
stxa % o 0 , [ % o 5 ] A S I _ S C R A T C H P A D
mov S C R A T C H P A D _ U T S B R E G 2 , % o 5
stxa % g 3 , [ % o 5 ] A S I _ S C R A T C H P A D
mov 2 , % o 0
cmp % g 3 , - 1
move % x c c , 1 , % o 0
2006-02-15 21:16:42 -08:00
2006-02-09 22:57:21 -08:00
mov H V _ F A S T _ M M U _ T S B _ C T X N O N 0 , % o 5
2006-03-22 00:49:59 -08:00
mov % o 3 , % o 1
2006-02-09 17:21:53 -08:00
ta H V _ F A S T _ T R A P
2006-03-22 00:49:59 -08:00
/* Finish up. */
2006-02-09 17:21:53 -08:00
ba,p t % x c c , 9 f
2006-03-22 00:49:59 -08:00
nop
2006-01-31 18:29:18 -08:00
2006-02-09 17:21:53 -08:00
/* SUN4U TSB switch. */
2006-03-22 00:49:59 -08:00
50 : mov T S B _ R E G , % o 5
stxa % o 0 , [ % o 5 ] A S I _ D M M U
2006-02-09 17:21:53 -08:00
membar #S y n c
2006-03-22 00:49:59 -08:00
stxa % o 0 , [ % o 5 ] A S I _ I M M U
2006-01-31 18:29:18 -08:00
membar #S y n c
2006-03-22 00:49:59 -08:00
2 : ldx [ % o 1 + T S B _ C O N F I G _ M A P _ V A D D R ] , % o 4
brz % o 4 , 9 f
ldx [ % o 1 + T S B _ C O N F I G _ M A P _ P T E ] , % o 5
2006-01-31 18:29:18 -08:00
2006-02-09 17:21:53 -08:00
sethi % h i ( s p a r c64 _ h i g h e s t _ u n l o c k e d _ t l b _ e n t ) , % g 2
2006-03-22 00:49:59 -08:00
mov T L B _ T A G _ A C C E S S , % g 3
2006-02-09 17:21:53 -08:00
lduw [ % g 2 + % l o ( s p a r c64 _ h i g h e s t _ u n l o c k e d _ t l b _ e n t ) ] , % g 2
2006-03-22 00:49:59 -08:00
stxa % o 4 , [ % g 3 ] A S I _ D M M U
2006-01-31 18:33:12 -08:00
membar #S y n c
sllx % g 2 , 3 , % g 2
2006-03-22 00:49:59 -08:00
stxa % o 5 , [ % g 2 ] A S I _ D T L B _ D A T A _ A C C E S S
membar #S y n c
brz,p t % o 2 , 9 f
nop
ldx [ % o 2 + T S B _ C O N F I G _ M A P _ V A D D R ] , % o 4
ldx [ % o 2 + T S B _ C O N F I G _ M A P _ P T E ] , % o 5
mov T L B _ T A G _ A C C E S S , % g 3
stxa % o 4 , [ % g 3 ] A S I _ D M M U
membar #S y n c
sub % g 2 , ( 1 < < 3 ) , % g 2
stxa % o 5 , [ % g 2 ] A S I _ D T L B _ D A T A _ A C C E S S
2006-01-31 18:33:12 -08:00
membar #S y n c
2006-03-22 00:49:59 -08:00
2006-01-31 18:29:18 -08:00
9 :
2006-03-22 00:49:59 -08:00
wrpr % g 1 , % p s t a t e
2006-01-31 18:29:18 -08:00
retl
2006-01-31 18:31:20 -08:00
nop
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
.size _ _ tsb_ c o n t e x t _ s w i t c h , . - _ _ t s b _ c o n t e x t _ s w i t c h
# define T S B _ P A S S _ B I T S ( ( 1 < < T S B _ T A G _ L O C K _ B I T ) | \
( 1 < < TSB_ T A G _ I N V A L I D _ B I T ) )
.align 32
.globl copy_tsb
.type _ t s b ,#f u n c t i o n
copy_tsb : / * % o0 =old_tsb_base , % o 1 =old_tsb_size
* % o2 =new_tsb_base , % o 3 =new_tsb_size
* /
sethi % u h i ( T S B _ P A S S _ B I T S ) , % g 7
srlx % o 3 , 4 , % o 3
add % o 0 , % o 1 , % g 1 / * e n d o f o l d t s b * /
sllx % g 7 , 3 2 , % g 7
sub % o 3 , 1 , % o 3 / * % o 3 = = n e w t s b h a s h m a s k * /
661 : prefetcha [ % o 0 ] A S I _ N , #o n e _ r e a d
.section .tsb_phys_patch , " ax"
.word 661b
prefetcha [ % o 0 ] A S I _ P H Y S _ U S E _ E C , #o n e _ r e a d
.previous
90 : andcc % o 0 , ( 6 4 - 1 ) , % g 0
bne 1 f
add % o 0 , 6 4 , % o 5
661 : prefetcha [ % o 5 ] A S I _ N , #o n e _ r e a d
.section .tsb_phys_patch , " ax"
.word 661b
prefetcha [ % o 5 ] A S I _ P H Y S _ U S E _ E C , #o n e _ r e a d
.previous
1 : TSB_ L O A D _ Q U A D ( % o 0 , % g 2 ) / * % g 2 / % g 3 = = T S B e n t r y * /
andcc % g 2 , % g 7 , % g 0 / * L O C K o r I N V A L I D s e t ? * /
bne,p n % x c c , 8 0 f / * S k i p i t * /
sllx % g 2 , 2 2 , % o 4 / * T A G - - > V A D D R * /
/* This can definitely be computed faster... */
srlx % o 0 , 4 , % o 5 / * B u i l d i n d e x * /
and % o 5 , 5 1 1 , % o 5 / * M a s k i n d e x * /
sllx % o 5 , P A G E _ S H I F T , % o 5 / * P u t i n t o v a d d r p o s i t i o n * /
or % o 4 , % o 5 , % o 4 / * F u l l V A D D R . * /
srlx % o 4 , P A G E _ S H I F T , % o 4 / * S h i f t d o w n t o c r e a t e i n d e x * /
and % o 4 , % o 3 , % o 4 / * M a s k w i t h n e w _ t s b _ n e n t s - 1 * /
sllx % o 4 , 4 , % o 4 / * S h i f t b a c k u p i n t o t s b e n t o f f s e t * /
TSB_ S T O R E ( % o 2 + % o 4 , % g 2 ) / * S t o r e T A G * /
add % o 4 , 0 x8 , % o 4 / * A d v a n c e t o T T E * /
TSB_ S T O R E ( % o 2 + % o 4 , % g 3 ) / * S t o r e T T E * /
80 : add % o 0 , 1 6 , % o 0
cmp % o 0 , % g 1
bne,p t % x c c , 9 0 b
nop
retl
2008-11-15 13:33:25 -08:00
nop
[SPARC64]: Fix and re-enable dynamic TSB sizing.
This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.
1) There was a serious race in switch_mm() wrt. lazy TLB
switching to and from kernel threads.
We could erroneously skip a tsb_context_switch() and thus
use a stale TSB across a TSB grow event.
There is a big comment now in that function describing
exactly how it can happen.
2) All code paths that do something with the TSB need to be
guarded with the mm->context.lock spinlock. This makes
page table flushing paths properly synchronize with both
TSB growing and TLB context changes.
3) TSB growing events are moved to the end of successful fault
processing. Previously it was in update_mmu_cache() but
that is deadlock prone. At the end of do_sparc64_fault()
we hold no spinlocks that could deadlock the TSB grow
sequence. We also have dropped the address space semaphore.
While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file. This piece of
code is quite time critical.
There are some small negative side effects to this code which
can be improved upon. In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive. We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value. That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.
I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.
This code seems very solid now. It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel. That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-16 02:02:32 -08:00
.size _ t s b , . - c o p y _ t s b
2006-03-18 23:55:11 -08:00
/* Set the invalid bit in all TSB entries. */
.align 32
.globl tsb_init
.type _ i n i t ,#f u n c t i o n
tsb_init : /* %o0 = TSB vaddr, %o1 = size in bytes */
prefetch [ % o 0 + 0 x00 0 ] , #n _ w r i t e s
mov 1 , % g 1
prefetch [ % o 0 + 0 x04 0 ] , #n _ w r i t e s
sllx % g 1 , T S B _ T A G _ I N V A L I D _ B I T , % g 1
prefetch [ % o 0 + 0 x08 0 ] , #n _ w r i t e s
1 : prefetch [ % o 0 + 0 x0 c0 ] , #n _ w r i t e s
stx % g 1 , [ % o 0 + 0 x00 ]
stx % g 1 , [ % o 0 + 0 x10 ]
stx % g 1 , [ % o 0 + 0 x20 ]
stx % g 1 , [ % o 0 + 0 x30 ]
prefetch [ % o 0 + 0 x10 0 ] , #n _ w r i t e s
stx % g 1 , [ % o 0 + 0 x40 ]
stx % g 1 , [ % o 0 + 0 x50 ]
stx % g 1 , [ % o 0 + 0 x60 ]
stx % g 1 , [ % o 0 + 0 x70 ]
prefetch [ % o 0 + 0 x14 0 ] , #n _ w r i t e s
stx % g 1 , [ % o 0 + 0 x80 ]
stx % g 1 , [ % o 0 + 0 x90 ]
stx % g 1 , [ % o 0 + 0 x a0 ]
stx % g 1 , [ % o 0 + 0 x b0 ]
prefetch [ % o 0 + 0 x18 0 ] , #n _ w r i t e s
stx % g 1 , [ % o 0 + 0 x c0 ]
stx % g 1 , [ % o 0 + 0 x d0 ]
stx % g 1 , [ % o 0 + 0 x e 0 ]
stx % g 1 , [ % o 0 + 0 x f0 ]
subcc % o 1 , 0 x10 0 , % o 1
bne,p t % x c c , 1 b
add % o 0 , 0 x10 0 , % o 0
retl
nop
nop
nop
.size _ i n i t , . - t s b _ i n i t
.globl NGtsb_init
.type _ i n i t ,#f u n c t i o n
NGtsb_init :
rd % a s i , % g 2
mov 1 , % g 1
wr % g 0 , A S I _ B L K _ I N I T _ Q U A D _ L D D _ P , % a s i
sllx % g 1 , T S B _ T A G _ I N V A L I D _ B I T , % g 1
1 : stxa % g 1 , [ % o 0 + 0 x00 ] % a s i
stxa % g 1 , [ % o 0 + 0 x10 ] % a s i
stxa % g 1 , [ % o 0 + 0 x20 ] % a s i
stxa % g 1 , [ % o 0 + 0 x30 ] % a s i
stxa % g 1 , [ % o 0 + 0 x40 ] % a s i
stxa % g 1 , [ % o 0 + 0 x50 ] % a s i
stxa % g 1 , [ % o 0 + 0 x60 ] % a s i
stxa % g 1 , [ % o 0 + 0 x70 ] % a s i
stxa % g 1 , [ % o 0 + 0 x80 ] % a s i
stxa % g 1 , [ % o 0 + 0 x90 ] % a s i
stxa % g 1 , [ % o 0 + 0 x a0 ] % a s i
stxa % g 1 , [ % o 0 + 0 x b0 ] % a s i
stxa % g 1 , [ % o 0 + 0 x c0 ] % a s i
stxa % g 1 , [ % o 0 + 0 x d0 ] % a s i
stxa % g 1 , [ % o 0 + 0 x e 0 ] % a s i
stxa % g 1 , [ % o 0 + 0 x f0 ] % a s i
subcc % o 1 , 0 x10 0 , % o 1
bne,p t % x c c , 1 b
add % o 0 , 0 x10 0 , % o 0
2007-03-19 13:27:33 -07:00
membar #S y n c
2006-03-18 23:55:11 -08:00
retl
wr % g 2 , 0 x0 , % a s i
.size _ i n i t , . - N G t s b _ i n i t
