License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 15:07:57 +01:00
/* SPDX-License-Identifier: GPL-2.0 */
2005-04-16 15:20:36 -07:00
/ *
* Here i s w h e r e t h e b a l l g e t s r o l l i n g a s f a r a s t h e k e r n e l i s c o n c e r n e d .
* When c o n t r o l i s t r a n s f e r r e d t o _ s t a r t , t h e b o o t l o a d h a s a l r e a d y
* loaded u s t o t h e c o r r e c t a d d r e s s . A l l t h a t ' s l e f t t o d o h e r e i s
* to s e t u p t h e k e r n e l ' s g l o b a l p o i n t e r a n d j u m p t o t h e k e r n e l
* entry p o i n t .
*
* Copyright ( C ) 1 9 9 8 - 2 0 0 1 , 2 0 0 3 , 2 0 0 5 H e w l e t t - P a c k a r d C o
* David M o s b e r g e r - T a n g < d a v i d m @hpl.hp.com>
* Stephane E r a n i a n < e r a n i a n @hpl.hp.com>
* Copyright ( C ) 1 9 9 9 V A L i n u x S y s t e m s
* Copyright ( C ) 1 9 9 9 W a l t D r u m m o n d < d r u m m o n d @valinux.com>
* Copyright ( C ) 1 9 9 9 I n t e l C o r p .
* Copyright ( C ) 1 9 9 9 A s i t M a l l i c k < A s i t . K . M a l l i c k @intel.com>
* Copyright ( C ) 1 9 9 9 D o n D u g g e r < D o n . D u g g e r @intel.com>
* Copyright ( C ) 2 0 0 2 F e n g h u a Y u < f e n g h u a . y u @intel.com>
* - Optimize _ _ i a64 _ s a v e _ f p u ( ) a n d _ _ i a64 _ l o a d _ f p u ( ) f o r I t a n i u m 2 .
2005-04-22 14:44:40 -07:00
* Copyright ( C ) 2 0 0 4 A s h o k R a j < a s h o k . r a j @intel.com>
* Support f o r C P U H o t p l u g
2005-04-16 15:20:36 -07:00
* /
2020-06-08 21:32:42 -07:00
# include < l i n u x / p g t a b l e . h >
2005-04-16 15:20:36 -07:00
# include < a s m / a s m m a c r o . h >
# include < a s m / f p u . h >
# include < a s m / k r e g s . h >
# include < a s m / m m u _ c o n t e x t . h >
2005-09-09 22:03:13 +02:00
# include < a s m / a s m - o f f s e t s . h >
2005-04-16 15:20:36 -07:00
# include < a s m / p a l . h >
# include < a s m / p r o c e s s o r . h >
# include < a s m / p t r a c e . h >
2005-04-22 14:44:40 -07:00
# include < a s m / m c a _ a s m . h >
2008-05-19 22:13:33 +09:00
# include < l i n u x / i n i t . h >
# include < l i n u x / l i n k a g e . h >
2020-06-08 21:32:42 -07:00
# include < l i n u x / p g t a b l e . h >
2016-01-17 01:13:41 -05:00
# include < a s m / e x p o r t . h >
2005-04-22 14:44:40 -07:00
# ifdef C O N F I G _ H O T P L U G _ C P U
# define S A L _ P S R _ B I T S _ T O _ S E T \
( IA6 4 _ P S R _ A C | I A 6 4 _ P S R _ B N | I A 6 4 _ P S R _ M F H | I A 6 4 _ P S R _ M F L )
# define S A V E _ F R O M _ R E G ( s r c , p t r , d e s t ) \
mov d e s t =src ;; \
st8 [ p t r ] =dest ,0 x08
# define R E S T O R E _ R E G ( r e g , p t r , _ t m p ) \
ld8 _ t m p = [ p t r ] ,0 x08 ;; \
mov r e g =_tmp
# define S A V E _ B R E A K _ R E G S ( p t r , _ i d x , _ b r e g , _ d e s t ) \
mov a r . l c =IA64_NUM_DBG_REGS - 1 ;; \
mov _ i d x =0 ;; \
1 : \
SAVE_ F R O M _ R E G ( _ b r e g [ _ i d x ] , p t r , _ d e s t ) ;; \
add _ i d x =1 ,_ i d x ;; \
br. c l o o p . s p t k . m a n y 1 b
# define R E S T O R E _ B R E A K _ R E G S ( p t r , _ i d x , _ b r e g , _ t m p , _ l b l ) \
mov a r . l c =IA64_NUM_DBG_REGS - 1 ;; \
mov _ i d x =0 ;; \
_lbl : RESTORE_ R E G ( _ b r e g [ _ i d x ] , p t r , _ t m p ) ;; \
add _ i d x =1 , _ i d x ;; \
br. c l o o p . s p t k . m a n y _ l b l
# define S A V E _ O N E _ R R ( n u m , _ r e g , _ t m p ) \
movl _ t m p = ( n u m < < 6 1 ) ;; \
mov _ r e g =rr [ _ t m p ]
# define S A V E _ R E G I O N _ R E G S ( _ t m p , _ r0 , _ r1 , _ r2 , _ r3 , _ r4 , _ r5 , _ r6 , _ r7 ) \
SAVE_ O N E _ R R ( 0 ,_ r0 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 1 ,_ r1 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 2 ,_ r2 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 3 ,_ r3 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 4 ,_ r4 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 5 ,_ r5 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 6 ,_ r6 , _ t m p ) ;; \
SAVE_ O N E _ R R ( 7 ,_ r7 , _ t m p ) ;;
# define S T O R E _ R E G I O N _ R E G S ( p t r , _ r0 , _ r1 , _ r2 , _ r3 , _ r4 , _ r5 , _ r6 , _ r7 ) \
st8 [ p t r ] =_r0 , 8 ;; \
st8 [ p t r ] =_r1 , 8 ;; \
st8 [ p t r ] =_r2 , 8 ;; \
st8 [ p t r ] =_r3 , 8 ;; \
st8 [ p t r ] =_r4 , 8 ;; \
st8 [ p t r ] =_r5 , 8 ;; \
st8 [ p t r ] =_r6 , 8 ;; \
st8 [ p t r ] =_r7 , 8 ;;
# define R E S T O R E _ R E G I O N _ R E G S ( p t r , _ i d x1 , _ i d x2 , _ t m p ) \
mov a r . l c =0x08 - 1 ;; \
movl _ i d x1 =0x00 ;; \
RestRR : \
dep. z _ i d x2 =_idx1 ,6 1 ,3 ;; \
ld8 _ t m p = [ p t r ] ,8 ;; \
mov r r [ _ i d x2 ] =_tmp ;; \
srlz. d ;; \
add _ i d x1 =1 ,_ i d x1 ;; \
br. c l o o p . s p t k . f e w R e s t R R
2005-04-22 14:46:24 -07:00
# define S E T _ A R E A _ F O R _ B O O T I N G _ C P U ( r e g 1 , r e g 2 ) \
movl r e g 1 =sal_state_for_booting_cpu ;; \
ld8 r e g 2 = [ r e g 1 ] ;;
2005-04-22 14:44:40 -07:00
/ *
* Adjust r e g i o n r e g i s t e r s s a v e d b e f o r e s t a r t i n g t o s a v e
* break r e g s a n d r e s t o f t h e s t a t e s t h a t n e e d t o b e p r e s e r v e d .
* /
# define S A L _ T O _ O S _ B O O T _ H A N D O F F _ S T A T E _ S A V E ( _ r e g 1 ,_ r e g 2 ,_ p r e d ) \
SAVE_ F R O M _ R E G ( b0 ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( b1 ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( b2 ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( b3 ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( b4 ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( b5 ,_ r e g 1 ,_ r e g 2 ) ;; \
st8 [ _ r e g 1 ] =r1 ,0 x08 ;; \
st8 [ _ r e g 1 ] =r12 ,0 x08 ;; \
st8 [ _ r e g 1 ] =r13 ,0 x08 ;; \
SAVE_ F R O M _ R E G ( a r . f p s r ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( a r . p f s ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( a r . r n a t ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( a r . u n a t ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( a r . b s p s t o r e ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . d c r ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . i v a ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . p t a ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . i t v ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . p m v ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . c m c v ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . l r r0 ,_ r e g 1 ,_ r e g 2 ) ;; \
SAVE_ F R O M _ R E G ( c r . l r r1 ,_ r e g 1 ,_ r e g 2 ) ;; \
st8 [ _ r e g 1 ] =r4 ,0 x08 ;; \
st8 [ _ r e g 1 ] =r5 ,0 x08 ;; \
st8 [ _ r e g 1 ] =r6 ,0 x08 ;; \
st8 [ _ r e g 1 ] =r7 ,0 x08 ;; \
st8 [ _ r e g 1 ] =_pred ,0 x08 ;; \
SAVE_ F R O M _ R E G ( a r . l c , _ r e g 1 , _ r e g 2 ) ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f2 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f3 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f4 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f5 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f16 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f17 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f18 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f19 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f20 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f21 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f22 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f23 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f24 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f25 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f26 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f27 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f28 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f29 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f30 ,1 6 ;; \
stf. s p i l l . n t a [ _ r e g 1 ] =f31 ,1 6 ;;
# else
2005-04-22 14:46:24 -07:00
# define S E T _ A R E A _ F O R _ B O O T I N G _ C P U ( a1 , a2 )
# define S A L _ T O _ O S _ B O O T _ H A N D O F F _ S T A T E _ S A V E ( a1 ,a2 , a3 )
2005-04-22 14:44:40 -07:00
# define S A V E _ R E G I O N _ R E G S ( _ t m p , _ r0 , _ r1 , _ r2 , _ r3 , _ r4 , _ r5 , _ r6 , _ r7 )
# define S T O R E _ R E G I O N _ R E G S ( p t r , _ r0 , _ r1 , _ r2 , _ r3 , _ r4 , _ r5 , _ r6 , _ r7 )
# endif
# define S E T _ O N E _ R R ( n u m , p g s i z e , _ t m p1 , _ t m p2 , v h p t ) \
movl _ t m p1 = ( n u m < < 6 1 ) ;; \
mov _ t m p2 = ( ( i a64 _ r i d ( I A 6 4 _ R E G I O N _ I D _ K E R N E L , ( n u m < < 6 1 ) ) < < 8 ) | ( p g s i z e < < 2 ) | v h p t ) ;; \
mov r r [ _ t m p1 ] =_tmp2
2005-04-16 15:20:36 -07:00
2009-07-31 16:57:52 -04:00
_ _ PAGE_ A L I G N E D _ D A T A
2005-04-16 15:20:36 -07:00
.global empty_zero_page
2016-01-17 01:13:41 -05:00
EXPORT_ D A T A _ S Y M B O L _ G P L ( e m p t y _ z e r o _ p a g e )
2005-04-16 15:20:36 -07:00
empty_zero_page :
.skip PAGE_SIZE
.global swapper_pg_dir
swapper_pg_dir :
.skip PAGE_SIZE
.rodata
halt_msg :
stringz " H a l t i n g k e r n e l \ n "
2009-07-31 16:57:51 -04:00
_ _ REF
2005-04-16 15:20:36 -07:00
.global start_ap
/ *
* Start t h e k e r n e l . W h e n t h e b o o t l o a d e r p a s s e s c o n t r o l t o _ s t a r t ( ) , r28
* points t o t h e a d d r e s s o f t h e b o o t p a r a m e t e r a r e a . E x e c u t i o n r e a c h e s
* here i n p h y s i c a l m o d e .
* /
GLOBAL_ E N T R Y ( _ s t a r t )
start_ap :
.prologue
.save rp, r0 / / t e r m i n a t e u n w i n d c h a i n w i t h a N U L L r p
.body
rsm p s r . i | p s r . i c
;;
srlz. i
;;
2006-08-31 11:34:47 -05:00
{
flushrs / / m u s t b e f i r s t i n s n i n g r o u p
srlz. i
}
;;
2005-04-22 14:44:40 -07:00
/ *
* Save t h e r e g i o n r e g i s t e r s , p r e d i c a t e b e f o r e t h e y g e t c l o b b e r e d
* /
SAVE_ R E G I O N _ R E G S ( r2 , r8 ,r9 ,r10 ,r11 ,r12 ,r13 ,r14 ,r15 ) ;
mov r25 =pr ;;
2005-04-16 15:20:36 -07:00
/ *
* Initialize k e r n e l r e g i o n r e g i s t e r s :
* rr[ 0 ] : V H P T e n a b l e d , p a g e s i z e = P A G E _ S H I F T
* rr[ 1 ] : V H P T e n a b l e d , p a g e s i z e = P A G E _ S H I F T
* rr[ 2 ] : V H P T e n a b l e d , p a g e s i z e = P A G E _ S H I F T
* rr[ 3 ] : V H P T e n a b l e d , p a g e s i z e = P A G E _ S H I F T
* rr[ 4 ] : V H P T e n a b l e d , p a g e s i z e = P A G E _ S H I F T
* rr[ 5 ] : V H P T e n a b l e d , p a g e s i z e = P A G E _ S H I F T
* rr[ 6 ] : V H P T d i s a b l e d , p a g e s i z e = I A 6 4 _ G R A N U L E _ S H I F T
* rr[ 7 ] : V H P T d i s a b l e d , p a g e s i z e = I A 6 4 _ G R A N U L E _ S H I F T
* We i n i t i a l i z e a l l o f t h e m t o p r e v e n t i n a d v e r t e n t l y a s s u m i n g
* something a b o u t t h e s t a t e o f a d d r e s s t r a n s l a t i o n e a r l y i n b o o t .
* /
2005-04-22 14:44:40 -07:00
SET_ O N E _ R R ( 0 , P A G E _ S H I F T , r2 , r16 , 1 ) ;;
SET_ O N E _ R R ( 1 , P A G E _ S H I F T , r2 , r16 , 1 ) ;;
SET_ O N E _ R R ( 2 , P A G E _ S H I F T , r2 , r16 , 1 ) ;;
SET_ O N E _ R R ( 3 , P A G E _ S H I F T , r2 , r16 , 1 ) ;;
SET_ O N E _ R R ( 4 , P A G E _ S H I F T , r2 , r16 , 1 ) ;;
SET_ O N E _ R R ( 5 , P A G E _ S H I F T , r2 , r16 , 1 ) ;;
SET_ O N E _ R R ( 6 , I A 6 4 _ G R A N U L E _ S H I F T , r2 , r16 , 0 ) ;;
SET_ O N E _ R R ( 7 , I A 6 4 _ G R A N U L E _ S H I F T , r2 , r16 , 0 ) ;;
2005-04-16 15:20:36 -07:00
/ *
* Now p i n m a p p i n g s i n t o t h e T L B f o r k e r n e l t e x t a n d d a t a
* /
mov r18 =KERNEL_TR_PAGE_SHIFT < < 2
movl r17 =KERNEL_START
;;
mov c r . i t i r =r18
mov c r . i f a =r17
mov r16 =IA64_TR_KERNEL
mov r3 =ip
movl r18 =PAGE_KERNEL
;;
dep r2 =0 ,r3 ,0 ,K E R N E L _ T R _ P A G E _ S H I F T
;;
or r18 =r2 ,r18
;;
srlz. i
;;
itr. i i t r [ r16 ] =r18
;;
itr. d d t r [ r16 ] =r18
;;
srlz. i
/ *
* Switch i n t o v i r t u a l m o d e :
* /
movl r16 = ( I A 6 4 _ P S R _ I T | I A 6 4 _ P S R _ I C | I A 6 4 _ P S R _ D T | I A 6 4 _ P S R _ R T | I A 6 4 _ P S R _ D F H | I A 6 4 _ P S R _ B N \
2014-03-28 14:42:07 -07:00
| IA6 4 _ P S R _ D I )
2005-04-16 15:20:36 -07:00
;;
mov c r . i p s r =r16
movl r17 =1f
;;
mov c r . i i p =r17
mov c r . i f s =r0
;;
rfi
;;
1 : / / now w e a r e i n v i r t u a l m o d e
2005-04-22 14:46:24 -07:00
SET_ A R E A _ F O R _ B O O T I N G _ C P U ( r2 , r16 ) ;
2005-04-22 14:44:40 -07:00
STORE_ R E G I O N _ R E G S ( r16 , r8 ,r9 ,r10 ,r11 ,r12 ,r13 ,r14 ,r15 ) ;
SAL_ T O _ O S _ B O O T _ H A N D O F F _ S T A T E _ S A V E ( r16 ,r17 ,r25 )
;;
2005-04-16 15:20:36 -07:00
/ / set I V T e n t r y p o i n t - - - c a n ' t a c c e s s I / O p o r t s w i t h o u t i t
movl r3 =ia64_ivt
;;
mov c r . i v a =r3
movl r2 =FPSR_DEFAULT
;;
srlz. i
movl g p =__gp
mov a r . f p s r =r2
;;
# define i s A P p2 / / a r e w e a n A p p l i c a t i o n P r o c e s s o r ?
# define i s B P p3 / / a r e w e t h e B o o t s t r a p P r o c e s s o r ?
# ifdef C O N F I G _ S M P
/ *
* Find t h e i n i t _ t a s k f o r t h e c u r r e n t l y b o o t i n g C P U . A t p o w e r o n , a n d i n
* UP m o d e , t a s k _ f o r _ b o o t i n g _ c p u i s N U L L .
* /
movl r3 =task_for_booting_cpu
;;
ld8 r3 = [ r3 ]
movl r2 =init_task
;;
cmp. e q i s B P ,i s A P =r3 ,r0
;;
( isAP) m o v r2 =r3
# else
movl r2 =init_task
cmp. e q i s B P ,i s A P =r0 ,r0
# endif
;;
tpa r3 =r2 / / r3 = = p h y s a d d r o f t a s k s t r u c t
mov r16 = - 1
( isBP) b r . c o n d . d p n t . l o a d _ c u r r e n t / / B P s t a c k i s o n r e g i o n 5 - - - n o n e e d t o m a p i t
/ / load m a p p i n g f o r s t a c k ( v i r t a d d r i n r2 , p h y s a d d r i n r3 )
rsm p s r . i c
movl r17 =PAGE_KERNEL
;;
srlz. d
dep r18 =0 ,r3 ,0 ,1 2
;;
or r18 =r17 ,r18
dep r2 = - 1 ,r3 ,6 1 ,3 / / I M V A o f t a s k
;;
mov r17 =rr [ r2 ]
shr. u r16 =r3 ,I A 6 4 _ G R A N U L E _ S H I F T
;;
dep r17 =0 ,r17 ,8 ,2 4
;;
mov c r . i t i r =r17
mov c r . i f a =r2
mov r19 =IA64_TR_CURRENT_STACK
;;
itr. d d t r [ r19 ] =r18
;;
ssm p s r . i c
srlz. d
;;
.load_current :
/ / load t h e " c u r r e n t " p o i n t e r ( r13 ) a n d a r . k 6 w i t h t h e c u r r e n t t a s k
mov I A 6 4 _ K R ( C U R R E N T ) =r2 / / v i r t u a l a d d r e s s
mov I A 6 4 _ K R ( C U R R E N T _ S T A C K ) =r16
mov r13 =r2
/ *
2005-04-22 14:44:40 -07:00
* Reserve s p a c e a t t h e t o p o f t h e s t a c k f o r " s t r u c t p t _ r e g s " . K e r n e l
* threads d o n ' t s t o r e i n t e r e s t i n g v a l u e s i n t h a t s t r u c t u r e , b u t t h e s p a c e
* still n e e d s t o b e t h e r e b e c a u s e t i m e - c r i t i c a l s t u f f s u c h a s t h e c o n t e x t
* switching c a n b e i m p l e m e n t e d m o r e e f f i c i e n t l y ( f o r e x a m p l e , _ _ s w i t c h _ t o ( )
2005-04-16 15:20:36 -07:00
* always s e t s t h e p s r . d f h b i t o f t h e t a s k i t i s s w i t c h i n g t o ) .
* /
2005-04-22 14:44:40 -07:00
2005-04-16 15:20:36 -07:00
addl r12 =IA64_STK_OFFSET - I A 6 4 _ P T _ R E G S _ S I Z E - 1 6 ,r2
addl r2 =IA64_RBS_OFFSET ,r2 / / i n i t i a l i z e t h e R S E
mov a r . r s c =0 / / p l a c e R S E i n e n f o r c e d l a z y m o d e
;;
loadrs / / c l e a r t h e d i r t y p a r t i t i o n
2008-08-12 10:34:20 -07:00
movl r19 =__phys_per_cpu_start
mov r18 =PERCPU_PAGE_SIZE
;;
# ifndef C O N F I G _ S M P
add r19 =r19 ,r18
;;
# else
( isAP) b r . f e w 2 f
2008-09-29 16:39:19 -07:00
movl r20 =__cpu0_per_cpu
2008-08-12 10:34:20 -07:00
;;
shr. u r18 =r18 ,3
1 :
2008-09-29 16:39:19 -07:00
ld8 r21 = [ r19 ] ,8 ;;
st8 [ r20 ] =r21 ,8
2008-08-12 10:34:20 -07:00
adds r18 = - 1 ,r18 ;;
cmp4 . l t p7 ,p6 =0 ,r18
( p7 ) b r . c o n d . d p t k . f e w 1 b
2008-09-29 16:39:19 -07:00
mov r19 =r20
;;
2008-08-12 10:34:20 -07:00
2 :
# endif
tpa r19 =r19
;;
.pred .rel .mutex isBP,i s A P
( isBP) m o v I A 6 4 _ K R ( P E R _ C P U _ D A T A ) =r19 / / p e r - C P U b a s e f o r c p u 0
( isAP) m o v I A 6 4 _ K R ( P E R _ C P U _ D A T A ) =r0 / / c l e a r p h y s i c a l p e r - C P U b a s e
2005-04-16 15:20:36 -07:00
;;
mov a r . b s p s t o r e =r2 / / e s t a b l i s h t h e n e w R S E s t a c k
;;
mov a r . r s c =0x3 / / p l a c e R S E i n e a g e r m o d e
( isBP) d e p r28 = - 1 ,r28 ,6 1 ,3 / / m a k e a d d r e s s v i r t u a l
( isBP) m o v l r2 =ia64_boot_param
;;
( isBP) s t 8 [ r2 ] =r28 / / s a v e t h e a d d r e s s o f t h e b o o t p a r a m a r e a p a s s e d b y t h e b o o t l o a d e r
# ifdef C O N F I G _ S M P
( isAP) b r . c a l l . s p t k . m a n y r p =start_secondary
.ret0 :
( isAP) b r . c o n d . s p t k s e l f
# endif
/ / This i s e x e c u t e d b y t h e b o o t s t r a p p r o c e s s o r ( b s p ) o n l y :
# ifdef C O N F I G _ I A 6 4 _ F W _ E M U
/ / initialize P A L & S A L e m u l a t o r :
br. c a l l . s p t k . m a n y r p =sys_fw_init
.ret1 :
# endif
br. c a l l . s p t k . m a n y r p =start_kernel
.ret2 : addl r3 = @ltoff(halt_msg),gp
;;
alloc r2 =ar . p f s ,8 ,0 ,2 ,0
;;
ld8 o u t 0 = [ r3 ]
br. c a l l . s p t k . m a n y b0 =console_print
self : hint @pause
br. s p t k . m a n y s e l f / / e n d l e s s l o o p
END( _ s t a r t )
2007-07-20 14:39:24 -07:00
.text
2005-04-16 15:20:36 -07:00
GLOBAL_ E N T R Y ( i a64 _ s a v e _ d e b u g _ r e g s )
alloc r16 =ar . p f s ,1 ,0 ,0 ,0
mov r20 =ar . l c / / p r e s e r v e a r . l c
mov a r . l c =IA64_NUM_DBG_REGS - 1
mov r18 =0
add r19 =IA64_NUM_DBG_REGS * 8 ,i n 0
;;
1 : mov r16 =dbr [ r18 ]
# ifdef C O N F I G _ I T A N I U M
;;
srlz. d
# endif
mov r17 =ibr [ r18 ]
add r18 =1 ,r18
;;
st8 . n t a [ i n 0 ] =r16 ,8
st8 . n t a [ r19 ] =r17 ,8
br. c l o o p . s p t k . m a n y 1 b
;;
mov a r . l c =r20 / / r e s t o r e a r . l c
br. r e t . s p t k . m a n y r p
END( i a64 _ s a v e _ d e b u g _ r e g s )
GLOBAL_ E N T R Y ( i a64 _ l o a d _ d e b u g _ r e g s )
alloc r16 =ar . p f s ,1 ,0 ,0 ,0
lfetch. n t a [ i n 0 ]
mov r20 =ar . l c / / p r e s e r v e a r . l c
add r19 =IA64_NUM_DBG_REGS * 8 ,i n 0
mov a r . l c =IA64_NUM_DBG_REGS - 1
mov r18 = - 1
;;
1 : ld8 . n t a r16 = [ i n 0 ] ,8
ld8 . n t a r17 = [ r19 ] ,8
add r18 =1 ,r18
;;
mov d b r [ r18 ] =r16
# ifdef C O N F I G _ I T A N I U M
;;
srlz. d / / E r r a t a 1 3 2 ( N o F i x s t a t u s )
# endif
mov i b r [ r18 ] =r17
br. c l o o p . s p t k . m a n y 1 b
;;
mov a r . l c =r20 / / r e s t o r e a r . l c
br. r e t . s p t k . m a n y r p
END( i a64 _ l o a d _ d e b u g _ r e g s )
GLOBAL_ E N T R Y ( _ _ i a64 _ s a v e _ f p u )
alloc r2 =ar . p f s ,1 ,4 ,0 ,0
adds l o c0 =96 * 1 6 - 1 6 ,i n 0
adds l o c1 =96 * 1 6 - 1 6 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f127 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f119 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f111 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f103 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f95 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f87 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f79 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f71 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f63 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f55 ,- 2 5 6
adds l o c2 =96 * 1 6 - 3 2 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f47 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f39 ,- 2 5 6
adds l o c3 =96 * 1 6 - 3 2 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f126 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f118 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f110 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f102 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f94 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f86 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f78 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f70 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f62 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f54 ,- 2 5 6
adds l o c0 =96 * 1 6 - 4 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f46 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f38 ,- 2 5 6
adds l o c1 =96 * 1 6 - 4 8 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f125 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f117 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f109 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f101 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f93 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f85 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f77 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f69 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f61 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f53 ,- 2 5 6
adds l o c2 =96 * 1 6 - 6 4 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f45 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f37 ,- 2 5 6
adds l o c3 =96 * 1 6 - 6 4 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f124 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f116 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f108 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f100 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f92 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f84 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f76 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f68 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f60 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f52 ,- 2 5 6
adds l o c0 =96 * 1 6 - 8 0 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f44 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f36 ,- 2 5 6
adds l o c1 =96 * 1 6 - 8 0 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f123 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f115 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f107 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f99 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f91 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f83 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f75 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f67 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f59 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f51 ,- 2 5 6
adds l o c2 =96 * 1 6 - 9 6 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f43 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f35 ,- 2 5 6
adds l o c3 =96 * 1 6 - 9 6 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f122 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f114 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f106 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f98 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f90 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f82 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f74 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f66 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f58 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f50 ,- 2 5 6
adds l o c0 =96 * 1 6 - 1 1 2 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f42 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f34 ,- 2 5 6
adds l o c1 =96 * 1 6 - 1 1 2 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f121 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f113 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f105 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f97 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f89 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f81 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f73 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f65 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c0 ] =f57 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f49 ,- 2 5 6
adds l o c2 =96 * 1 6 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c0 ] =f41 ,- 2 5 6
stf. s p i l l . n t a [ l o c1 ] =f33 ,- 2 5 6
adds l o c3 =96 * 1 6 - 1 2 8 - 1 2 8 ,i n 0
;;
stf. s p i l l . n t a [ l o c2 ] =f120 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f112 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f104 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f96 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f88 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f80 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f72 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f64 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f56 ,- 2 5 6
stf. s p i l l . n t a [ l o c3 ] =f48 ,- 2 5 6
;;
stf. s p i l l . n t a [ l o c2 ] =f40
stf. s p i l l . n t a [ l o c3 ] =f32
br. r e t . s p t k . m a n y r p
END( _ _ i a64 _ s a v e _ f p u )
GLOBAL_ E N T R Y ( _ _ i a64 _ l o a d _ f p u )
alloc r2 =ar . p f s ,1 ,2 ,0 ,0
adds r3 =128 ,i n 0
adds r14 =256 ,i n 0
adds r15 =384 ,i n 0
mov l o c0 =512
mov l o c1 = - 1 0 2 4 + 1 6
;;
ldf. f i l l . n t a f32 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f40 = [ r3 ] ,l o c0
ldf. f i l l . n t a f48 = [ r14 ] ,l o c0
ldf. f i l l . n t a f56 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f64 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f72 = [ r3 ] ,l o c0
ldf. f i l l . n t a f80 = [ r14 ] ,l o c0
ldf. f i l l . n t a f88 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f96 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f10 4 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 2 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 0 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f33 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f41 = [ r3 ] ,l o c0
ldf. f i l l . n t a f49 = [ r14 ] ,l o c0
ldf. f i l l . n t a f57 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f65 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f73 = [ r3 ] ,l o c0
ldf. f i l l . n t a f81 = [ r14 ] ,l o c0
ldf. f i l l . n t a f89 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f97 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f10 5 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 3 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 1 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f34 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f42 = [ r3 ] ,l o c0
ldf. f i l l . n t a f50 = [ r14 ] ,l o c0
ldf. f i l l . n t a f58 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f66 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f74 = [ r3 ] ,l o c0
ldf. f i l l . n t a f82 = [ r14 ] ,l o c0
ldf. f i l l . n t a f90 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f98 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f10 6 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 4 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 2 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f35 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f43 = [ r3 ] ,l o c0
ldf. f i l l . n t a f51 = [ r14 ] ,l o c0
ldf. f i l l . n t a f59 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f67 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f75 = [ r3 ] ,l o c0
ldf. f i l l . n t a f83 = [ r14 ] ,l o c0
ldf. f i l l . n t a f91 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f99 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f10 7 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 5 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 3 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f36 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f44 = [ r3 ] ,l o c0
ldf. f i l l . n t a f52 = [ r14 ] ,l o c0
ldf. f i l l . n t a f60 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f68 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f76 = [ r3 ] ,l o c0
ldf. f i l l . n t a f84 = [ r14 ] ,l o c0
ldf. f i l l . n t a f92 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f10 0 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f10 8 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 6 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 4 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f37 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f45 = [ r3 ] ,l o c0
ldf. f i l l . n t a f53 = [ r14 ] ,l o c0
ldf. f i l l . n t a f61 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f69 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f77 = [ r3 ] ,l o c0
ldf. f i l l . n t a f85 = [ r14 ] ,l o c0
ldf. f i l l . n t a f93 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f10 1 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f10 9 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 7 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 5 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f38 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f46 = [ r3 ] ,l o c0
ldf. f i l l . n t a f54 = [ r14 ] ,l o c0
ldf. f i l l . n t a f62 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f70 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f78 = [ r3 ] ,l o c0
ldf. f i l l . n t a f86 = [ r14 ] ,l o c0
ldf. f i l l . n t a f94 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f10 2 = [ i n 0 ] ,l o c1
ldf. f i l l . n t a f11 0 = [ r3 ] ,l o c1
ldf. f i l l . n t a f11 8 = [ r14 ] ,l o c1
ldf. f i l l . n t a f12 6 = [ r15 ] ,l o c1
;;
ldf. f i l l . n t a f39 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f47 = [ r3 ] ,l o c0
ldf. f i l l . n t a f55 = [ r14 ] ,l o c0
ldf. f i l l . n t a f63 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f71 = [ i n 0 ] ,l o c0
ldf. f i l l . n t a f79 = [ r3 ] ,l o c0
ldf. f i l l . n t a f87 = [ r14 ] ,l o c0
ldf. f i l l . n t a f95 = [ r15 ] ,l o c0
;;
ldf. f i l l . n t a f10 3 = [ i n 0 ]
ldf. f i l l . n t a f11 1 = [ r3 ]
ldf. f i l l . n t a f11 9 = [ r14 ]
ldf. f i l l . n t a f12 7 = [ r15 ]
br. r e t . s p t k . m a n y r p
END( _ _ i a64 _ l o a d _ f p u )
GLOBAL_ E N T R Y ( _ _ i a64 _ i n i t _ f p u )
stf. s p i l l [ s p ] =f0 / / M 3
mov f32 =f0 / / F
nop. b 0
ldfps f33 ,f34 = [ s p ] / / M 0
ldfps f35 ,f36 = [ s p ] / / M 1
mov f37 =f0 / / F
;;
setf. s f38 =r0 / / M 2
setf. s f39 =r0 / / M 3
mov f40 =f0 / / F
ldfps f41 ,f42 = [ s p ] / / M 0
ldfps f43 ,f44 = [ s p ] / / M 1
mov f45 =f0 / / F
setf. s f46 =r0 / / M 2
setf. s f47 =r0 / / M 3
mov f48 =f0 / / F
ldfps f49 ,f50 = [ s p ] / / M 0
ldfps f51 ,f52 = [ s p ] / / M 1
mov f53 =f0 / / F
setf. s f54 =r0 / / M 2
setf. s f55 =r0 / / M 3
mov f56 =f0 / / F
ldfps f57 ,f58 = [ s p ] / / M 0
ldfps f59 ,f60 = [ s p ] / / M 1
mov f61 =f0 / / F
setf. s f62 =r0 / / M 2
setf. s f63 =r0 / / M 3
mov f64 =f0 / / F
ldfps f65 ,f66 = [ s p ] / / M 0
ldfps f67 ,f68 = [ s p ] / / M 1
mov f69 =f0 / / F
setf. s f70 =r0 / / M 2
setf. s f71 =r0 / / M 3
mov f72 =f0 / / F
ldfps f73 ,f74 = [ s p ] / / M 0
ldfps f75 ,f76 = [ s p ] / / M 1
mov f77 =f0 / / F
setf. s f78 =r0 / / M 2
setf. s f79 =r0 / / M 3
mov f80 =f0 / / F
ldfps f81 ,f82 = [ s p ] / / M 0
ldfps f83 ,f84 = [ s p ] / / M 1
mov f85 =f0 / / F
setf. s f86 =r0 / / M 2
setf. s f87 =r0 / / M 3
mov f88 =f0 / / F
/ *
* When t h e i n s t r u c t i o n s a r e c a c h e d , i t w o u l d b e f a s t e r t o i n i t i a l i z e
* the r e m a i n i n g r e g i s t e r s w i t h s i m p l y m o v i n s t r u c t i o n s ( F - u n i t ) .
* This g e t s t h e t i m e d o w n t o ~ 2 9 c y c l e s . H o w e v e r , t h i s w o u l d u s e u p
* 3 3 bundles, w h e r e a s c o n t i n u i n g w i t h t h e a b o v e p a t t e r n y i e l d s
* 1 0 bundles a n d ~ 3 0 c y c l e s .
* /
ldfps f89 ,f90 = [ s p ] / / M 0
ldfps f91 ,f92 = [ s p ] / / M 1
mov f93 =f0 / / F
setf. s f94 =r0 / / M 2
setf. s f95 =r0 / / M 3
mov f96 =f0 / / F
ldfps f97 ,f98 = [ s p ] / / M 0
ldfps f99 ,f10 0 = [ s p ] / / M 1
mov f10 1 =f0 / / F
setf. s f10 2 =r0 / / M 2
setf. s f10 3 =r0 / / M 3
mov f10 4 =f0 / / F
ldfps f10 5 ,f10 6 = [ s p ] / / M 0
ldfps f10 7 ,f10 8 = [ s p ] / / M 1
mov f10 9 =f0 / / F
setf. s f11 0 =r0 / / M 2
setf. s f11 1 =r0 / / M 3
mov f11 2 =f0 / / F
ldfps f11 3 ,f11 4 = [ s p ] / / M 0
ldfps f11 5 ,f11 6 = [ s p ] / / M 1
mov f11 7 =f0 / / F
setf. s f11 8 =r0 / / M 2
setf. s f11 9 =r0 / / M 3
mov f12 0 =f0 / / F
ldfps f12 1 ,f12 2 = [ s p ] / / M 0
ldfps f12 3 ,f12 4 = [ s p ] / / M 1
mov f12 5 =f0 / / F
setf. s f12 6 =r0 / / M 2
setf. s f12 7 =r0 / / M 3
br. r e t . s p t k . m a n y r p / / F
END( _ _ i a64 _ i n i t _ f p u )
/ *
* Switch e x e c u t i o n m o d e f r o m v i r t u a l t o p h y s i c a l
*
* Inputs :
* r1 6 = n e w p s r t o e s t a b l i s h
* Output :
* r1 9 = o l d v i r t u a l a d d r e s s o f a r . b s p
* r2 0 = o l d v i r t u a l a d d r e s s o f s p
*
* Note : RSE m u s t a l r e a d y b e i n e n f o r c e d l a z y m o d e
* /
GLOBAL_ E N T R Y ( i a64 _ s w i t c h _ m o d e _ p h y s )
{
rsm p s r . i | p s r . i c / / d i s a b l e i n t e r r u p t s a n d i n t e r r u p t c o l l e c t i o n
mov r15 =ip
}
;;
{
flushrs / / m u s t b e f i r s t i n s n i n g r o u p
srlz. i
}
;;
mov c r . i p s r =r16 / / s e t n e w P S R
add r3 =1f - i a64 _ s w i t c h _ m o d e _ p h y s ,r15
mov r19 =ar . b s p
mov r20 =sp
mov r14 =rp / / g e t r e t u r n a d d r e s s i n t o a g e n e r a l r e g i s t e r
;;
/ / going t o p h y s i c a l m o d e , u s e t p a t o t r a n s l a t e v i r t - > p h y s
tpa r17 =r19
tpa r3 =r3
tpa s p =sp
tpa r14 =r14
;;
mov r18 =ar . r n a t / / s a v e a r . r n a t
mov a r . b s p s t o r e =r17 / / t h i s s t e p s o n a r . r n a t
mov c r . i i p =r3
mov c r . i f s =r0
;;
mov a r . r n a t =r18 / / r e s t o r e a r . r n a t
rfi / / m u s t b e l a s t i n s n i n g r o u p
;;
1 : mov r p =r14
br. r e t . s p t k . m a n y r p
END( i a64 _ s w i t c h _ m o d e _ p h y s )
/ *
* Switch e x e c u t i o n m o d e f r o m p h y s i c a l t o v i r t u a l
*
* Inputs :
* r1 6 = n e w p s r t o e s t a b l i s h
* r1 9 = n e w b s p s t o r e t o e s t a b l i s h
* r2 0 = n e w s p t o e s t a b l i s h
*
* Note : RSE m u s t a l r e a d y b e i n e n f o r c e d l a z y m o d e
* /
GLOBAL_ E N T R Y ( i a64 _ s w i t c h _ m o d e _ v i r t )
{
rsm p s r . i | p s r . i c / / d i s a b l e i n t e r r u p t s a n d i n t e r r u p t c o l l e c t i o n
mov r15 =ip
}
;;
{
flushrs / / m u s t b e f i r s t i n s n i n g r o u p
srlz. i
}
;;
mov c r . i p s r =r16 / / s e t n e w P S R
add r3 =1f - i a64 _ s w i t c h _ m o d e _ v i r t ,r15
mov r14 =rp / / g e t r e t u r n a d d r e s s i n t o a g e n e r a l r e g i s t e r
;;
/ / going t o v i r t u a l
/ / - for c o d e a d d r e s s e s , s e t u p p e r b i t s o f a d d r t o K E R N E L _ S T A R T
/ / - for s t a c k a d d r e s s e s , c o p y f r o m i n p u t a r g u m e n t
movl r18 =KERNEL_START
dep r3 =0 ,r3 ,K E R N E L _ T R _ P A G E _ S H I F T ,6 4 - K E R N E L _ T R _ P A G E _ S H I F T
dep r14 =0 ,r14 ,K E R N E L _ T R _ P A G E _ S H I F T ,6 4 - K E R N E L _ T R _ P A G E _ S H I F T
mov s p =r20
;;
or r3 =r3 ,r18
or r14 =r14 ,r18
;;
mov r18 =ar . r n a t / / s a v e a r . r n a t
mov a r . b s p s t o r e =r19 / / t h i s s t e p s o n a r . r n a t
mov c r . i i p =r3
mov c r . i f s =r0
;;
mov a r . r n a t =r18 / / r e s t o r e a r . r n a t
rfi / / m u s t b e l a s t i n s n i n g r o u p
;;
1 : mov r p =r14
br. r e t . s p t k . m a n y r p
END( i a64 _ s w i t c h _ m o d e _ v i r t )
GLOBAL_ E N T R Y ( i a64 _ d e l a y _ l o o p )
.prologue
{ nop 0 / / w o r k a r o u n d G A S u n w i n d i n f o g e n e r a t i o n b u g . . .
.save ar. l c ,r2
mov r2 =ar . l c
.body
;;
mov a r . l c =r32
}
;;
/ / force l o o p t o b e 3 2 - b y t e a l i g n e d ( G A S b u g m e a n s w e c a n n o t u s e . a l i g n
/ / inside f u n c t i o n b o d y w i t h o u t c o r r u p t i n g u n w i n d i n f o ) .
{ nop 0 }
1 : br. c l o o p . s p t k . f e w 1 b
;;
mov a r . l c =r2
br. r e t . s p t k . m a n y r p
END( i a64 _ d e l a y _ l o o p )
/ *
* Return a C P U - l o c a l t i m e s t a m p i n n a n o - s e c o n d s . T h i s t i m e s t a m p i s
* NOT s y n c h r o n i z e d a c r o s s C P U s i t s r e t u r n v a l u e m u s t n e v e r b e
* compared a g a i n s t t h e v a l u e s r e t u r n e d o n a n o t h e r C P U . T h e u s a g e i n
2013-06-04 13:10:24 +05:30
* kernel/ s c h e d / c o r e . c e n s u r e s t h a t .
2005-04-16 15:20:36 -07:00
*
* The r e t u r n - v a l u e o f s c h e d _ c l o c k ( ) i s N O T s u p p o s e d t o w r a p - a r o u n d .
* If i t d i d , i t w o u l d c a u s e s o m e s c h e d u l i n g h i c c u p s ( a t t h e w o r s t ) .
* Fortunately, w i t h a 6 4 - b i t c y c l e - c o u n t e r t i c k i n g a t 1 0 0 G H z , e v e n
* that w o u l d h a p p e n o n l y o n c e e v e r y 5 + y e a r s .
*
* The c o d e b e l o w b a s i c a l l y c a l c u l a t e s :
*
* ( ia6 4 _ g e t _ i t c ( ) * l o c a l _ c p u _ d a t a - > n s e c _ p e r _ c y c ) > > I A 6 4 _ N S E C _ P E R _ C Y C _ S H I F T
*
* except t h a t t h e m u l t i p l i c a t i o n a n d t h e s h i f t a r e d o n e w i t h 1 2 8 - b i t
* intermediate p r e c i s i o n s o t h a t w e c a n p r o d u c e a f u l l 6 4 - b i t r e s u l t .
* /
2009-03-04 21:05:40 +09:00
GLOBAL_ E N T R Y ( i a64 _ n a t i v e _ s c h e d _ c l o c k )
2009-10-29 22:34:14 +09:00
addl r8 =THIS_CPU ( i a64 _ c p u _ i n f o ) + I A 6 4 _ C P U I N F O _ N S E C _ P E R _ C Y C _ O F F S E T ,r0
2005-04-16 15:20:36 -07:00
mov. m r9 =ar . i t c / / f e t c h c y c l e - c o u n t e r ( 3 5 c y c )
;;
ldf8 f8 = [ r8 ]
;;
setf. s i g f9 =r9 / / c e r t a i n t o s t a l l , s o i s s u e i t _ a f t e r _ l d f8 . . .
;;
xmpy. l u f10 =f9 ,f8 / / c a l c u l a t e l o w 6 4 b i t s o f 1 2 8 - b i t p r o d u c t ( 4 c y c )
xmpy. h u f11 =f9 ,f8 / / c a l c u l a t e h i g h 6 4 b i t s o f 1 2 8 - b i t p r o d u c t
;;
getf. s i g r8 =f10 / / ( 5 c y c )
getf. s i g r9 =f11
;;
shrp r8 =r9 ,r8 ,I A 6 4 _ N S E C _ P E R _ C Y C _ S H I F T
br. r e t . s p t k . m a n y r p
2009-03-04 21:05:40 +09:00
END( i a64 _ n a t i v e _ s c h e d _ c l o c k )
2005-04-16 15:20:36 -07:00
2012-07-25 07:56:04 +02:00
# ifdef C O N F I G _ V I R T _ C P U _ A C C O U N T I N G _ N A T I V E
2017-01-31 04:09:45 +01:00
GLOBAL_ E N T R Y ( c y c l e _ t o _ n s e c )
2008-01-29 14:27:30 +09:00
alloc r16 =ar . p f s ,1 ,0 ,0 ,0
2009-10-29 22:34:14 +09:00
addl r8 =THIS_CPU ( i a64 _ c p u _ i n f o ) + I A 6 4 _ C P U I N F O _ N S E C _ P E R _ C Y C _ O F F S E T ,r0
2008-01-29 14:27:30 +09:00
;;
ldf8 f8 = [ r8 ]
;;
setf. s i g f9 =r32
;;
xmpy. l u f10 =f9 ,f8 / / c a l c u l a t e l o w 6 4 b i t s o f 1 2 8 - b i t p r o d u c t ( 4 c y c )
xmpy. h u f11 =f9 ,f8 / / c a l c u l a t e h i g h 6 4 b i t s o f 1 2 8 - b i t p r o d u c t
;;
getf. s i g r8 =f10 / / ( 5 c y c )
getf. s i g r9 =f11
;;
shrp r8 =r9 ,r8 ,I A 6 4 _ N S E C _ P E R _ C Y C _ S H I F T
br. r e t . s p t k . m a n y r p
2017-01-31 04:09:45 +01:00
END( c y c l e _ t o _ n s e c )
2012-07-25 07:56:04 +02:00
# endif / * C O N F I G _ V I R T _ C P U _ A C C O U N T I N G _ N A T I V E * /
2008-01-29 14:27:30 +09:00
2005-04-16 15:20:36 -07:00
# ifdef C O N F I G _ I A 6 4 _ B R L _ E M U
/ *
* Assembly r o u t i n e s u s e d b y b r l _ e m u . c t o s e t p r e s e r v e d r e g i s t e r s t a t e .
* /
# define S E T _ R E G ( r e g ) \
GLOBAL_ E N T R Y ( i a64 _ s e t _ ## r e g ) ; \
alloc r16 =ar . p f s ,1 ,0 ,0 ,0 ; \
mov r e g =r32 ; \
;; \
br. r e t . s p t k . m a n y r p ; \
END( i a64 _ s e t _ ## r e g )
SET_ R E G ( b1 ) ;
SET_ R E G ( b2 ) ;
SET_ R E G ( b3 ) ;
SET_ R E G ( b4 ) ;
SET_ R E G ( b5 ) ;
# endif / * C O N F I G _ I A 6 4 _ B R L _ E M U * /
# ifdef C O N F I G _ S M P
2005-04-22 14:44:40 -07:00
# ifdef C O N F I G _ H O T P L U G _ C P U
GLOBAL_ E N T R Y ( i a64 _ j u m p _ t o _ s a l )
alloc r16 =ar . p f s ,1 ,0 ,0 ,0 ;;
rsm p s r . i | p s r . i c
{
flushrs
srlz. i
}
tpa r25 =in0
movl r18 =tlb_purge_done ;;
DATA_ V A _ T O _ P A ( r18 ) ;;
mov b1 =r18 / / R e t u r n l o c a t i o n
movl r18 =ia64_do_tlb_purge ;;
DATA_ V A _ T O _ P A ( r18 ) ;;
mov b2 =r18 / / d o i n g t l b _ f l u s h w o r k
mov a r . r s c =0 / / P u t R S E i n e n f o r c e d l a z y , L E m o d e
movl r17 =1f ;;
DATA_ V A _ T O _ P A ( r17 ) ;;
mov c r . i i p =r17
movl r16 =SAL_PSR_BITS_TO_SET ;;
mov c r . i p s r =r16
mov c r . i f s =r0 ;;
[IA64] kdump: Mask MCA/INIT on frozen cpus
Summary:
INIT asserted on kdump kernel invokes INIT handler not only on a
cpu that running on the kdump kernel, but also BSP of the panicked
kernel, because the (badly) frozen BSP can be thawed by INIT.
Description:
The kdump_cpu_freeze() is called on cpus except one that initiates
panic and/or kdump, to stop/offline the cpu (on ia64, it means we
pass control of cpus to SAL, or put them in spinloop). Note that
CPU0(BSP) always go to spinloop, so if panic was happened on an AP,
there are at least 2cpus (= the AP and BSP) which not back to SAL.
On the spinning cpus, interrupts are disabled (rsm psr.i), but INIT
is still interruptible because psr.mc for mask them is not set unless
kdump_cpu_freeze() is not called from MCA/INIT context.
Therefore, assume that a panic was happened on an AP, kdump was
invoked, new INIT handlers for kdump kernel was registered and then
an INIT is asserted. From the viewpoint of SAL, there are 2 online
cpus, so INIT will be delivered to both of them. It likely means
that not only the AP (= a cpu executing kdump) enters INIT handler
which is newly registered, but also BSP (= another cpu spinning in
panicked kernel) enters the same INIT handler. Of course setting of
registers in BSP are still old (for panicked kernel), so what happen
with running handler with wrong setting will be extremely unexpected.
I believe this is not desirable behavior.
How to Reproduce:
Start kdump on one of APs (e.g. cpu1)
# taskset 0x2 echo c > /proc/sysrq-trigger
Then assert INIT after kdump kernel is booted, after new INIT handler
for kdump kernel is registered.
Expected results:
An INIT handler is invoked only on the AP.
Actual results:
An INIT handler is invoked on the AP and BSP.
Sample of results:
I got following console log by asserting INIT after prompt "root:/>".
It seems that two monarchs appeared by one INIT, and one panicked at
last. And it also seems that the panicked one supposed there were
4 online cpus and no one did rendezvous:
:
[ 0 %]dropping to initramfs shell
exiting this shell will reboot your system
root:/> Entered OS INIT handler. PSP=fff301a0 cpu=0 monarch=0
ia64_init_handler: Promoting cpu 0 to monarch.
Delaying for 5 seconds...
All OS INIT slaves have reached rendezvous
Processes interrupted by INIT - 0 (cpu 0 task 0xa000000100af0000)
:
<<snip>>
:
Entered OS INIT handler. PSP=fff301a0 cpu=0 monarch=1
Delaying for 5 seconds...
mlogbuf_finish: printing switched to urgent mode, MCA/INIT might be dodgy or fail.
OS INIT slave did not rendezvous on cpu 1 2 3
INIT swapper 0[0]: bugcheck! 0 [1]
:
<<snip>>
:
Kernel panic - not syncing: Attempted to kill the idle task!
Proposed fix:
To avoid this problem, this patch inserts ia64_set_psr_mc() to mask
INIT on cpus going to be frozen. This masking have no effect if the
kdump_cpu_freeze() is called from INIT handler when kdump_on_init == 1,
because psr.mc is already turned on to 1 before entering OS_INIT.
I confirmed that weird log like above are disappeared after applying
this patch.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Haren Myneni <hbabu@us.ibm.com>
Cc: kexec@lists.infradead.org
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2009-08-06 14:51:56 -07:00
rfi;; // note: this unmask MCA/INIT (psr.mc)
2005-04-22 14:44:40 -07:00
1 :
/ *
* Invalidate a l l T L B d a t a / i n s t
* /
br. s p t k . m a n y b2 ;; // jump to tlb purge code
tlb_purge_done :
RESTORE_ R E G I O N _ R E G S ( r25 , r17 ,r18 ,r19 ) ;;
RESTORE_ R E G ( b0 , r25 , r17 ) ;;
RESTORE_ R E G ( b1 , r25 , r17 ) ;;
RESTORE_ R E G ( b2 , r25 , r17 ) ;;
RESTORE_ R E G ( b3 , r25 , r17 ) ;;
RESTORE_ R E G ( b4 , r25 , r17 ) ;;
RESTORE_ R E G ( b5 , r25 , r17 ) ;;
ld8 r1 = [ r25 ] ,0 x08 ;;
ld8 r12 = [ r25 ] ,0 x08 ;;
ld8 r13 = [ r25 ] ,0 x08 ;;
RESTORE_ R E G ( a r . f p s r , r25 , r17 ) ;;
RESTORE_ R E G ( a r . p f s , r25 , r17 ) ;;
RESTORE_ R E G ( a r . r n a t , r25 , r17 ) ;;
RESTORE_ R E G ( a r . u n a t , r25 , r17 ) ;;
RESTORE_ R E G ( a r . b s p s t o r e , r25 , r17 ) ;;
RESTORE_ R E G ( c r . d c r , r25 , r17 ) ;;
RESTORE_ R E G ( c r . i v a , r25 , r17 ) ;;
RESTORE_ R E G ( c r . p t a , r25 , r17 ) ;;
2007-12-12 16:28:52 +09:00
srlz. d ;; // required not to violate RAW dependency
2005-04-22 14:44:40 -07:00
RESTORE_ R E G ( c r . i t v , r25 , r17 ) ;;
RESTORE_ R E G ( c r . p m v , r25 , r17 ) ;;
RESTORE_ R E G ( c r . c m c v , r25 , r17 ) ;;
RESTORE_ R E G ( c r . l r r0 , r25 , r17 ) ;;
RESTORE_ R E G ( c r . l r r1 , r25 , r17 ) ;;
ld8 r4 = [ r25 ] ,0 x08 ;;
ld8 r5 = [ r25 ] ,0 x08 ;;
ld8 r6 = [ r25 ] ,0 x08 ;;
ld8 r7 = [ r25 ] ,0 x08 ;;
ld8 r17 = [ r25 ] ,0 x08 ;;
mov p r =r17 ,- 1 ;;
RESTORE_ R E G ( a r . l c , r25 , r17 ) ;;
/ *
* Now R e s t o r e f l o a t i n g p o i n t r e g s
* /
ldf. f i l l . n t a f2 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f3 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f4 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f5 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f16 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f17 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f18 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f19 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f20 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f21 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f22 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f23 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f24 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f25 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f26 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f27 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f28 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f29 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f30 = [ r25 ] ,1 6 ;;
ldf. f i l l . n t a f31 = [ r25 ] ,1 6 ;;
/ *
* Now t h a t w e h a v e d o n e a l l t h e r e g i s t e r r e s t o r e s
* we a r e n o w r e a d y f o r t h e b i g D I V E t o S A L L a n d
* /
ssm p s r . i c ;;
srlz. d ;;
br. r e t . s p t k . m a n y b0 ;;
END( i a64 _ j u m p _ t o _ s a l )
# endif / * C O N F I G _ H O T P L U G _ C P U * /
2005-04-16 15:20:36 -07:00
# endif / * C O N F I G _ S M P * /