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/*
* This file is subject to the terms and conditions of the GNU General Public
* License . See the file " COPYING " in the main directory of this archive
* for more details .
*
* Copyright ( C ) 2003 Ralf Baechle
*/
# ifndef _ASM_ASMMACRO_H
# define _ASM_ASMMACRO_H
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# include <asm/hazards.h>
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# ifdef CONFIG_32BIT
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# include <asm/asmmacro-32.h>
# endif
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# ifdef CONFIG_64BIT
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# include <asm/asmmacro-64.h>
# endif
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# ifdef CONFIG_MIPS_MT_SMTC
# include <asm/mipsmtregs.h>
# endif
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# ifdef CONFIG_MIPS_MT_SMTC
. macro local_irq_enable reg = t0
mfc0 \ reg , CP0_TCSTATUS
ori \ reg , \ reg , TCSTATUS_IXMT
xori \ reg , \ reg , TCSTATUS_IXMT
mtc0 \ reg , CP0_TCSTATUS
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_ehb
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. endm
. macro local_irq_disable reg = t0
mfc0 \ reg , CP0_TCSTATUS
ori \ reg , \ reg , TCSTATUS_IXMT
mtc0 \ reg , CP0_TCSTATUS
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_ehb
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. endm
# else
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. macro local_irq_enable reg = t0
mfc0 \ reg , CP0_STATUS
ori \ reg , \ reg , 1
mtc0 \ reg , CP0_STATUS
irq_enable_hazard
. endm
. macro local_irq_disable reg = t0
mfc0 \ reg , CP0_STATUS
ori \ reg , \ reg , 1
xori \ reg , \ reg , 1
mtc0 \ reg , CP0_STATUS
irq_disable_hazard
. endm
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# endif /* CONFIG_MIPS_MT_SMTC */
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# ifdef CONFIG_CPU_SB1
. macro fpu_enable_hazard
. set push
. set noreorder
. set mips2
SSNOP
bnezl $ 0 , . + 4
SSNOP
. set pop
. endm
# else
. macro fpu_enable_hazard
. endm
# endif
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/*
* Temporary until all gas have MT ASE support
*/
. macro DMT reg = 0
. word ( 0x41600bc1 | ( \ reg < < 16 ) )
. endm
. macro EMT reg = 0
. word ( 0x41600be1 | ( \ reg < < 16 ) )
. endm
. macro DVPE reg = 0
. word ( 0x41600001 | ( \ reg < < 16 ) )
. endm
. macro EVPE reg = 0
. word ( 0x41600021 | ( \ reg < < 16 ) )
. endm
. macro MFTR rt = 0 , rd = 0 , u = 0 , sel = 0
. word ( 0x41000000 | ( \ rt < < 16 ) | ( \ rd < < 11 ) | ( \ u < < 5 ) | ( \ sel ) )
. endm
. macro MTTR rt = 0 , rd = 0 , u = 0 , sel = 0
. word ( 0x41800000 | ( \ rt < < 16 ) | ( \ rd < < 11 ) | ( \ u < < 5 ) | ( \ sel ) )
. endm
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# endif /* _ASM_ASMMACRO_H */