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/*
* This file is subject to the terms and conditions of the GNU General Public
* License . See the file " COPYING " in the main directory of this archive
* for more details .
*
* Copyright ( C ) 1994 , 95 , 96 , 97 , 98 , 99 , 2000 , 2003 Ralf Baechle
* Copyright ( C ) 1999 , 2000 , 2001 Silicon Graphics , Inc .
*/
# ifndef _ASM_PGTABLE_64_H
# define _ASM_PGTABLE_64_H
# include <linux/linkage.h>
# include <asm/addrspace.h>
# include <asm/page.h>
# include <asm/cachectl.h>
[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option. This makes each module ~10% smaller.
* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
(revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)
New XTLB refill handler looks like this:
80000080 dmfc0 k0,C0_BADVADDR
80000084 bltz k0,800000e4 # goto l_module_alloc
80000088 lui k1,0x8046 # %high(pgd_current)
8000008c ld k1,24600(k1) # %low(pgd_current)
80000090 dsrl k0,k0,0x1b # l_vmalloc_done:
80000094 andi k0,k0,0x1ff8
80000098 daddu k1,k1,k0
8000009c dmfc0 k0,C0_BADVADDR
800000a0 ld k1,0(k1)
800000a4 dsrl k0,k0,0x12
800000a8 andi k0,k0,0xff8
800000ac daddu k1,k1,k0
800000b0 dmfc0 k0,C0_XCONTEXT
800000b4 ld k1,0(k1)
800000b8 andi k0,k0,0xff0
800000bc daddu k1,k1,k0
800000c0 ld k0,0(k1)
800000c4 ld k1,8(k1)
800000c8 dsrl k0,k0,0x6
800000cc mtc0 k0,C0_ENTRYLO0
800000d0 dsrl k1,k1,0x6
800000d4 mtc0 k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll k1,k0,0x2 # l_module_alloc:
800000e8 bgez k1,80000008 # goto l_vmalloc
800000ec lui k1,0xc000
800000f0 dsubu k0,k0,k1
800000f4 lui k1,0x8046 # %high(module_pg_dir)
800000f8 beq zero,zero,80000000
800000fc nop
80000000 beq zero,zero,80000090 # goto l_vmalloc_done
80000004 daddiu k1,k1,0x4000
80000008 dsll32 k1,k1,0x0 # l_vmalloc:
8000000c dsubu k0,k0,k1
80000010 beq zero,zero,80000090 # goto l_vmalloc_done
80000014 lui k1,0x8046 # %high(swapper_pg_dir)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-25 19:08:31 +04:00
# include <asm/fixmap.h>
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# include <asm-generic/pgtable-nopud.h>
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/*
* Each address space has 2 4 K pages as its page directory , giving 1024
* ( = = PTRS_PER_PGD ) 8 byte pointers to pmd tables . Each pmd table is a
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* single 4 K page , giving 512 ( = = PTRS_PER_PMD ) 8 byte pointers to page
* tables . Each page table is also a single 4 K page , giving 512 ( = =
* PTRS_PER_PTE ) 8 byte ptes . Each pud entry is initialized to point to
* invalid_pmd_table , each pmd entry is initialized to point to
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* invalid_pte_table , each pte is initialized to 0. When memory is low ,
* and a pmd table or a page table allocation fails , empty_bad_pmd_table
* and empty_bad_page_table is returned back to higher layer code , so
* that the failure is recognized later on . Linux does not seem to
* handle these failures very well though . The empty_bad_page_table has
* invalid pte entries in it , to force page faults .
*
* Kernel mappings : kernel mappings are held in the swapper_pg_table .
* The layout is identical to userspace except it ' s indexed with the
* fault address - VMALLOC_START .
*/
/* PMD_SHIFT determines the size of the area a second-level page table can map */
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# define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
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# define PMD_SIZE (1UL << PMD_SHIFT)
# define PMD_MASK (~(PMD_SIZE-1))
/* PGDIR_SHIFT determines what a third-level page table entry can map */
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# define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
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# define PGDIR_SIZE (1UL << PGDIR_SHIFT)
# define PGDIR_MASK (~(PGDIR_SIZE-1))
/*
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* For 4 kB page size we use a 3 level page tree and an 8 kB pud , which
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* permits us mapping 40 bits of virtual address space .
*
* We used to implement 41 bits by having an order 1 pmd level but that seemed
* rather pointless .
*
* For 8 kB page size we use a 3 level page tree which permits a total of
* 8 TB of address space . Alternatively a 33 - bit / 8 GB organization using
* two levels would be easy to implement .
*
* For 16 kB page size we use a 2 level page tree which permits a total of
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* 36 bits of virtual address space . We could add a third level but it seems
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* like at the moment there ' s no need for this .
*
* For 64 kB page size we use a 2 level page table tree for a total of 42 bits
* of virtual address space .
*/
# ifdef CONFIG_PAGE_SIZE_4KB
# define PGD_ORDER 1
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# define PUD_ORDER aieeee_attempt_to_allocate_pud
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# define PMD_ORDER 0
# define PTE_ORDER 0
# endif
# ifdef CONFIG_PAGE_SIZE_8KB
# define PGD_ORDER 0
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# define PUD_ORDER aieeee_attempt_to_allocate_pud
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# define PMD_ORDER 0
# define PTE_ORDER 0
# endif
# ifdef CONFIG_PAGE_SIZE_16KB
# define PGD_ORDER 0
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# define PUD_ORDER aieeee_attempt_to_allocate_pud
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# define PMD_ORDER 0
# define PTE_ORDER 0
# endif
# ifdef CONFIG_PAGE_SIZE_64KB
# define PGD_ORDER 0
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# define PUD_ORDER aieeee_attempt_to_allocate_pud
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# define PMD_ORDER 0
# define PTE_ORDER 0
# endif
# define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
# define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
# define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
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# if PGDIR_SIZE >= TASK_SIZE
# define USER_PTRS_PER_PGD (1)
# else
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# define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
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# endif
# define FIRST_USER_ADDRESS 0UL
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# define VMALLOC_START MAP_BASE
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# define VMALLOC_END \
( VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE )
[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option. This makes each module ~10% smaller.
* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
(revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)
New XTLB refill handler looks like this:
80000080 dmfc0 k0,C0_BADVADDR
80000084 bltz k0,800000e4 # goto l_module_alloc
80000088 lui k1,0x8046 # %high(pgd_current)
8000008c ld k1,24600(k1) # %low(pgd_current)
80000090 dsrl k0,k0,0x1b # l_vmalloc_done:
80000094 andi k0,k0,0x1ff8
80000098 daddu k1,k1,k0
8000009c dmfc0 k0,C0_BADVADDR
800000a0 ld k1,0(k1)
800000a4 dsrl k0,k0,0x12
800000a8 andi k0,k0,0xff8
800000ac daddu k1,k1,k0
800000b0 dmfc0 k0,C0_XCONTEXT
800000b4 ld k1,0(k1)
800000b8 andi k0,k0,0xff0
800000bc daddu k1,k1,k0
800000c0 ld k0,0(k1)
800000c4 ld k1,8(k1)
800000c8 dsrl k0,k0,0x6
800000cc mtc0 k0,C0_ENTRYLO0
800000d0 dsrl k1,k1,0x6
800000d4 mtc0 k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll k1,k0,0x2 # l_module_alloc:
800000e8 bgez k1,80000008 # goto l_vmalloc
800000ec lui k1,0xc000
800000f0 dsubu k0,k0,k1
800000f4 lui k1,0x8046 # %high(module_pg_dir)
800000f8 beq zero,zero,80000000
800000fc nop
80000000 beq zero,zero,80000090 # goto l_vmalloc_done
80000004 daddiu k1,k1,0x4000
80000008 dsll32 k1,k1,0x0 # l_vmalloc:
8000000c dsubu k0,k0,k1
80000010 beq zero,zero,80000090 # goto l_vmalloc_done
80000014 lui k1,0x8046 # %high(swapper_pg_dir)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-25 19:08:31 +04:00
# if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) && \
VMALLOC_START ! = CKSSEG
/* Load modules into 32bit-compatible segment. */
# define MODULE_START CKSSEG
# define MODULE_END (FIXADDR_START-2*PAGE_SIZE)
extern pgd_t module_pg_dir [ PTRS_PER_PGD ] ;
# endif
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# define pte_ERROR(e) \
printk ( " %s:%d: bad pte %016lx. \n " , __FILE__ , __LINE__ , pte_val ( e ) )
# define pmd_ERROR(e) \
printk ( " %s:%d: bad pmd %016lx. \n " , __FILE__ , __LINE__ , pmd_val ( e ) )
# define pgd_ERROR(e) \
printk ( " %s:%d: bad pgd %016lx. \n " , __FILE__ , __LINE__ , pgd_val ( e ) )
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extern pte_t invalid_pte_table [ PTRS_PER_PTE ] ;
extern pte_t empty_bad_page_table [ PTRS_PER_PTE ] ;
extern pmd_t invalid_pmd_table [ PTRS_PER_PMD ] ;
extern pmd_t empty_bad_pmd_table [ PTRS_PER_PMD ] ;
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/*
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* Empty pgd / pmd entries point to the invalid_pte_table .
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*/
static inline int pmd_none ( pmd_t pmd )
{
return pmd_val ( pmd ) = = ( unsigned long ) invalid_pte_table ;
}
# define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
static inline int pmd_present ( pmd_t pmd )
{
return pmd_val ( pmd ) ! = ( unsigned long ) invalid_pte_table ;
}
static inline void pmd_clear ( pmd_t * pmdp )
{
pmd_val ( * pmdp ) = ( ( unsigned long ) invalid_pte_table ) ;
}
/*
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* Empty pud entries point to the invalid_pmd_table .
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*/
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static inline int pud_none ( pud_t pud )
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{
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return pud_val ( pud ) = = ( unsigned long ) invalid_pmd_table ;
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}
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static inline int pud_bad ( pud_t pud )
{
return pud_val ( pud ) & ~ PAGE_MASK ;
}
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static inline int pud_present ( pud_t pud )
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{
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return pud_val ( pud ) ! = ( unsigned long ) invalid_pmd_table ;
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}
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static inline void pud_clear ( pud_t * pudp )
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{
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pud_val ( * pudp ) = ( ( unsigned long ) invalid_pmd_table ) ;
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}
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# define pte_page(x) pfn_to_page(pte_pfn(x))
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# ifdef CONFIG_CPU_VR41XX
# define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
# define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
# else
# define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
# define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
# endif
# define __pgd_offset(address) pgd_index(address)
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# define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
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# define __pmd_offset(address) pmd_index(address)
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/* to find an entry in a kernel page-table-directory */
[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option. This makes each module ~10% smaller.
* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
(revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)
New XTLB refill handler looks like this:
80000080 dmfc0 k0,C0_BADVADDR
80000084 bltz k0,800000e4 # goto l_module_alloc
80000088 lui k1,0x8046 # %high(pgd_current)
8000008c ld k1,24600(k1) # %low(pgd_current)
80000090 dsrl k0,k0,0x1b # l_vmalloc_done:
80000094 andi k0,k0,0x1ff8
80000098 daddu k1,k1,k0
8000009c dmfc0 k0,C0_BADVADDR
800000a0 ld k1,0(k1)
800000a4 dsrl k0,k0,0x12
800000a8 andi k0,k0,0xff8
800000ac daddu k1,k1,k0
800000b0 dmfc0 k0,C0_XCONTEXT
800000b4 ld k1,0(k1)
800000b8 andi k0,k0,0xff0
800000bc daddu k1,k1,k0
800000c0 ld k0,0(k1)
800000c4 ld k1,8(k1)
800000c8 dsrl k0,k0,0x6
800000cc mtc0 k0,C0_ENTRYLO0
800000d0 dsrl k1,k1,0x6
800000d4 mtc0 k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll k1,k0,0x2 # l_module_alloc:
800000e8 bgez k1,80000008 # goto l_vmalloc
800000ec lui k1,0xc000
800000f0 dsubu k0,k0,k1
800000f4 lui k1,0x8046 # %high(module_pg_dir)
800000f8 beq zero,zero,80000000
800000fc nop
80000000 beq zero,zero,80000090 # goto l_vmalloc_done
80000004 daddiu k1,k1,0x4000
80000008 dsll32 k1,k1,0x0 # l_vmalloc:
8000000c dsubu k0,k0,k1
80000010 beq zero,zero,80000090 # goto l_vmalloc_done
80000014 lui k1,0x8046 # %high(swapper_pg_dir)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-25 19:08:31 +04:00
# ifdef MODULE_START
# define pgd_offset_k(address) \
( ( address ) > = MODULE_START ? module_pg_dir : pgd_offset ( & init_mm , 0UL ) )
# else
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# define pgd_offset_k(address) pgd_offset(&init_mm, 0UL)
[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option. This makes each module ~10% smaller.
* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
(revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)
New XTLB refill handler looks like this:
80000080 dmfc0 k0,C0_BADVADDR
80000084 bltz k0,800000e4 # goto l_module_alloc
80000088 lui k1,0x8046 # %high(pgd_current)
8000008c ld k1,24600(k1) # %low(pgd_current)
80000090 dsrl k0,k0,0x1b # l_vmalloc_done:
80000094 andi k0,k0,0x1ff8
80000098 daddu k1,k1,k0
8000009c dmfc0 k0,C0_BADVADDR
800000a0 ld k1,0(k1)
800000a4 dsrl k0,k0,0x12
800000a8 andi k0,k0,0xff8
800000ac daddu k1,k1,k0
800000b0 dmfc0 k0,C0_XCONTEXT
800000b4 ld k1,0(k1)
800000b8 andi k0,k0,0xff0
800000bc daddu k1,k1,k0
800000c0 ld k0,0(k1)
800000c4 ld k1,8(k1)
800000c8 dsrl k0,k0,0x6
800000cc mtc0 k0,C0_ENTRYLO0
800000d0 dsrl k1,k1,0x6
800000d4 mtc0 k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll k1,k0,0x2 # l_module_alloc:
800000e8 bgez k1,80000008 # goto l_vmalloc
800000ec lui k1,0xc000
800000f0 dsubu k0,k0,k1
800000f4 lui k1,0x8046 # %high(module_pg_dir)
800000f8 beq zero,zero,80000000
800000fc nop
80000000 beq zero,zero,80000090 # goto l_vmalloc_done
80000004 daddiu k1,k1,0x4000
80000008 dsll32 k1,k1,0x0 # l_vmalloc:
8000000c dsubu k0,k0,k1
80000010 beq zero,zero,80000090 # goto l_vmalloc_done
80000014 lui k1,0x8046 # %high(swapper_pg_dir)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-25 19:08:31 +04:00
# endif
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# define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
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# define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
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/* to find an entry in a page-table-directory */
# define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
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static inline unsigned long pud_page_vaddr ( pud_t pud )
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{
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return pud_val ( pud ) ;
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}
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# define pud_phys(pud) virt_to_phys((void *)pud_val(pud))
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# define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
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/* Find an entry in the second-level page table.. */
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static inline pmd_t * pmd_offset ( pud_t * pud , unsigned long address )
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{
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return ( pmd_t * ) pud_page_vaddr ( * pud ) + pmd_index ( address ) ;
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}
/* Find an entry in the third-level page table.. */
# define __pte_offset(address) \
( ( ( address ) > > PAGE_SHIFT ) & ( PTRS_PER_PTE - 1 ) )
# define pte_offset(dir, address) \
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( ( pte_t * ) pmd_page_vaddr ( * ( dir ) ) + __pte_offset ( address ) )
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# define pte_offset_kernel(dir, address) \
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( ( pte_t * ) pmd_page_vaddr ( * ( dir ) ) + __pte_offset ( address ) )
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# define pte_offset_map(dir, address) \
( ( pte_t * ) page_address ( pmd_page ( * ( dir ) ) ) + __pte_offset ( address ) )
# define pte_offset_map_nested(dir, address) \
( ( pte_t * ) page_address ( pmd_page ( * ( dir ) ) ) + __pte_offset ( address ) )
# define pte_unmap(pte) ((void)(pte))
# define pte_unmap_nested(pte) ((void)(pte))
/*
* Initialize a new pgd / pmd table with invalid pointers .
*/
extern void pgd_init ( unsigned long page ) ;
extern void pmd_init ( unsigned long page , unsigned long pagetable ) ;
/*
* Non - present pages : high 24 bits are offset , next 8 bits type ,
* low 32 bits zero .
*/
static inline pte_t mk_swap_pte ( unsigned long type , unsigned long offset )
{ pte_t pte ; pte_val ( pte ) = ( type < < 32 ) | ( offset < < 40 ) ; return pte ; }
# define __swp_type(x) (((x).val >> 32) & 0xff)
# define __swp_offset(x) ((x).val >> 40)
# define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
# define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
# define __swp_entry_to_pte(x) ((pte_t) { (x).val })
/*
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* Bits 0 , 4 , 6 , and 7 are taken . Let ' s leave bits 1 , 2 , 3 , and 5 alone to
* make things easier , and only use the upper 56 bits for the page offset . . .
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*/
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# define PTE_FILE_MAX_BITS 56
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# define pte_to_pgoff(_pte) ((_pte).pte >> 8)
# define pgoff_to_pte(off) ((pte_t) { ((off) << 8) | _PAGE_FILE })
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# endif /* _ASM_PGTABLE_64_H */