2005-04-17 02:20:36 +04:00
/ * head. S : k e r n e l e n t r y p o i n t f o r F R - V k e r n e l
*
* Copyright ( C ) 2 0 0 3 , 2 0 0 4 R e d H a t , I n c . A l l R i g h t s R e s e r v e d .
* Written b y D a v i d H o w e l l s ( d h o w e l l s @redhat.com)
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
* /
# include < l i n u x / t h r e a d s . h >
# include < l i n u x / l i n k a g e . h >
2006-07-10 15:44:55 +04:00
# include < a s m / t h r e a d _ i n f o . h >
2005-04-17 02:20:36 +04:00
# include < a s m / p t r a c e . h >
# include < a s m / p a g e . h >
# include < a s m / s p r - r e g s . h >
# include < a s m / m b86 9 4 3 a . h >
# include < a s m / c a c h e . h >
# include " h e a d . i n c "
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# void _ b o o t ( u n s i g n e d l o n g m a g i c , c h a r * c o m m a n d _ l i n e ) _ _ a t t r i b u t e _ _ ( ( n o r e t u r n ) )
#
# - if m a g i c i s 0 x d e a d1 e a f , t h e n c o m m a n d _ l i n e i s a s s u m e d t o p o i n t t o t h e k e r n e l
# command l i n e s t r i n g
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.section .text .head , " ax"
.balign 4
.globl _ boot, _ _ h e a d _ r e f e r e n c e
.type _ boot,@function
_boot :
__head_reference :
sethi. p % h i ( L E D _ A D D R ) ,g r30
setlo % l o ( L E D _ A D D R ) ,g r30
LEDS 0 x00 0 0
# calculate r e f e r e n c e a d d r e s s f o r P C - r e l a t i v e s t u f f
call 0 f
0 : movsg l r ,g r26
addi g r26 ,#_ _ h e a d _ r e f e r e n c e - 0 b ,g r26
# invalidate a n d d i s a b l e b o t h o f t h e c a c h e s a n d t u r n o f f t h e m e m o r y a c c e s s c h e c k i n g
dcef @(gr0,gr0),1
bar
sethi. p % h i ( ~ ( H S R 0 _ I C E | H S R 0 _ D C E | H S R 0 _ C B M | H S R 0 _ E I M M U | H S R 0 _ E D M M U ) ) ,g r4
setlo % l o ( ~ ( H S R 0 _ I C E | H S R 0 _ D C E | H S R 0 _ C B M | H S R 0 _ E I M M U | H S R 0 _ E D M M U ) ) ,g r4
movsg h s r0 ,g r5
and g r4 ,g r5 ,g r5
movgs g r5 ,h s r0
movsg h s r0 ,g r5
LEDS 0 x00 0 1
icei @(gr0,gr0),1
dcei @(gr0,gr0),1
bar
# turn t h e i n s t r u c t i o n c a c h e b a c k o n
sethi. p % h i ( H S R 0 _ I C E ) ,g r4
setlo % l o ( H S R 0 _ I C E ) ,g r4
movsg h s r0 ,g r5
or g r4 ,g r5 ,g r5
movgs g r5 ,h s r0
movsg h s r0 ,g r5
bar
LEDS 0 x00 0 2
# retrieve t h e p a r a m e t e r s ( i n c l u d i n g c o m m a n d l i n e ) b e f o r e w e o v e r w r i t e t h e m
sethi. p % h i ( 0 x d e a d1 e a f ) ,g r7
setlo % l o ( 0 x d e a d1 e a f ) ,g r7
subcc g r7 ,g r8 ,g r0 ,i c c0
bne i c c0 ,#0 ,_ _ h e a d _ n o _ p a r a m e t e r s
sethi. p % h i ( r e d b o o t _ c o m m a n d _ l i n e - 1 ) ,g r6
setlo % l o ( r e d b o o t _ c o m m a n d _ l i n e - 1 ) ,g r6
sethi. p % h i ( _ _ h e a d _ r e f e r e n c e ) ,g r4
setlo % l o ( _ _ h e a d _ r e f e r e n c e ) ,g r4
sub g r6 ,g r4 ,g r6
add. p g r6 ,g r26 ,g r6
subi g r9 ,#1 ,g r9
setlos. p #511 ,g r4
setlos #1 ,g r5
__head_copy_cmdline :
ldubu. p @(gr9,gr5),gr16
subicc g r4 ,#1 ,g r4 ,i c c0
stbu. p g r16 ,@(gr6,gr5)
subicc g r16 ,#0 ,g r0 ,i c c1
bls i c c0 ,#0 ,_ _ h e a d _ e n d _ c m d l i n e
bne i c c1 ,#1 ,_ _ h e a d _ c o p y _ c m d l i n e
__head_end_cmdline :
stbu g r0 ,@(gr6,gr5)
__head_no_parameters :
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# we n e e d t o r e l o c a t e t h e S D R A M t o 0 x00 0 0 0 0 0 0 ( l i n u x ) o r 0 x C 0 0 0 0 0 0 0 ( u C l i n u x )
# - note t h a t w e ' r e g o i n g t o h a v e t o r u n e n t i r e l y o u t o f t h e i c a c h e w h i l s t
# fiddling w i t h t h e S D R A M c o n t r o l l e r r e g i s t e r s
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# ifdef C O N F I G _ M M U
call _ _ h e a d _ f r45 1 _ d e s c r i b e _ s d r a m
# else
movsg p s r ,g r5
srli g r5 ,#28 ,g r5
subicc g r5 ,#3 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ f r55 1 _ s d r a m
call _ _ h e a d _ f r40 1 _ d e s c r i b e _ s d r a m
bra _ _ h e a d _ d o _ s d r a m
__head_fr551_sdram :
call _ _ h e a d _ f r55 5 _ d e s c r i b e _ s d r a m
LEDS 0 x00 0 d
__head_do_sdram :
# endif
# preload t h e r e g i s t e r s w i t h i n v a l i d v a l u e s i n c a s e a n y D B R / D A R S a r e m a r k e d n o t p r e s e n t
sethi. p % h i ( 0 x f e 0 0 0 0 0 0 ) ,g r17 ; unused SDRAM DBR value
setlo % l o ( 0 x f e 0 0 0 0 0 0 ) ,g r17
or. p g r17 ,g r0 ,g r20
or g r17 ,g r0 ,g r21
or. p g r17 ,g r0 ,g r22
or g r17 ,g r0 ,g r23
# consult t h e S D R A M c o n t r o l l e r C S a d d r e s s r e g i s t e r s
cld @(gr14,gr0 ),gr20, cc0,#1 ; DBR0 / DARS0
cld @(gr14,gr11),gr21, cc1,#1 ; DBR1 / DARS1
cld @(gr14,gr12),gr22, cc2,#1 ; DBR2 / DARS2
cld. p @(gr14,gr13),gr23, cc3,#1 ; DBR3 / DARS3
sll g r20 ,g r15 ,g r20 ; shift values up for FR551
sll g r21 ,g r15 ,g r21
sll g r22 ,g r15 ,g r22
sll g r23 ,g r15 ,g r23
LEDS 0 x00 0 3
# assume t h e l o w e s t v a l i d C S l i n e t o b e t h e S D R A M b a s e a n d g e t i t s a d d r e s s
subcc g r20 ,g r17 ,g r0 ,i c c0
subcc. p g r21 ,g r17 ,g r0 ,i c c1
subcc g r22 ,g r17 ,g r0 ,i c c2
subcc. p g r23 ,g r17 ,g r0 ,i c c3
ckne i c c0 ,c c4 ; T if DBR0 != 0xfe000000
ckne i c c1 ,c c5
ckne i c c2 ,c c6
ckne i c c3 ,c c7
cor g r23 ,g r0 ,g r24 , c c7 ,#1 ; GR24 = SDRAM base
cor g r22 ,g r0 ,g r24 , c c6 ,#1
cor g r21 ,g r0 ,g r24 , c c5 ,#1
cor g r20 ,g r0 ,g r24 , c c4 ,#1
# calculate t h e d i s p l a c e m e n t r e q u i r e d t o g e t t h e S D R A M i n t o t h e r i g h t p l a c e i n m e m o r y
sethi. p % h i ( _ _ s d r a m _ b a s e ) ,g r16
setlo % l o ( _ _ s d r a m _ b a s e ) ,g r16
sub g r16 ,g r24 ,g r16 ; delta = __sdram_base - DBRx
# calculate t h e n e w v a l u e s t o g o i n t h e c o n t r o l l e r r e g s
cadd. p g r20 ,g r16 ,g r20 , c c4 ,#1 ; DCS#0 (new) = DCS#0 (old) + delta
cadd g r21 ,g r16 ,g r21 , c c5 ,#1
cadd. p g r22 ,g r16 ,g r22 , c c6 ,#1
cadd g r23 ,g r16 ,g r23 , c c7 ,#1
srl g r20 ,g r15 ,g r20 ; shift values down for FR551
srl g r21 ,g r15 ,g r21
srl g r22 ,g r15 ,g r22
srl g r23 ,g r15 ,g r23
# work o u t t h e a d d r e s s a t w h i c h t h e r e g u p d a t e r r e s i d e s a n d l o c k i t i n t o i c a c h e
# also w o r k o u t t h e a d d r e s s t h e u p d a t e r w i l l j u m p t o w h e n f i n i s h e d
sethi. p % h i ( _ _ h e a d _ m o v e _ s d r a m - _ _ h e a d _ r e f e r e n c e ) ,g r18
setlo % l o ( _ _ h e a d _ m o v e _ s d r a m - _ _ h e a d _ r e f e r e n c e ) ,g r18
sethi. p % h i ( _ _ h e a d _ s d r a m _ m o v e d - _ _ h e a d _ r e f e r e n c e ) ,g r19
setlo % l o ( _ _ h e a d _ s d r a m _ m o v e d - _ _ h e a d _ r e f e r e n c e ) ,g r19
add. p g r18 ,g r26 ,g r18
add g r19 ,g r26 ,g r19
add. p g r19 ,g r16 ,g r19 ; moved = addr + (__sdram_base - DBRx)
add g r18 ,g r5 ,g r4 ; two cachelines probably required
icpl g r18 ,g r0 ,#1 ; load and lock the cachelines
icpl g r4 ,g r0 ,#1
LEDS 0 x00 0 4
membar
bar
jmpl @(gr18,gr0)
.balign L1_CACHE_BYTES
__head_move_sdram :
cst g r20 ,@(gr14,gr0 ), cc4,#1
cst g r21 ,@(gr14,gr11), cc5,#1
cst g r22 ,@(gr14,gr12), cc6,#1
cst g r23 ,@(gr14,gr13), cc7,#1
cld @(gr14,gr0 ),gr20, cc4,#1
cld @(gr14,gr11),gr21, cc5,#1
cld @(gr14,gr12),gr22, cc4,#1
cld @(gr14,gr13),gr23, cc7,#1
bar
membar
jmpl @(gr19,gr0)
.balign L1_CACHE_BYTES
__head_sdram_moved :
icul g r18
add g r18 ,g r5 ,g r4
icul g r4
icei @(gr0,gr0),1
dcei @(gr0,gr0),1
LEDS 0 x00 0 5
# recalculate r e f e r e n c e a d d r e s s
call 0 f
0 : movsg l r ,g r26
addi g r26 ,#_ _ h e a d _ r e f e r e n c e - 0 b ,g r26
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# move t h e k e r n e l i m a g e d o w n t o t h e b o t t o m o f t h e S D R A M
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
sethi. p % h i ( _ _ k e r n e l _ i m a g e _ s i z e _ n o _ b s s + 1 5 ) ,g r4
setlo % l o ( _ _ k e r n e l _ i m a g e _ s i z e _ n o _ b s s + 1 5 ) ,g r4
srli. p g r4 ,#4 ,g r4 ; count
or g r26 ,g r26 ,g r16 ; source
sethi. p % h i ( _ _ s d r a m _ b a s e ) ,g r17 ; destination
setlo % l o ( _ _ s d r a m _ b a s e ) ,g r17
setlos #8 ,g r5
sub. p g r16 ,g r5 ,g r16 ; adjust src for LDDU
sub g r17 ,g r5 ,g r17 ; adjust dst for LDDU
sethi. p % h i ( _ _ h e a d _ m o v e _ k e r n e l - _ _ h e a d _ r e f e r e n c e ) ,g r18
setlo % l o ( _ _ h e a d _ m o v e _ k e r n e l - _ _ h e a d _ r e f e r e n c e ) ,g r18
sethi. p % h i ( _ _ h e a d _ k e r n e l _ m o v e d - _ _ h e a d _ r e f e r e n c e + _ _ s d r a m _ b a s e ) ,g r19
setlo % l o ( _ _ h e a d _ k e r n e l _ m o v e d - _ _ h e a d _ r e f e r e n c e + _ _ s d r a m _ b a s e ) ,g r19
add g r18 ,g r26 ,g r18
icpl g r18 ,g r0 ,#1
jmpl @(gr18,gr0)
.balign 32
__head_move_kernel :
lddu @(gr16,gr5),gr10
lddu @(gr16,gr5),gr12
stdu. p g r10 ,@(gr17,gr5)
subicc g r4 ,#1 ,g r4 ,i c c0
stdu. p g r12 ,@(gr17,gr5)
bhi i c c0 ,#0 ,_ _ h e a d _ m o v e _ k e r n e l
jmpl @(gr19,gr0)
.balign 32
__head_kernel_moved :
icul g r18
icei @(gr0,gr0),1
dcei @(gr0,gr0),1
LEDS 0 x00 0 6
# recalculate r e f e r e n c e a d d r e s s
call 0 f
0 : movsg l r ,g r26
addi g r26 ,#_ _ h e a d _ r e f e r e n c e - 0 b ,g r26
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# rearrange t h e i o m e m m a p a n d s e t t h e p r o t e c t i o n r e g i s t e r s
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# ifdef C O N F I G _ M M U
LEDS 0 x33 0 1
call _ _ h e a d _ f r45 1 _ s e t _ b u s c t l
LEDS 0 x33 0 3
call _ _ h e a d _ f r45 1 _ s u r v e y _ s d r a m
LEDS 0 x33 0 5
call _ _ h e a d _ f r45 1 _ s e t _ p r o t e c t i o n
# else
movsg p s r ,g r5
srli g r5 ,#P S R _ I M P L E _ S H I F T , g r 5
subicc g r5 ,#P S R _ I M P L E _ F R 551 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ f r55 5 _ m e m m a p
subicc g r5 ,#P S R _ I M P L E _ F R 451 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ f r45 1 _ m e m m a p
LEDS 0 x31 0 1
call _ _ h e a d _ f r40 1 _ s e t _ b u s c t l
LEDS 0 x31 0 3
call _ _ h e a d _ f r40 1 _ s u r v e y _ s d r a m
LEDS 0 x31 0 5
call _ _ h e a d _ f r40 1 _ s e t _ p r o t e c t i o n
bra _ _ h e a d _ d o n e _ m e m m a p
__head_fr451_memmap :
LEDS 0 x33 0 1
call _ _ h e a d _ f r40 1 _ s e t _ b u s c t l
LEDS 0 x33 0 3
call _ _ h e a d _ f r40 1 _ s u r v e y _ s d r a m
LEDS 0 x33 0 5
call _ _ h e a d _ f r45 1 _ s e t _ p r o t e c t i o n
bra _ _ h e a d _ d o n e _ m e m m a p
__head_fr555_memmap :
LEDS 0 x35 0 1
call _ _ h e a d _ f r55 5 _ s e t _ b u s c t l
LEDS 0 x35 0 3
call _ _ h e a d _ f r55 5 _ s u r v e y _ s d r a m
LEDS 0 x35 0 5
call _ _ h e a d _ f r55 5 _ s e t _ p r o t e c t i o n
__head_done_memmap :
# endif
LEDS 0 x00 0 7
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# turn t h e d a t a c a c h e a n d M M U o n
# - for t h e F R 4 5 1 t h i s ' l l m e a n t h a t t h e w i n d o w t h r o u g h w h i c h t h e k e r n e l i s
# viewed w i l l c h a n g e
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# ifdef C O N F I G _ M M U
# define M M U M O D E H S R 0 _ E I M M U | H S R 0 _ E D M M U | H S R 0 _ E X M M U | H S R 0 _ E D A T | H S R 0 _ X E D A T
# else
# define M M U M O D E H S R 0 _ E I M M U | H S R 0 _ E D M M U
# endif
movsg h s r0 ,g r5
sethi. p % h i ( M M U M O D E ) ,g r4
setlo % l o ( M M U M O D E ) ,g r4
or g r4 ,g r5 ,g r5
# if d e f i n e d ( C O N F I G _ F R V _ D E F L _ C A C H E _ W T H R U )
sethi. p % h i ( H S R 0 _ D C E | H S R 0 _ C B M _ W R I T E _ T H R U ) ,g r4
setlo % l o ( H S R 0 _ D C E | H S R 0 _ C B M _ W R I T E _ T H R U ) ,g r4
# elif d e f i n e d ( C O N F I G _ F R V _ D E F L _ C A C H E _ W B A C K )
sethi. p % h i ( H S R 0 _ D C E | H S R 0 _ C B M _ C O P Y _ B A C K ) ,g r4
setlo % l o ( H S R 0 _ D C E | H S R 0 _ C B M _ C O P Y _ B A C K ) ,g r4
# elif d e f i n e d ( C O N F I G _ F R V _ D E F L _ C A C H E _ W B E H I N D )
sethi. p % h i ( H S R 0 _ D C E | H S R 0 _ C B M _ C O P Y _ B A C K ) ,g r4
setlo % l o ( H S R 0 _ D C E | H S R 0 _ C B M _ C O P Y _ B A C K ) ,g r4
movsg p s r ,g r6
srli g r6 ,#24 ,g r6
cmpi g r6 ,#0x50 ,i c c0 / / F R 4 5 1
beq i c c0 ,#0 ,0 f
cmpi g r6 ,#0x40 ,i c c0 / / F R 4 0 5
bne i c c0 ,#0 ,1 f
0 :
# turn o f f w r i t e - a l l o c a t e
sethi. p % h i ( H S R 0 _ N W A ) ,g r6
setlo % l o ( H S R 0 _ N W A ) ,g r6
or g r4 ,g r6 ,g r4
1 :
# else
# error N o d e f a u l t c a c h e c o n f i g u r a t i o n s e t
# endif
or g r4 ,g r5 ,g r5
movgs g r5 ,h s r0
bar
LEDS 0 x00 0 8
sethi. p % h i ( _ _ h e a d _ m m u _ e n a b l e d ) ,g r19
setlo % l o ( _ _ h e a d _ m m u _ e n a b l e d ) ,g r19
jmpl @(gr19,gr0)
__head_mmu_enabled :
icei @(gr0,gr0),#1
dcei @(gr0,gr0),#1
LEDS 0 x00 0 9
# ifdef C O N F I G _ M M U
call _ _ h e a d _ f r45 1 _ f i n a l i s e _ p r o t e c t i o n
# endif
LEDS 0 x00 0 a
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# set u p t h e r u n t i m e e n v i r o n m e n t
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# clear t h e B S S a r e a
sethi. p % h i ( _ _ b s s _ s t a r t ) ,g r4
setlo % l o ( _ _ b s s _ s t a r t ) ,g r4
sethi. p % h i ( _ e n d ) ,g r5
setlo % l o ( _ e n d ) ,g r5
or. p g r0 ,g r0 ,g r18
or g r0 ,g r0 ,g r19
0 :
stdi g r18 ,@(gr4,#0)
stdi g r18 ,@(gr4,#8)
stdi g r18 ,@(gr4,#16)
stdi. p g r18 ,@(gr4,#24)
addi g r4 ,#24 ,g r4
subcc g r5 ,g r4 ,g r0 ,i c c0
bhi i c c0 ,#2 ,0 b
LEDS 0 x00 0 b
# save t h e S D R A M d e t a i l s
sethi. p % h i ( _ _ s d r a m _ o l d _ b a s e ) ,g r4
setlo % l o ( _ _ s d r a m _ o l d _ b a s e ) ,g r4
st g r24 ,@(gr4,gr0)
sethi. p % h i ( _ _ s d r a m _ b a s e ) ,g r5
setlo % l o ( _ _ s d r a m _ b a s e ) ,g r5
sethi. p % h i ( m e m o r y _ s t a r t ) ,g r4
setlo % l o ( m e m o r y _ s t a r t ) ,g r4
st g r5 ,@(gr4,gr0)
add g r25 ,g r5 ,g r25
sethi. p % h i ( m e m o r y _ e n d ) ,g r4
setlo % l o ( m e m o r y _ e n d ) ,g r4
st g r25 ,@(gr4,gr0)
# point t h e T B R a t t h e k e r n e l t r a p t a b l e
sethi. p % h i ( _ _ e n t r y _ k e r n e l t r a p _ t a b l e ) ,g r4
setlo % l o ( _ _ e n t r y _ k e r n e l t r a p _ t a b l e ) ,g r4
movgs g r4 ,t b r
# set u p t h e e x c e p t i o n f r a m e f o r i n i t
sethi. p % h i ( _ _ k e r n e l _ f r a m e 0 _ p t r ) ,g r28
setlo % l o ( _ _ k e r n e l _ f r a m e 0 _ p t r ) ,g r28
sethi. p % h i ( _ g p ) ,g r16
setlo % l o ( _ g p ) ,g r16
sethi. p % h i ( _ _ e n t r y _ u s e r t r a p _ t a b l e ) ,g r4
setlo % l o ( _ _ e n t r y _ u s e r t r a p _ t a b l e ) ,g r4
lddi @(gr28,#0),gr28 ; load __frame & current
ldi. p @(gr29,#4),gr15 ; set current_thread
or g r0 ,g r0 ,f p
or g r28 ,g r0 ,s p
sti. p g r4 ,@(gr28,REG_TBR)
setlos #I S R _ E D E | I S R _ D T T _ D I V B Y Z E R O | I S R _ E M A M _ E X C E P T I O N , g r 5
movgs g r5 ,i s r
# turn o n a n d o f f v a r i o u s C P U s e r v i c e s
movsg p s r ,g r22
sethi. p % h i ( #P S R _ E M | P S R _ E F | P S R _ C M | P S R _ N E M ) , g r 4
setlo % l o ( #P S R _ E M | P S R _ E F | P S R _ C M | P S R _ N E M ) , g r 4
or g r22 ,g r4 ,g r22
movgs g r22 ,p s r
andi g r22 ,#~ ( P S R _ P I L | P S R _ P S | P S R _ S ) , g r 22
ori g r22 ,#P S R _ E T , g r 22
sti g r22 ,@(gr28,REG_PSR)
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# set u p t h e r e g i s t e r s a n d j u m p i n t o t h e k e r n e l
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
LEDS 0 x00 0 c
# initialise t h e p r o c e s s o r a n d t h e p e r i p h e r a l s
# call S Y M B O L _ N A M E ( p r o c e s s o r _ i n i t )
# call S Y M B O L _ N A M E ( u n i t _ i n i t )
# LEDS 0 x0 a f f
sethi. p #0xe5e5 ,g r3
setlo #0xe5e5 ,g r3
or. p g r3 ,g r0 ,g r4
or g r3 ,g r0 ,g r5
or. p g r3 ,g r0 ,g r6
or g r3 ,g r0 ,g r7
or. p g r3 ,g r0 ,g r8
or g r3 ,g r0 ,g r9
or. p g r3 ,g r0 ,g r10
or g r3 ,g r0 ,g r11
or. p g r3 ,g r0 ,g r12
or g r3 ,g r0 ,g r13
or. p g r3 ,g r0 ,g r14
or g r3 ,g r0 ,g r17
or. p g r3 ,g r0 ,g r18
or g r3 ,g r0 ,g r19
or. p g r3 ,g r0 ,g r20
or g r3 ,g r0 ,g r21
or. p g r3 ,g r0 ,g r23
or g r3 ,g r0 ,g r24
or. p g r3 ,g r0 ,g r25
or g r3 ,g r0 ,g r26
or. p g r3 ,g r0 ,g r27
# or g r3 ,g r0 ,g r30
or g r3 ,g r0 ,g r31
movgs g r0 ,l r
movgs g r0 ,l c r
movgs g r0 ,c c r
movgs g r0 ,c c c r
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the
processor status register (PSR) are relatively slow and because we will
soon have the need to deal with multiple interrupt controls at the same
time (separate h/w and inter-core interrupts).
The way this is done is to dedicate one of the four integer condition code
registers (ICC2) to maintaining a virtual interrupt disablement state
whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate
whether the interrupts are virtually disabled and the ICC2.C flag (Carry)
to indicate whether the interrupts are physically disabled.
ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set
to indicate interrupts are physically enabled. Under normal running
conditions Z==0 and C==1.
Disabling interrupts with local_irq_disable() doesn't then actually
physically disable interrupts - it merely sets ICC2.Z to 1. Should an
interrupt then happen, the exception prologue will note ICC2.Z is set and
branch out of line using one instruction (an unlikely BEQ). Here it will
physically disable interrupts and clear ICC2.C.
When it comes time to enable interrupts (local_irq_enable()), this simply
clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are
clear (the HI integer condition). This can be done with the TIHI
conditional trap instruction.
The trap then physically reenables interrupts and sets ICC2.C again. Upon
returning the interrupt will be taken as interrupts will then be enabled.
Note that whilst processing the trap, the whole exceptions system is
disabled, and so an interrupt can't happen till it returns.
If no pending interrupt had happened, ICC2.C would still be set, the HI
condition would not be fulfilled, and no trap will happen.
Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z
flag out of the CCR register, shifting it down and masking it off. This
gives a result of 0 if interrupts were enabled and 1 if they weren't.
Restoring interrupts (local_irq_restore) is then a matter of taking the
saved value mentioned previously and XOR'ing it against 1. If it was one,
the result will be zero, and if it was zero the result will be non-zero.
This result is then used to affect the ICC2.Z flag directly (it is a
condition code flag after all). An XOR instruction does not affect the
Carry flag, and so that bit of state is unchanged. The two flags can then
be sampled to see if they're both zero using the trap (TIHI) as for the
unconditional reenablement (local_irq_enable).
This patch also:
(1) Modifies the debugging stub (break.S) to handle single-stepping crossing
into the trap #2 handler and into virtually disabled interrupts.
(2) Removes superseded fixup pointers from the second instructions in the trap
tables (there's no a separate fixup table for this).
(3) Declares the trap #3 vector for use in .org directives in the trap table.
(4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with
virtual interrupt handling, and removes the duplicate code that has now
been folded into irq_exit() (softirq and preemption handling).
(5) Tells the compiler in the arch Makefile that ICC2 is now reserved.
(6) Documents the in-kernel ABI, including the virtual interrupts.
(7) Renames the old irq management functions to different names.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 00:53:20 +03:00
# initialise t h e v i r t u a l i n t e r r u p t h a n d l i n g
subcc g r0 ,g r0 ,g r0 ,i c c2 / * s e t Z , c l e a r C * /
2005-04-17 02:20:36 +04:00
# ifdef C O N F I G _ M M U
movgs g r3 ,s c r2
movgs g r3 ,s c r3
# endif
LEDS 0 x0 f f f
# invoke t h e d e b u g g i n g s t u b i f p r e s e n t
# - arch/ f r v / k e r n e l / d e b u g - s t u b . c w i l l s h i f t c o n t r o l d i r e c t l y t o i n i t / m a i n . c
# ( it w i l l n o t r e t u r n h e r e )
break
.globl __debug_stub_init_break
__debug_stub_init_break :
# however, i f y o u n e e d t o u s e a n I C E , a n d d o n ' t c a r e a b o u t u s i n g a n y u s e r s p a c e
# debugging t o o l s ( s u c h a s t h e p t r a c e s y s c a l l ) , y o u c a n j u s t s t e p o v e r t h e b r e a k
# above a n d g e t t o t h e k e r n e l t h i s w a y
# look a t a r c h / f r v / k e r n e l / d e b u g - s t u b . c : d e b u g _ s t u b _ i n i t ( ) t o s e e w h a t y o u ' v e m i s s e d
call s t a r t _ k e r n e l
.globl __head_end
__head_end :
.size _ boot, . - _ b o o t
# provide a p o i n t f o r G D B t o p l a c e a b r e a k
.section .text .start , " ax"
.globl _start
.balign 4
_start :
call _ b o o t
.previous
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# split a t i l e o f f o f t h e r e g i o n d e f i n e d b y G R 8 - G R 9
#
# ENTRY : EXIT :
# GR4 - I A M P R v a l u e r e p r e s e n t i n g t i l e
# GR5 - D A M P R v a l u e r e p r e s e n t i n g t i l e
# GR6 - I A M L R v a l u e r e p r e s e n t i n g t i l e
# GR7 - D A M L R v a l u e r e p r e s e n t i n g t i l e
# GR8 r e g i o n b a s e p o i n t e r [ s a v e d ]
# GR9 r e g i o n t o p p o i n t e r u p d a t e d t o e x c l u d e n e w t i l e
# GR1 1 x A M L R m a s k [ s a v e d ]
# GR2 5 S D R A M s i z e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
#
# - GR8 a n d G R 9 s h o u l d b e r o u n d e d u p / d o w n t o t h e n e a r e s t m e g a b y t e b e f o r e c a l l i n g
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_split_region
.type _ _ head_ s p l i t _ r e g i o n ,@function
__head_split_region :
subcc. p g r9 ,g r8 ,g r4 ,i c c0
setlos #31 ,g r5
scan. p g r4 ,g r0 ,g r6
beq i c c0 ,#0 ,_ _ h e a d _ r e g i o n _ e m p t y
sub. p g r5 ,g r6 ,g r6 ; bit number of highest set bit (1MB=>20)
setlos #1 ,g r4
sll. p g r4 ,g r6 ,g r4 ; size of region (1 << bitno)
subi g r6 ,#17 ,g r6 ; 1MB => 0x03
slli. p g r6 ,#4 ,g r6 ; 1MB => 0x30
sub g r9 ,g r4 ,g r9 ; move uncovered top down
or g r9 ,g r6 ,g r4
ori g r4 ,#x A M P R x _ S _ U S E R | x A M P R x _ C _ C A C H E D | x A M P R x _ V , g r 4
or. p g r4 ,g r0 ,g r5
and g r4 ,g r11 ,g r6
and. p g r5 ,g r11 ,g r7
bralr
__head_region_empty :
or. p g r0 ,g r0 ,g r4
or g r0 ,g r0 ,g r5
or. p g r0 ,g r0 ,g r6
or g r0 ,g r0 ,g r7
bralr
.size _ _ head_ s p l i t _ r e g i o n , . - _ _ h e a d _ s p l i t _ r e g i o n
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# write t h e 3 2 - b i t h e x n u m b e r i n G R 8 t o t t y S 0
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# if 0
.globl __head_write_to_ttyS0
.type _ _ head_ w r i t e _ t o _ t t y S 0 ,@function
__head_write_to_ttyS0 :
sethi. p % h i ( 0 x f e f f9 c00 ) ,g r31
setlo % l o ( 0 x f e f f9 c00 ) ,g r31
setlos #8 ,g r20
0 : ldubi @(gr31,#5*8),gr21
andi g r21 ,#0x60 ,g r21
subicc g r21 ,#0x60 ,g r21 ,i c c0
bne i c c0 ,#0 ,0 b
1 : srli g r8 ,#28 ,g r21
slli g r8 ,#4 ,g r8
addi g r21 ,#' 0 ' ,g r21
subicc g r21 ,#' 9 ' ,g r0 ,i c c0
bls i c c0 ,#2 ,2 f
addi g r21 ,#' A ' - ' 0 ' - 1 0 ,g r21
2 :
stbi g r21 ,@(gr31,#0*8)
subicc g r20 ,#1 ,g r20 ,i c c0
bhi i c c0 ,#2 ,1 b
setlos #' \r ' ,g r21
stbi g r21 ,@(gr31,#0*8)
setlos #' \n ' ,g r21
stbi g r21 ,@(gr31,#0*8)
3 : ldubi @(gr31,#5*8),gr21
andi g r21 ,#0x60 ,g r21
subicc g r21 ,#0x60 ,g r21 ,i c c0
bne i c c0 ,#0 ,3 b
bralr
.size _ _ head_ w r i t e _ t o _ t t y S 0 , . - _ _ h e a d _ w r i t e _ t o _ t t y S 0
# endif
