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# ifndef __MACH_IMX_CLK_H
# define __MACH_IMX_CLK_H
# include <linux/spinlock.h>
# include <linux/clk-provider.h>
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extern spinlock_t imx_ccm_lock ;
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void imx_check_clocks ( struct clk * clks [ ] , unsigned int count ) ;
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extern void imx_cscmr1_fixup ( u32 * val ) ;
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enum imx_pllv1_type {
IMX_PLLV1_IMX1 ,
IMX_PLLV1_IMX21 ,
IMX_PLLV1_IMX25 ,
IMX_PLLV1_IMX27 ,
IMX_PLLV1_IMX31 ,
IMX_PLLV1_IMX35 ,
} ;
struct clk * imx_clk_pllv1 ( enum imx_pllv1_type type , const char * name ,
const char * parent , void __iomem * base ) ;
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struct clk * imx_clk_pllv2 ( const char * name , const char * parent ,
void __iomem * base ) ;
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enum imx_pllv3_type {
IMX_PLLV3_GENERIC ,
IMX_PLLV3_SYS ,
IMX_PLLV3_USB ,
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IMX_PLLV3_USB_VF610 ,
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IMX_PLLV3_AV ,
IMX_PLLV3_ENET ,
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IMX_PLLV3_ENET_IMX7 ,
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} ;
struct clk * imx_clk_pllv3 ( enum imx_pllv3_type type , const char * name ,
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const char * parent_name , void __iomem * base , u32 div_mask ) ;
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struct clk * clk_register_gate2 ( struct device * dev , const char * name ,
const char * parent_name , unsigned long flags ,
void __iomem * reg , u8 bit_idx ,
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u8 clk_gate_flags , spinlock_t * lock ,
unsigned int * share_count ) ;
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struct clk * imx_obtain_fixed_clock (
const char * name , unsigned long rate ) ;
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struct clk * imx_clk_gate_exclusive ( const char * name , const char * parent ,
void __iomem * reg , u8 shift , u32 exclusive_mask ) ;
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static inline struct clk * imx_clk_gate2 ( const char * name , const char * parent ,
void __iomem * reg , u8 shift )
{
return clk_register_gate2 ( NULL , name , parent , CLK_SET_RATE_PARENT , reg ,
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shift , 0 , & imx_ccm_lock , NULL ) ;
}
static inline struct clk * imx_clk_gate2_shared ( const char * name ,
const char * parent , void __iomem * reg , u8 shift ,
unsigned int * share_count )
{
return clk_register_gate2 ( NULL , name , parent , CLK_SET_RATE_PARENT , reg ,
shift , 0 , & imx_ccm_lock , share_count ) ;
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}
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struct clk * imx_clk_pfd ( const char * name , const char * parent_name ,
void __iomem * reg , u8 idx ) ;
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struct clk * imx_clk_busy_divider ( const char * name , const char * parent_name ,
void __iomem * reg , u8 shift , u8 width ,
void __iomem * busy_reg , u8 busy_shift ) ;
struct clk * imx_clk_busy_mux ( const char * name , void __iomem * reg , u8 shift ,
u8 width , void __iomem * busy_reg , u8 busy_shift ,
const char * * parent_names , int num_parents ) ;
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struct clk * imx_clk_fixup_divider ( const char * name , const char * parent ,
void __iomem * reg , u8 shift , u8 width ,
void ( * fixup ) ( u32 * val ) ) ;
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struct clk * imx_clk_fixup_mux ( const char * name , void __iomem * reg ,
u8 shift , u8 width , const char * * parents ,
int num_parents , void ( * fixup ) ( u32 * val ) ) ;
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static inline struct clk * imx_clk_fixed ( const char * name , int rate )
{
return clk_register_fixed_rate ( NULL , name , NULL , CLK_IS_ROOT , rate ) ;
}
static inline struct clk * imx_clk_divider ( const char * name , const char * parent ,
void __iomem * reg , u8 shift , u8 width )
{
return clk_register_divider ( NULL , name , parent , CLK_SET_RATE_PARENT ,
reg , shift , width , 0 , & imx_ccm_lock ) ;
}
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static inline struct clk * imx_clk_divider_flags ( const char * name ,
const char * parent , void __iomem * reg , u8 shift , u8 width ,
unsigned long flags )
{
return clk_register_divider ( NULL , name , parent , flags ,
reg , shift , width , 0 , & imx_ccm_lock ) ;
}
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static inline struct clk * imx_clk_gate ( const char * name , const char * parent ,
void __iomem * reg , u8 shift )
{
return clk_register_gate ( NULL , name , parent , CLK_SET_RATE_PARENT , reg ,
shift , 0 , & imx_ccm_lock ) ;
}
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static inline struct clk * imx_clk_gate_dis ( const char * name , const char * parent ,
void __iomem * reg , u8 shift )
{
return clk_register_gate ( NULL , name , parent , CLK_SET_RATE_PARENT , reg ,
shift , CLK_GATE_SET_TO_DISABLE , & imx_ccm_lock ) ;
}
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static inline struct clk * imx_clk_mux ( const char * name , void __iomem * reg ,
u8 shift , u8 width , const char * * parents , int num_parents )
{
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return clk_register_mux ( NULL , name , parents , num_parents ,
CLK_SET_RATE_NO_REPARENT , reg , shift ,
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width , 0 , & imx_ccm_lock ) ;
}
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static inline struct clk * imx_clk_mux_flags ( const char * name ,
void __iomem * reg , u8 shift , u8 width , const char * * parents ,
int num_parents , unsigned long flags )
{
return clk_register_mux ( NULL , name , parents , num_parents ,
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flags | CLK_SET_RATE_NO_REPARENT , reg , shift , width , 0 ,
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& imx_ccm_lock ) ;
}
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static inline struct clk * imx_clk_fixed_factor ( const char * name ,
const char * parent , unsigned int mult , unsigned int div )
{
return clk_register_fixed_factor ( NULL , name , parent ,
CLK_SET_RATE_PARENT , mult , div ) ;
}
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struct clk * imx_clk_cpu ( const char * name , const char * parent_name ,
struct clk * div , struct clk * mux , struct clk * pll ,
struct clk * step ) ;
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# endif