linux/drivers/gpu/drm/meson/Makefile

# SPDX-License-Identifier: GPL-2.0-only
meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_encoder_cvbs.o
meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_overlay.o
meson-drm-y += meson_rdma.o meson_osd_afbcd.o
meson-drm-y += meson_encoder_hdmi.o

obj-$(CONFIG_DRM_MESON) += meson-drm.o
obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o
treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2019-05-19 15:07:45 +03:00			`# SPDX-License-Identifier: GPL-2.0-only`
drm/meson: rename venc_cvbs to encoder_cvbs Rename the cvbs encoder to match the newly introduced meson_encoder_hdmi. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211020123947.2585572-6-narmstrong@baylibre.com 2021-10-20 15:39:46 +03:00			`meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_encoder_cvbs.o`
drm/meson: exclusively use the canvas provider module Now that the DMC register range is no longer in the bindings, remove any mention towards it and exclusively use the meson-canvas module. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190311105144.7276-3-mjourdan@baylibre.com 2019-03-11 13:51:44 +03:00			`meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_overlay.o`
drm/meson: Add AFBCD module driver This adds the driver for the ARM Framebuffer Compression decoders found in the Amlogic GXM and G12A SoCs. The Amlogic GXM and G12A AFBC decoder are totally different, the GXM only handling only the AFBC v1.0 modes and the G12A decoder handling the AFBC v1.2 modes. The G12A AFBC decoder is an external IP integrated in the video pipeline, and the GXM AFBC decoder seems to the an Amlogic custom decoder more tighly integrated in the video pipeline. The GXM AFBC decoder can handle only one AFBC plane for 2 available OSD planes available in HW, and the G12A AFBC decoder can handle up to 4 AFBC planes for up to 3 OSD planes available in HW. The Amlogic GXM supports 16x16 SPARSE and 16x16 SPLIT AFBC buffers up to 4k. On the other side, for G12A SPLIT is mandatory in 16x16 block mode, but for 4k modes 32x8+SPLIT AFBC buffers is manadatory for performances reasons. The RDMA is used here to reset and program the AFBC decoder unit on each vsync without involving the interrupt handler that can be masked for a long period of time, producing display glitches. For this we use the meson_rdma_writel_sync() which adds the register write tuple (VPU register offset and register value) to the RDMA buffer and write the value to the HW. When enabled, the RDMA is enabled to rewrite the same sequence at the next VSYNC event, until a new buffer is committed to the OSD plane. Then the Amlogic G12A is switched to RDMA, the Amlogic GXM Decoder doesn't need a reset/reprogram at each vsync, but needs to keep the vsync interrupt enabled to trigger the RDMA module. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> [narmstrong: fixed typo in commit log] Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-6-narmstrong@baylibre.com 2019-10-21 12:15:05 +03:00			`meson-drm-y += meson_rdma.o meson_osd_afbcd.o`
drm/meson: split out encoder from meson_dw_hdmi This moves all the non-DW-HDMI code where it should be: an encoder in the drm/meson core driver. The bridge functions are copied as-is, except: - the encoder init uses the simple kms helper - the mode_set has been moved to atomic_enable() - debug prints are converted to dev_debg() For now the bridge attach flags is 0, DRM_BRIDGE_ATTACH_NO_CONNECTOR will be handled later. The meson dw-hdmi glue is slightly fixed to live without the encoder in the same driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [narmstrong: fixed warning because missing meson_encoder_hdmi.h include] Link: https://patchwork.freedesktop.org/patch/msgid/20211020123947.2585572-4-narmstrong@baylibre.com 2021-10-20 15:39:44 +03:00			`meson-drm-y += meson_encoder_hdmi.o`
drm: Add support for Amlogic Meson Graphic Controller The Amlogic Meson Display controller is composed of several components : DMC\|---------------VPU (Video Processing Unit)----------------\|------HHI------\| \| vd1 _______ _____________ _________________ \| \| D \|-------\| \|----\| \| \| \| \| HDMI PLL \| D \| vd2 \| VIU \| \| Video Post \| \| Video Encoders \|<---\|-----VCLK \| R \|-------\| \|----\| Processing \| \| \| \| \| \| osd2 \| \| \| \|---\| Enci ----------\|----\|-----VDAC------\| R \|-------\| CSC \|----\| Scalers \| \| Encp ----------\|----\|----HDMI-TX----\| A \| osd1 \| \| \| Blenders \| \| Encl ----------\|----\|---------------\| M \|-------\|______\|----\|____________\| \|________________\| \| \| ___\|__________________________________________________________\|_______________\| VIU: Video Input Unit --------------------- The Video Input Unit is in charge of the pixel scanout from the DDR memory. It fetches the frames addresses, stride and parameters from the "Canvas" memory. This part is also in charge of the CSC (Colorspace Conversion). It can handle 2 OSD Planes and 2 Video Planes. VPP: Video Post Processing -------------------------- The Video Post Processing is in charge of the scaling and blending of the various planes into a single pixel stream. There is a special "pre-blending" used by the video planes with a dedicated scaler and a "post-blending" to merge with the OSD Planes. The OSD planes also have a dedicated scaler for one of the OSD. VENC: Video Encoders -------------------- The VENC is composed of the multiple pixel encoders : - ENCI : Interlace Video encoder for CVBS and Interlace HDMI - ENCP : Progressive Video Encoder for HDMI - ENCL : LCD LVDS Encoder The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock tree and provides the scanout clock to the VPP and VIU. The ENCI is connected to a single VDAC for Composite Output. The ENCI and ENCP are connected to an on-chip HDMI Transceiver. This driver is a DRM/KMS driver using the following DRM components : - GEM-CMA - PRIME-CMA - Atomic Modesetting - FBDev-CMA For the following SoCs : - GXBB Family (S905) - GXL Family (S905X, S905D) - GXM Family (S912) The current driver only supports the CVBS PAL/NTSC output modes, but the CRTC/Planes management should support bigger modes. But Advanced Colorspace Conversion, Scaling and HDMI Modes will be added in a second time. The Device Tree bindings makes use of the endpoints video interface definitions to connect to the optional CVBS and in the future the HDMI Connector nodes. HDMI Support is planned for a next release. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 2016-11-10 17:29:37 +03:00
drm: meson: rename module name to meson-drm The module is currently named "meson.ko" which can lead to some confusion, this patches renames it "meson-drm.ko" Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486028864-19622-2-git-send-email-narmstrong@baylibre.com 2017-02-02 12:47:43 +03:00			`obj-$(CONFIG_DRM_MESON) += meson-drm.o`
drm/meson: Add support for HDMI encoder and DW-HDMI bridge + PHY The Amlogic Meson GXBB/GXL/GXM SoCs embeds a Synopsys DesignWare HDMI TX Controller with a custom Bridge + PHY around the Controller. This driver makes uses of all the custom PHY plat data callbacks and enables the compatible HDMI modes to be configured as a drm_encoder instance. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 2017-04-04 15:15:27 +03:00			`obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o`