2018-11-05 21:27:27 +01:00
// SPDX-License-Identifier: GPL-2.0+
2014-09-04 16:45:56 -05:00
/*
2015-03-09 22:57:04 -05:00
* Copyright (C) 2015 Altera Corporation <www.altera.com>
2014-09-04 16:45:56 -05:00
*/
#include "socfpga_arria10.dtsi"
/ {
model = "Altera SOCFPGA Arria 10";
compatible = "altr,socfpga-arria10", "altr,socfpga";
2016-05-03 08:59:01 -05:00
aliases {
ethernet0 = &gmac0;
2016-05-12 10:24:42 -07:00
serial0 = &uart1;
2016-05-03 08:59:01 -05:00
};
2014-09-04 16:45:56 -05:00
chosen {
2015-07-14 17:19:02 -05:00
bootargs = "earlyprintk";
2016-05-12 10:24:42 -07:00
stdout-path = "serial0:115200n8";
2014-09-04 16:45:56 -05:00
};
2017-02-27 10:38:39 -06:00
memory@0 {
2014-09-04 16:45:56 -05:00
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
2016-06-02 17:52:28 +00:00
a10leds {
compatible = "gpio-leds";
a10sr_led0 {
label = "a10sr-led0";
gpios = <&a10sr_gpio 0 1>;
};
a10sr_led1 {
label = "a10sr-led1";
gpios = <&a10sr_gpio 1 1>;
};
a10sr_led2 {
label = "a10sr-led2";
gpios = <&a10sr_gpio 2 1>;
};
a10sr_led3 {
label = "a10sr-led3";
gpios = <&a10sr_gpio 3 1>;
};
};
2019-04-24 10:39:15 -05:00
ref_033v: 033-v-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
regulator-max-microvolt = <330000>;
};
2014-09-04 16:45:56 -05:00
soc {
clkmgr@ffd04000 {
clocks {
osc1 {
clock-frequency = <25000000>;
};
};
};
};
};
2015-04-02 13:26:35 -05:00
2015-06-02 21:31:00 -05:00
&gmac0 {
phy-mode = "rgmii";
phy-addr = <0xffffffff>; /* probe for phy addr */
/*
* These skews assume the user's FPGA design is adding 600ps of delay
* for TX_CLK on Arria 10.
*
* All skews are offset since hardware skew values for the ksz9031
* range from a negative skew to a positive skew.
* See the micrel-ksz90x1.txt Documentation file for details.
*/
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <1860>; /* 960ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
max-frame-size = <3800>;
status = "okay";
};
2016-06-02 17:52:27 +00:00
&gpio1 {
status = "okay";
};
2016-06-02 17:52:26 +00:00
&spi1 {
status = "okay";
resource-manager@0 {
compatible = "altr,a10sr";
reg = <0>;
spi-max-frequency = <100000>;
/* low-level active IRQ at GPIO1_5 */
interrupt-parent = <&portb>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
a10sr_gpio: gpio-controller {
compatible = "altr,a10sr-gpio";
gpio-controller;
#gpio-cells = <2>;
};
2017-03-16 07:57:16 -05:00
a10sr_rst: reset-controller {
compatible = "altr,a10sr-reset";
#reset-cells = <1>;
};
2016-06-02 17:52:26 +00:00
};
};
2015-09-22 14:50:37 -05:00
&i2c1 {
status = "okay";
/*
* adjust the falling times to decrease the i2c frequency to 50Khz
* because the LCD module does not work at the standard 100Khz
*/
2017-05-09 09:21:08 -05:00
clock-frequency = <100000>;
2015-09-22 14:50:37 -05:00
i2c-sda-falling-time-ns = <6000>;
i2c-scl-falling-time-ns = <6000>;
2019-04-24 10:39:15 -05:00
adc@14 {
compatible = "lltc,ltc2497";
reg = <0x14>;
vref-supply = <&ref_033v>;
};
adc@16 {
compatible = "lltc,ltc2497";
reg = <0x16>;
vref-supply = <&ref_033v>;
};
2015-09-22 14:50:37 -05:00
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
2016-12-17 21:42:32 -06:00
ltc@5c {
compatible = "ltc2977";
reg = <0x5c>;
};
2020-07-15 13:05:16 -05:00
temp@4c {
compatible = "maxim,max1619";
reg = <0x4c>;
};
2015-09-22 14:50:37 -05:00
};
2015-04-02 13:26:35 -05:00
&uart1 {
status = "okay";
};
2015-09-22 14:50:37 -05:00
&usb0 {
status = "okay";
2017-11-28 16:15:49 -06:00
disable-over-current;
2015-09-22 14:50:37 -05:00
};
2016-12-16 17:15:00 -06:00
2017-01-25 10:01:28 -06:00
&watchdog1 {
2016-12-16 17:15:00 -06:00
status = "okay";
};