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/ * head- u c - f r40 1 . S : F R 4 0 1 / 3 / 5 u c - l i n u x s p e c i f i c b i t s o f i n i t i a l i s a t i o n
*
* Copyright ( C ) 2 0 0 4 R e d H a t , I n c . A l l R i g h t s R e s e r v e d .
* Written b y D a v i d H o w e l l s ( d h o w e l l s @redhat.com)
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
* /
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# include < l i n u x / i n i t . h >
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# include < l i n u x / t h r e a d s . h >
# include < l i n u x / l i n k a g e . h >
# include < a s m / p t r a c e . h >
# include < a s m / p a g e . h >
# include < a s m / s p r - r e g s . h >
# include < a s m / m b86 9 4 3 a . h >
# include " h e a d . i n c "
# define _ _ 4 0 0 _ D B R 0 0 x f e 0 0 0 e 0 0
# define _ _ 4 0 0 _ D B R 1 0 x f e 0 0 0 e 0 8
# define _ _ 4 0 0 _ D B R 2 0 x f e 0 0 0 e 1 0 / * n o t o n F R 4 0 1 * /
# define _ _ 4 0 0 _ D B R 3 0 x f e 0 0 0 e 1 8 / * n o t o n F R 4 0 1 * /
# define _ _ 4 0 0 _ D A M 0 0 x f e 0 0 0 f00
# define _ _ 4 0 0 _ D A M 1 0 x f e 0 0 0 f08
# define _ _ 4 0 0 _ D A M 2 0 x f e 0 0 0 f10 / * n o t o n F R 4 0 1 * /
# define _ _ 4 0 0 _ D A M 3 0 x f e 0 0 0 f18 / * n o t o n F R 4 0 1 * /
# define _ _ 4 0 0 _ L G C R 0 x f e 0 0 0 0 1 0
# define _ _ 4 0 0 _ L C R 0 x f e 0 0 0 1 0 0
# define _ _ 4 0 0 _ L S B R 0 x f e 0 0 0 c00
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_ _ INIT
2005-04-17 02:20:36 +04:00
.balign 4
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# describe t h e p o s i t i o n a n d l a y o u t o f t h e S D R A M c o n t r o l l e r r e g i s t e r s
#
# ENTRY : EXIT :
# GR5 - c a c h e l i n e s i z e
# GR1 1 - d i s p l a c e m e n t o f 2 n d S D R A M a d d r r e g f r o m G R 1 4
# GR1 2 - d i s p l a c e m e n t o f 3 r d S D R A M a d d r r e g f r o m G R 1 4
# GR1 3 - d i s p l a c e m e n t o f 4 t h S D R A M a d d r r e g f r o m G R 1 4
# GR1 4 - a d d r e s s o f 1 s t S D R A M a d d r r e g
# GR1 5 - a m o u n t t o s h i f t a d d r e s s b y t o m a t c h S D R A M a d d r r e g
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
# CC0 - T i f D B R 0 i s p r e s e n t
# CC1 - T i f D B R 1 i s p r e s e n t
# CC2 - T i f D B R 2 i s p r e s e n t ( n o t F R 4 0 1 / F R 4 0 1 A )
# CC3 - T i f D B R 3 i s p r e s e n t ( n o t F R 4 0 1 / F R 4 0 1 A )
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr401_describe_sdram
__head_fr401_describe_sdram :
sethi. p % h i ( _ _ 4 0 0 _ D B R 0 ) ,g r14
setlo % l o ( _ _ 4 0 0 _ D B R 0 ) ,g r14
setlos. p #_ _ 400 _ D B R 1 - _ _ 4 0 0 _ D B R 0 ,g r11
setlos #_ _ 400 _ D B R 2 - _ _ 4 0 0 _ D B R 0 ,g r12
setlos. p #_ _ 400 _ D B R 3 - _ _ 4 0 0 _ D B R 0 ,g r13
setlos #32 ,g r5 ; cacheline size
setlos. p #0 ,g r15 ; amount to shift addr reg by
# specify w h i c h D B R r e g s a r e p r e s e n t
setlos #0x00ff ,g r4
movgs g r4 ,c c c r
movsg p s r ,g r3 ; check for FR401/FR401A
srli g r3 ,#25 ,g r3
subicc g r3 ,#0x20 > > 1 ,g r0 ,i c c0
bnelr i c c0 ,#1
setlos #0x000f ,g r4
movgs g r4 ,c c c r
bralr
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# rearrange t h e b u s c o n t r o l l e r r e g i s t e r s
#
# ENTRY : EXIT :
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s r e v i s e d L E D a d d r e s s
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr401_set_busctl
__head_fr401_set_busctl :
sethi. p % h i ( _ _ 4 0 0 _ L G C R ) ,g r4
setlo % l o ( _ _ 4 0 0 _ L G C R ) ,g r4
sethi. p % h i ( _ _ 4 0 0 _ L S B R ) ,g r10
setlo % l o ( _ _ 4 0 0 _ L S B R ) ,g r10
sethi. p % h i ( _ _ 4 0 0 _ L C R ) ,g r11
setlo % l o ( _ _ 4 0 0 _ L C R ) ,g r11
# set t h e b u s c o n t r o l l e r
ldi @(gr4,#0),gr5
ori g r5 ,#0xff ,g r5 ; make sure all chip-selects are enabled
sti g r5 ,@(gr4,#0)
sethi. p % h i ( _ _ r e g i o n _ C S 1 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 1 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 1 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 1 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 1 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 1 _ C ) ,g r6
sti g r4 ,@(gr10,#1*0x08)
sti g r5 ,@(gr10,#1*0x08+0x100)
sti g r6 ,@(gr11,#1*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 2 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 2 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 2 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 2 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 2 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 2 _ C ) ,g r6
sti g r4 ,@(gr10,#2*0x08)
sti g r5 ,@(gr10,#2*0x08+0x100)
sti g r6 ,@(gr11,#2*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 3 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 3 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 3 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 3 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 3 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 3 _ C ) ,g r6
sti g r4 ,@(gr10,#3*0x08)
sti g r5 ,@(gr10,#3*0x08+0x100)
sti g r6 ,@(gr11,#3*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 4 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 4 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 4 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 4 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 4 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 4 _ C ) ,g r6
sti g r4 ,@(gr10,#4*0x08)
sti g r5 ,@(gr10,#4*0x08+0x100)
sti g r6 ,@(gr11,#4*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 5 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 5 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 5 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 5 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 5 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 5 _ C ) ,g r6
sti g r4 ,@(gr10,#5*0x08)
sti g r5 ,@(gr10,#5*0x08+0x100)
sti g r6 ,@(gr11,#5*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 6 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 6 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 6 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 6 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 6 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 6 _ C ) ,g r6
sti g r4 ,@(gr10,#6*0x08)
sti g r5 ,@(gr10,#6*0x08+0x100)
sti g r6 ,@(gr11,#6*0x08)
sethi. p % h i ( _ _ r e g i o n _ C S 7 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 7 ) ,g r4
sethi. p % h i ( _ _ r e g i o n _ C S 7 _ M ) ,g r5
setlo % l o ( _ _ r e g i o n _ C S 7 _ M ) ,g r5
sethi. p % h i ( _ _ r e g i o n _ C S 7 _ C ) ,g r6
setlo % l o ( _ _ r e g i o n _ C S 7 _ C ) ,g r6
sti g r4 ,@(gr10,#7*0x08)
sti g r5 ,@(gr10,#7*0x08+0x100)
sti g r6 ,@(gr11,#7*0x08)
membar
bar
# adjust L E D b a n k a d d r e s s
sethi. p % h i ( L E D _ A D D R - 0 x20 0 0 0 0 0 0 + _ _ r e g i o n _ C S 2 ) ,g r30
setlo % l o ( L E D _ A D D R - 0 x20 0 0 0 0 0 0 + _ _ r e g i o n _ C S 2 ) ,g r30
bralr
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# determine t h e t o t a l S D R A M s i z e
#
# ENTRY : EXIT :
# GR2 5 - S D R A M s i z e
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr401_survey_sdram
__head_fr401_survey_sdram :
sethi. p % h i ( _ _ 4 0 0 _ D A M 0 ) ,g r11
setlo % l o ( _ _ 4 0 0 _ D A M 0 ) ,g r11
sethi. p % h i ( _ _ 4 0 0 _ D B R 0 ) ,g r12
setlo % l o ( _ _ 4 0 0 _ D B R 0 ) ,g r12
sethi. p % h i ( 0 x f e 0 0 0 0 0 0 ) ,g r17 ; unused SDRAM DBR value
setlo % l o ( 0 x f e 0 0 0 0 0 0 ) ,g r17
setlos #0 ,g r25
ldi @(gr12,#0x00),gr4 ; DAR0
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 0
ldi @(gr11,#0x00),gr6 ; DAM0: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS0 :
ldi @(gr12,#0x08),gr4 ; DAR1
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 1
ldi @(gr11,#0x08),gr6 ; DAM1: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS1 :
# FR4 0 1 / F R 4 0 1 A d o e s n o t h a v e D C S 2 / 3
movsg p s r ,g r3
srli g r3 ,#25 ,g r3
subicc g r3 ,#0x20 > > 1 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 3
ldi @(gr12,#0x10),gr4 ; DAR2
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 2
ldi @(gr11,#0x10),gr6 ; DAM2: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS2 :
ldi @(gr12,#0x18),gr4 ; DAR3
subcc g r4 ,g r17 ,g r0 ,i c c0
beq i c c0 ,#0 ,_ _ h e a d _ n o _ D C S 3
ldi @(gr11,#0x18),gr6 ; DAM3: bits 31:20 match addr 31:20
add g r25 ,g r6 ,g r25
addi g r25 ,#1 ,g r25
__head_no_DCS3 :
bralr
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# set t h e p r o t e c t i o n m a p w i t h t h e I / D A M P R r e g i s t e r s
#
# ENTRY : EXIT :
# GR2 5 S D R A M s i z e [ s a v e d ]
# GR2 6 & _ _ h e a d _ r e f e r e n c e [ s a v e d ]
# GR3 0 L E D a d d r e s s [ s a v e d ]
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
.globl __head_fr401_set_protection
__head_fr401_set_protection :
movsg l r ,g r27
# set t h e I / O r e g i o n p r o t e c t i o n r e g i s t e r s f o r F R 4 0 1 / 3 / 5
sethi. p % h i ( _ _ r e g i o n _ I O ) ,g r5
setlo % l o ( _ _ r e g i o n _ I O ) ,g r5
ori g r5 ,#x A M P R x _ S S _ 512 M b | x A M P R x _ S _ K E R N E L | x A M P R x _ C | x A M P R x _ V ,g r5
movgs g r0 ,i a m p r7
movgs g r5 ,d a m p r7 ; General I/O tile
# need t o t i l e t h e r e m a i n i n g I A M P R / D A M P R r e g i s t e r s t o c o v e r a s m u c h o f t h e R A M a s p o s s i b l e
# - start w i t h t h e h i g h e s t n u m b e r e d r e g i s t e r s
sethi. p % h i ( _ _ k e r n e l _ i m a g e _ e n d ) ,g r8
setlo % l o ( _ _ k e r n e l _ i m a g e _ e n d ) ,g r8
sethi. p % h i ( 3 2 7 6 8 ) ,g r4 ; allow for a maximal allocator bitmap
setlo % l o ( 3 2 7 6 8 ) ,g r4
add g r8 ,g r4 ,g r8
sethi. p % h i ( 1 0 2 4 * 2 0 4 8 - 1 ) ,g r4 ; round up to nearest 2MiB
setlo % l o ( 1 0 2 4 * 2 0 4 8 - 1 ) ,g r4
add. p g r8 ,g r4 ,g r8
not g r4 ,g r4
and g r8 ,g r4 ,g r8
sethi. p % h i ( _ _ p a g e _ o f f s e t ) ,g r9
setlo % l o ( _ _ p a g e _ o f f s e t ) ,g r9
add g r9 ,g r25 ,g r9
# GR8 = b a s e o f u n c o v e r e d R A M
# GR9 = t o p o f u n c o v e r e d R A M
# ifdef C O N F I G _ M B 9 3 0 9 3 _ P D K
sethi. p % h i ( _ _ r e g i o n _ C S 2 ) ,g r4
setlo % l o ( _ _ r e g i o n _ C S 2 ) ,g r4
ori g r4 ,#x A M P R x _ S S _ 1 M b | x A M P R x _ S _ K E R N E L | x A M P R x _ C | x A M P R x _ V ,g r4
movgs g r4 ,d a m p r6
movgs g r0 ,i a m p r6
# else
call _ _ h e a d _ s p l i t _ r e g i o n
movgs g r4 ,i a m p r6
movgs g r5 ,d a m p r6
# endif
call _ _ h e a d _ s p l i t _ r e g i o n
movgs g r4 ,i a m p r5
movgs g r5 ,d a m p r5
call _ _ h e a d _ s p l i t _ r e g i o n
movgs g r4 ,i a m p r4
movgs g r5 ,d a m p r4
call _ _ h e a d _ s p l i t _ r e g i o n
movgs g r4 ,i a m p r3
movgs g r5 ,d a m p r3
call _ _ h e a d _ s p l i t _ r e g i o n
movgs g r4 ,i a m p r2
movgs g r5 ,d a m p r2
call _ _ h e a d _ s p l i t _ r e g i o n
movgs g r4 ,i a m p r1
movgs g r5 ,d a m p r1
# cover k e r n e l c o r e i m a g e w i t h k e r n e l - o n l y s e g m e n t
sethi. p % h i ( _ _ p a g e _ o f f s e t ) ,g r8
setlo % l o ( _ _ p a g e _ o f f s e t ) ,g r8
call _ _ h e a d _ s p l i t _ r e g i o n
# ifdef C O N F I G _ P R O T E C T _ K E R N E L
ori. p g r4 ,#x A M P R x _ S _ K E R N E L , g r 4
ori g r5 ,#x A M P R x _ S _ K E R N E L , g r 5
# endif
movgs g r4 ,i a m p r0
movgs g r5 ,d a m p r0
jmpl @(gr27,gr0)