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/ *
* include/ a s m - a r m / a r c h - p x a / e n t r y - m a c r o . S
*
* Low- l e v e l I R Q h e l p e r m a c r o s f o r P X A - b a s e d p l a t f o r m s
*
* This f i l e i s l i c e n s e d u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c
* License v e r s i o n 2 . T h i s p r o g r a m i s l i c e n s e d " a s i s " w i t h o u t a n y
* warranty o f a n y k i n d , w h e t h e r e x p r e s s o r i m p l i e d .
* /
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# include < a s m / h a r d w a r e . h >
# include < a s m / a r c h / i r q s . h >
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.macro disable_fiq
.endm
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.macro get_ i r q n r _ p r e a m b l e , b a s e , t m p
.endm
.macro arch_ r e t _ t o _ u s e r , t m p1 , t m p2
.endm
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.macro get_ i r q n r _ a n d _ b a s e , i r q n r , i r q s t a t , b a s e , t m p
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mrc p15 , 0 , \ t m p , c0 , c0 , 0 @ CPUID
mov \ t m p , \ t m p , l s r #13
and \ t m p , \ t m p , #0x7 @ Core G
cmp \ t m p , #1
bhi 1 0 0 4 f
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mov \ b a s e , #i o _ p 2 v ( 0 x40 0 0 0 0 0 0 ) @ IIR Ctl = 0x40d00000
add \ b a s e , \ b a s e , #0x00d00000
ldr \ i r q s t a t , [ \ b a s e , #0 ] @ ICIP
ldr \ i r q n r , [ \ b a s e , #4 ] @ ICMR
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b 1 0 0 2 f
1004 :
mrc p6 , 0 , \ i r q s t a t , c6 , c0 , 0 @ ICIP2
mrc p6 , 0 , \ i r q n r , c7 , c0 , 0 @ ICMR2
2008-02-27 01:59:28 +01:00
ands \ i r q n r , \ i r q s t a t , \ i r q n r
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beq 1 0 0 3 f
rsb \ i r q s t a t , \ i r q n r , #0
and \ i r q s t a t , \ i r q s t a t , \ i r q n r
clz \ i r q n r , \ i r q s t a t
rsb \ i r q n r , \ i r q n r , #31
add \ i r q n r , \ i r q n r , #32
b 1 0 0 1 f
1003 :
mrc p6 , 0 , \ i r q s t a t , c0 , c0 , 0 @ ICIP
mrc p6 , 0 , \ i r q n r , c1 , c0 , 0 @ ICMR
1002 :
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ands \ i r q n r , \ i r q s t a t , \ i r q n r
beq 1 0 0 1 f
rsb \ i r q s t a t , \ i r q n r , #0
and \ i r q s t a t , \ i r q s t a t , \ i r q n r
clz \ i r q n r , \ i r q s t a t
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rsb \ i r q n r , \ i r q n r , #31
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1001 :
.endm