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linux/drivers/net/ethernet/intel/ixgbe/ixgbe_model.h

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intel: add SPDX identifiers to all the Intel drivers Add the SPDX identifiers to all the Intel wired LAN driver files, as outlined in Documentation/process/license-rules.rst. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-22 10:08:48 -07:00
/* SPDX-License-Identifier: GPL-2.0 */
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
/*******************************************************************************
*
* Intel 10 Gigabit PCI Express Linux drive
ixgbe: fix dates on header of ixgbe_model.h Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Reported-by: Mark Rustad <mark.d.rustad@intel.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:35:23 -08:00
* Copyright(c) 2016 Intel Corporation.
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http://www.gnu.org/licenses/>.
*
* The full GNU General Public License is included in this distribution in
* the file called "COPYING".
*
* Contact Information:
* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
******************************************************************************/
#ifndef _IXGBE_MODEL_H_
#define _IXGBE_MODEL_H_
#include "ixgbe.h"
#include "ixgbe_type.h"
struct ixgbe_mat_field {
unsigned int off;
int (*val)(struct ixgbe_fdir_filter *input,
union ixgbe_atr_input *mask,
ixgbe: use u32 instead of __u32 in model header I incorrectly used __u32 types where we should be using u32 types when I added the ixgbe_model.h file. Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Suggested-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:34:53 -08:00
u32 val, u32 m);
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
unsigned int type;
};
ixgbe: Match on multiple headers for cls_u32 offloads Adds support to set filters with multiple header fields (L3,L4)to match on. This is achieved in the following order: 1. Create a leaf hash table for the next header. 2. Create a link to the leaf hash table from the base hash table with matches on next header type and current header fields. 3. Add filter in leaf hash table with match on next header fields and action. Verified with the following filters : Match TCP and DIP: handle 1: u32 divisor 1 u32 ht 800: order 1 link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat \ match ip protocol 6 ff match ip dst 10.0.0.1/32 match tcp src 28 ffff action drop Delete the filter: Match on DIP, SIP, UDP (SPort, DPort): handle 2: u32 divisor 1 u32 ht 800: order 2 link 2: \ offset at 0 mask 0f00 shift 6 plus 0 eat \ match ip dst 15.0.0.2/32 match ip protocol 17 ff \ match ip src 15.0.0.1/32 match udp src 30 ffff match udp dst 32 ffff action drop Signed-off-by: Amritha Nambiar <amritha.nambiar@intel.com> Acked-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-04-14 19:08:53 -04:00
struct ixgbe_jump_table {
struct ixgbe_mat_field *mat;
struct ixgbe_fdir_filter *input;
union ixgbe_atr_input *mask;
ixgbe: Fix deleting link filters for cls_u32 offloads On deleting filters which are links to a child hash table, the filters in the child hash table must be cleared from the hardware if there is no link between the parent and child hash table. Verified with the following filters: Create a child hash table: handle 1: u32 divisor 1 Link to the child hash table from parent hash table: handle 800:0:10 u32 ht 800: link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat \ match ip protocol 6 ff match ip dst 15.0.0.1/32 Add filters into child hash table: handle 1:0:2 u32 ht 1: \ match tcp src 22 ffff action drop handle 1:0:3 u32 ht 1: \ match tcp src 33 ffff action drop Delete link filter from parent hash table: handle 800:0:10 u32 Signed-off-by: Amritha Nambiar <amritha.nambiar@intel.com> Acked-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-05-06 19:09:51 -07:00
u32 link_hdl;
unsigned long child_loc_map[32];
ixgbe: Match on multiple headers for cls_u32 offloads Adds support to set filters with multiple header fields (L3,L4)to match on. This is achieved in the following order: 1. Create a leaf hash table for the next header. 2. Create a link to the leaf hash table from the base hash table with matches on next header type and current header fields. 3. Add filter in leaf hash table with match on next header fields and action. Verified with the following filters : Match TCP and DIP: handle 1: u32 divisor 1 u32 ht 800: order 1 link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat \ match ip protocol 6 ff match ip dst 10.0.0.1/32 match tcp src 28 ffff action drop Delete the filter: Match on DIP, SIP, UDP (SPort, DPort): handle 2: u32 divisor 1 u32 ht 800: order 2 link 2: \ offset at 0 mask 0f00 shift 6 plus 0 eat \ match ip dst 15.0.0.2/32 match ip protocol 17 ff \ match ip src 15.0.0.1/32 match udp src 30 ffff match udp dst 32 ffff action drop Signed-off-by: Amritha Nambiar <amritha.nambiar@intel.com> Acked-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-04-14 19:08:53 -04:00
};
ixgbe: Fix deleting link filters for cls_u32 offloads On deleting filters which are links to a child hash table, the filters in the child hash table must be cleared from the hardware if there is no link between the parent and child hash table. Verified with the following filters: Create a child hash table: handle 1: u32 divisor 1 Link to the child hash table from parent hash table: handle 800:0:10 u32 ht 800: link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat \ match ip protocol 6 ff match ip dst 15.0.0.1/32 Add filters into child hash table: handle 1:0:2 u32 ht 1: \ match tcp src 22 ffff action drop handle 1:0:3 u32 ht 1: \ match tcp src 33 ffff action drop Delete link filter from parent hash table: handle 800:0:10 u32 Signed-off-by: Amritha Nambiar <amritha.nambiar@intel.com> Acked-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-05-06 19:09:51 -07:00
#define IXGBE_MAX_HW_ENTRIES 2045
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
static inline int ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input,
union ixgbe_atr_input *mask,
ixgbe: use u32 instead of __u32 in model header I incorrectly used __u32 types where we should be using u32 types when I added the ixgbe_model.h file. Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Suggested-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:34:53 -08:00
u32 val, u32 m)
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
{
input->filter.formatted.src_ip[0] = val;
mask->formatted.src_ip[0] = m;
return 0;
}
static inline int ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input,
union ixgbe_atr_input *mask,
ixgbe: use u32 instead of __u32 in model header I incorrectly used __u32 types where we should be using u32 types when I added the ixgbe_model.h file. Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Suggested-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:34:53 -08:00
u32 val, u32 m)
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
{
input->filter.formatted.dst_ip[0] = val;
mask->formatted.dst_ip[0] = m;
return 0;
}
static struct ixgbe_mat_field ixgbe_ipv4_fields[] = {
ixgbe: Fix cls_u32 offload support for fields with masks Remove the incorrect check for mask in ixgbe_configure_clsu32 and drop the 'mask' field that is not required in struct ixgbe_mat_field Verified with the following filters: #tc qdisc add dev p4p1 ingress #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:1 u32 ht 800: \ match ip dst 10.0.0.1/8 match ip src 10.0.0.2/8 action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:2 u32 ht 800: \ match ip dst 11.0.0.1/16 match ip src 11.0.0.2/16 action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:3 u32 ht 800: \ match ip dst 12.0.0.1/24 match ip src 12.0.0.2/24 action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:4 u32 ht 800: \ match ip dst 13.0.0.1/32 match ip src 13.0.0.2/32 action drop Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-07 09:41:48 -08:00
{ .off = 12, .val = ixgbe_mat_prgm_sip,
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
.type = IXGBE_ATR_FLOW_TYPE_IPV4},
ixgbe: Fix cls_u32 offload support for fields with masks Remove the incorrect check for mask in ixgbe_configure_clsu32 and drop the 'mask' field that is not required in struct ixgbe_mat_field Verified with the following filters: #tc qdisc add dev p4p1 ingress #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:1 u32 ht 800: \ match ip dst 10.0.0.1/8 match ip src 10.0.0.2/8 action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:2 u32 ht 800: \ match ip dst 11.0.0.1/16 match ip src 11.0.0.2/16 action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:3 u32 ht 800: \ match ip dst 12.0.0.1/24 match ip src 12.0.0.2/24 action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:4 u32 ht 800: \ match ip dst 13.0.0.1/32 match ip src 13.0.0.2/32 action drop Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-07 09:41:48 -08:00
{ .off = 16, .val = ixgbe_mat_prgm_dip,
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
.type = IXGBE_ATR_FLOW_TYPE_IPV4},
{ .val = NULL } /* terminal node */
};
ixgbe: Fix cls_u32 offload support for L4 ports Fix support for 16 bit source/dest port matches in ixgbe model. u32 uses a single 32-bit key value for both source and destination ports starting at offset 0. So replace the 2 functions with a single function that takes this key value/mask to program both source and dest ports. Verified with the following filter: #tc qdisc add dev p4p1 ingress #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1: u32 divisor 1 #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:10 u32 ht 800: link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:10 u32 ht 1: \ match tcp src 1024 ffff match tcp dst 80 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:11 u32 ht 1: \ match tcp src 1025 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:12 u32 ht 1: \ match tcp dst 81 ffff action drop Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-07 09:41:49 -08:00
static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input,
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
union ixgbe_atr_input *mask,
ixgbe: use u32 instead of __u32 in model header I incorrectly used __u32 types where we should be using u32 types when I added the ixgbe_model.h file. Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Suggested-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:34:53 -08:00
u32 val, u32 m)
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
{
input->filter.formatted.src_port = val & 0xffff;
mask->formatted.src_port = m & 0xffff;
ixgbe: Fix cls_u32 offload support for L4 ports Fix support for 16 bit source/dest port matches in ixgbe model. u32 uses a single 32-bit key value for both source and destination ports starting at offset 0. So replace the 2 functions with a single function that takes this key value/mask to program both source and dest ports. Verified with the following filter: #tc qdisc add dev p4p1 ingress #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1: u32 divisor 1 #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:10 u32 ht 800: link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:10 u32 ht 1: \ match tcp src 1024 ffff match tcp dst 80 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:11 u32 ht 1: \ match tcp src 1025 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:12 u32 ht 1: \ match tcp dst 81 ffff action drop Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-07 09:41:49 -08:00
input->filter.formatted.dst_port = val >> 16;
mask->formatted.dst_port = m >> 16;
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
return 0;
};
static struct ixgbe_mat_field ixgbe_tcp_fields[] = {
ixgbe: Fix cls_u32 offload support for L4 ports Fix support for 16 bit source/dest port matches in ixgbe model. u32 uses a single 32-bit key value for both source and destination ports starting at offset 0. So replace the 2 functions with a single function that takes this key value/mask to program both source and dest ports. Verified with the following filter: #tc qdisc add dev p4p1 ingress #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1: u32 divisor 1 #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:10 u32 ht 800: link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:10 u32 ht 1: \ match tcp src 1024 ffff match tcp dst 80 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:11 u32 ht 1: \ match tcp src 1025 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:12 u32 ht 1: \ match tcp dst 81 ffff action drop Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-07 09:41:49 -08:00
{.off = 0, .val = ixgbe_mat_prgm_ports,
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
.type = IXGBE_ATR_FLOW_TYPE_TCPV4},
{ .val = NULL } /* terminal node */
};
ixgbe: Extend cls_u32 offload to support UDP headers Added support to match on UDP fields in the transport layer. Extended core logic to support multiple headers. Verified with the following filters : handle 1: u32 divisor 1 u32 ht 800: order 1 link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff u32 ht 1: order 2 \ match tcp src 1024 ffff match tcp dst 23 ffff action drop handle 2: u32 divisor 1 u32 ht 800: order 3 link 2: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 17 ff u32 ht 2: order 4 \ match udp src 1025 ffff match udp dst 24 ffff action drop Signed-off-by: Amritha Nambiar <amritha.nambiar@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-09 18:32:16 -05:00
static struct ixgbe_mat_field ixgbe_udp_fields[] = {
{.off = 0, .val = ixgbe_mat_prgm_ports,
.type = IXGBE_ATR_FLOW_TYPE_UDPV4},
{ .val = NULL } /* terminal node */
};
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
struct ixgbe_nexthdr {
/* offset, shift, and mask of position to next header */
unsigned int o;
ixgbe: use u32 instead of __u32 in model header I incorrectly used __u32 types where we should be using u32 types when I added the ixgbe_model.h file. Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Suggested-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:34:53 -08:00
u32 s;
u32 m;
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
/* match criteria to make this jump*/
unsigned int off;
ixgbe: use u32 instead of __u32 in model header I incorrectly used __u32 types where we should be using u32 types when I added the ixgbe_model.h file. Fixes: 9d35cf062e05 ("net: ixgbe: add minimal parser details for ixgbe") Suggested-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-17 14:34:53 -08:00
u32 val;
u32 mask;
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
/* location of jump to make */
struct ixgbe_mat_field *jump;
};
static struct ixgbe_nexthdr ixgbe_ipv4_jumps[] = {
{ .o = 0, .s = 6, .m = 0xf,
.off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields},
ixgbe: Extend cls_u32 offload to support UDP headers Added support to match on UDP fields in the transport layer. Extended core logic to support multiple headers. Verified with the following filters : handle 1: u32 divisor 1 u32 ht 800: order 1 link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff u32 ht 1: order 2 \ match tcp src 1024 ffff match tcp dst 23 ffff action drop handle 2: u32 divisor 1 u32 ht 800: order 3 link 2: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 17 ff u32 ht 2: order 4 \ match udp src 1025 ffff match udp dst 24 ffff action drop Signed-off-by: Amritha Nambiar <amritha.nambiar@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2016-03-09 18:32:16 -05:00
{ .o = 0, .s = 6, .m = 0xf,
.off = 8, .val = 0x1100, .mask = 0xff00, .jump = ixgbe_udp_fields},
net: ixgbe: add minimal parser details for ixgbe This adds an ixgbe data structure that is used to determine what headers:fields can be matched and in what order they are supported. For hardware devices this can be a bit tricky because typically only pre-programmed (firmware, ucode, rtl) parse graphs will be supported and we don't yet have an interface to change these from the OS. So its sort of a you get whatever your friendly vendor provides affair at the moment. In the future we can add the get routines and set routines to update this data structure. One interesting thing to note here is the data structure here identifies ethernet, ip, and tcp fields without having to hardcode them as enumerations or use other identifiers. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-16 21:18:28 -08:00
{ .jump = NULL } /* terminal node */
};
#endif /* _IXGBE_MODEL_H_ */
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