License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 15:07:57 +01:00
/* SPDX-License-Identifier: GPL-2.0 */
2005-04-16 15:20:36 -07:00
/ *
* This f i l e c o n t a i n s t h e l i g h t - w e i g h t s y s t e m c a l l h a n d l e r s ( f s y s c a l l - h a n d l e r s ) .
*
* Copyright ( C ) 2 0 0 3 H e w l e t t - P a c k a r d C o
* David M o s b e r g e r - T a n g < d a v i d m @hpl.hp.com>
*
* 2 5 - Sep- 0 3 d a v i d m I m p l e m e n t f s y s _ r t _ s i g p r o c m a s k ( ) .
* 1 8 - Feb- 0 3 l o u i s k I m p l e m e n t f s y s _ g e t t i m e o f d a y ( ) .
* 2 8 - Feb- 0 3 d a v i d m F i x e d s e v e r a l b u g s i n f s y s _ g e t t i m e o f d a y ( ) . T u n e d i t s o m e m o r e ,
* probably b r o k e i t a l o n g t h e w a y . . . ;-)
* 1 3 - Jul- 0 4 c l a m e t e r I m p l e m e n t f s y s _ c l o c k _ g e t t i m e a n d r e v i s e f s y s _ g e t t i m e o f d a y t o m a k e
* it c a p a b l e o f u s i n g m e m o r y b a s e d c l o c k s w i t h o u t f a l l i n g b a c k t o C c o d e .
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* 0 8 - Feb- 0 7 F e n g h u a Y u I m p l e m e n t f s y s _ g e t c p u .
*
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* /
# include < a s m / a s m m a c r o . h >
# include < a s m / e r r n o . h >
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# include < a s m / a s m - o f f s e t s . h >
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# include < a s m / p e r c p u . h >
# include < a s m / t h r e a d _ i n f o . h >
# include < a s m / s a l . h >
# include < a s m / s i g n a l . h >
# include < a s m / u n i s t d . h >
# include " e n t r y . h "
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# include < a s m / n a t i v e / i n s t . h >
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/ *
* See D o c u m e n t a t i o n / i a64 / f s y s . t x t f o r d e t a i l s o n f s y s c a l l s .
*
* On e n t r y t o a n f s y s c a l l h a n d l e r :
* r1 0 = 0 ( i . e . , d e f a u l t s t o " s u c c e s s f u l s y s c a l l r e t u r n " )
* r1 1 = s a v e d a r . p f s ( a u s e r - l e v e l v a l u e )
* r1 5 = s y s t e m c a l l n u m b e r
* r1 6 = " c u r r e n t " t a s k p o i n t e r ( i n n o r m a l k e r n e l - m o d e , t h i s i s i n r13 )
* r3 2 - r39 = s y s t e m c a l l a r g u m e n t s
* b6 = r e t u r n a d d r e s s ( a u s e r - l e v e l v a l u e )
* ar. p f s = p r e v i o u s f r a m e - s t a t e ( a u s e r - l e v e l v a l u e )
* PSR. b e = c l e a r e d t o z e r o ( i . e . , l i t t l e - e n d i a n b y t e o r d e r i s i n e f f e c t )
* all o t h e r r e g i s t e r s m a y c o n t a i n v a l u e s p a s s e d i n f r o m u s e r - m o d e
*
* On r e t u r n f r o m a n f s y s c a l l h a n d l e r :
* r1 1 = s a v e d a r . p f s ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* r1 5 = s y s t e m c a l l n u m b e r ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* r3 2 - r39 = s y s t e m c a l l a r g u m e n t s ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* b6 = r e t u r n a d d r e s s ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* ar. p f s = p r e v i o u s f r a m e - s t a t e ( a s p a s s e d i n t o t h e f s y s c a l l h a n d l e r )
* /
ENTRY( f s y s _ n i _ s y s c a l l )
.prologue
.altrp b6
.body
mov r8 =ENOSYS
mov r10 = - 1
FSYS_ R E T U R N
END( f s y s _ n i _ s y s c a l l )
ENTRY( f s y s _ g e t p i d )
.prologue
.altrp b6
.body
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add r17 =IA64_TASK_GROUP_LEADER_OFFSET ,r16
;;
ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > g r o u p _ l e a d e r
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add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
;;
ld4 r9 = [ r9 ]
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add r17 =IA64_TASK_TGIDLINK_OFFSET ,r17
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;;
and r9 =TIF_ALLWORK_MASK ,r9
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ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > g r o u p _ l e a d e r - > p i d s [ P I D T Y P E _ P I D ] . p i d
;;
add r8 =IA64_PID_LEVEL_OFFSET ,r17
;;
ld4 r8 = [ r8 ] / / r8 = p i d - > l e v e l
add r17 =IA64_PID_UPID_OFFSET ,r17 / / r17 = & p i d - > n u m b e r s [ 0 ]
;;
shl r8 =r8 ,I A 6 4 _ U P I D _ S H I F T
;;
add r17 =r17 ,r8 / / r17 = & p i d - > n u m b e r s [ p i d - > l e v e l ]
;;
ld4 r8 = [ r17 ] / / r8 = p i d - > n u m b e r s [ p i d - > l e v e l ] . n r
;;
mov r17 =0
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;;
cmp. n e p8 ,p0 =0 ,r9
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
FSYS_ R E T U R N
END( f s y s _ g e t p i d )
ENTRY( f s y s _ s e t _ t i d _ a d d r e s s )
.prologue
.altrp b6
.body
add r9 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
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add r17 =IA64_TASK_TGIDLINK_OFFSET ,r16
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;;
ld4 r9 = [ r9 ]
tnat. z p6 ,p7 =r32 / / c h e c k a r g u m e n t r e g i s t e r f o r b e i n g N a T
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ld8 r17 = [ r17 ] / / r17 = c u r r e n t - > p i d s [ P I D T Y P E _ P I D ] . p i d
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;;
and r9 =TIF_ALLWORK_MASK ,r9
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add r8 =IA64_PID_LEVEL_OFFSET ,r17
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add r18 =IA64_TASK_CLEAR_CHILD_TID_OFFSET ,r16
;;
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ld4 r8 = [ r8 ] / / r8 = p i d - > l e v e l
add r17 =IA64_PID_UPID_OFFSET ,r17 / / r17 = & p i d - > n u m b e r s [ 0 ]
;;
shl r8 =r8 ,I A 6 4 _ U P I D _ S H I F T
;;
add r17 =r17 ,r8 / / r17 = & p i d - > n u m b e r s [ p i d - > l e v e l ]
;;
ld4 r8 = [ r17 ] / / r8 = p i d - > n u m b e r s [ p i d - > l e v e l ] . n r
;;
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cmp. n e p8 ,p0 =0 ,r9
mov r17 = - 1
;;
( p6 ) s t 8 [ r18 ] =r32
( p7 ) s t 8 [ r18 ] =r17
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
mov r17 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
mov r18 =0 / / i m u s t n o t l e a k k e r n e l b i t s . . .
FSYS_ R E T U R N
END( f s y s _ s e t _ t i d _ a d d r e s s )
2012-02-28 19:46:05 +00:00
# if I A 6 4 _ G T O D _ S E Q _ O F F S E T ! =0
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# error f s y s _ g e t t i m e o f d a y i n c o m p a t i b l e w i t h c h a n g e s t o s t r u c t f s y s c a l l _ g t o d _ d a t a _ t
# endif
# if I A 6 4 _ I T C _ J I T T E R _ O F F S E T ! =0
# error f s y s _ g e t t i m e o f d a y i n c o m p a t i b l e w i t h c h a n g e s t o s t r u c t i t c _ j i t t e r _ d a t a _ t
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# endif
# define C L O C K _ R E A L T I M E 0
# define C L O C K _ M O N O T O N I C 1
# define C L O C K _ D I V I D E _ B Y _ 1 0 0 0 0 x40 0 0
# define C L O C K _ A D D _ M O N O T O N I C 0 x80 0 0
ENTRY( f s y s _ g e t t i m e o f d a y )
.prologue
.altrp b6
.body
mov r31 = r32
tnat. n z p6 ,p0 = r33 / / g u a r d a g a i n s t N a T a r g u m e n t
( p6 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l
mov r30 = C L O C K _ D I V I D E _ B Y _ 1 0 0 0
;;
.gettime :
/ / Register m a p
/ / Incoming r31 = p o i n t e r t o a d d r e s s w h e r e t o p l a c e r e s u l t
/ / r3 0 = f l a g s d e t e r m i n i n g h o w t i m e i s p r o c e s s e d
/ / r2 ,r3 = t e m p r4 - r7 p r e s e r v e d
/ / r8 = r e s u l t n a n o s e c o n d s
/ / r9 = r e s u l t s e c o n d s
/ / r1 0 = t e m p o r a r y s t o r a g e f o r c l o c k d i f f e r e n c e
/ / r1 1 = p r e s e r v e d : s a v e d a r . p f s
/ / r1 2 = p r e s e r v e d : m e m o r y s t a c k
/ / r1 3 = p r e s e r v e d : t h r e a d p o i n t e r
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/ / r1 4 = a d d r e s s o f m a s k / m a s k v a l u e
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/ / r1 5 = p r e s e r v e d : s y s t e m c a l l n u m b e r
/ / r1 6 = p r e s e r v e d : c u r r e n t t a s k p o i n t e r
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/ / r1 7 = ( n o t u s e d )
/ / r1 8 = ( n o t u s e d )
/ / r1 9 = a d d r e s s o f i t c _ l a s t c y c l e
/ / r2 0 = s t r u c t f s y s c a l l _ g t o d _ d a t a ( = a d d r e s s o f g t o d _ l o c k . s e q u e n c e )
/ / r2 1 = a d d r e s s o f m m i o _ p t r
/ / r2 2 = a d d r e s s o f w a l l _ t i m e o r m o n o t o n i c _ t i m e
/ / r2 3 = a d d r e s s o f s h i f t / v a l u e
/ / r2 4 = a d d r e s s m u l t f a c t o r / c y c l e _ l a s t v a l u e
/ / r2 5 = i t c _ l a s t c y c l e v a l u e
/ / r2 6 = a d d r e s s c l o c k s o u r c e c y c l e _ l a s t
/ / r2 7 = ( n o t u s e d )
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/ / r2 8 = s e q u e n c e n u m b e r a t t h e b e g i n n i n g o f c r i t c a l s e c t i o n
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/ / r2 9 = a d d r e s s o f i t c _ j i t t e r
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/ / r3 0 = t i m e p r o c e s s i n g f l a g s / m e m o r y a d d r e s s
/ / r3 1 = p o i n t e r t o r e s u l t
/ / Predicates
/ / p6 ,p7 s h o r t t e r m u s e
/ / p8 = t i m e s o u r c e a r . i t c
/ / p9 = t i m e s o u r c e m m i o 6 4
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/ / p1 0 = t i m e s o u r c e m m i o 3 2 - n o t u s e d
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/ / p1 1 = t i m e s o u r c e n o t t o b e h a n d l e d b y a s m c o d e
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/ / p1 2 = m e m o r y t i m e s o u r c e ( = p9 | p10 ) - n o t u s e d
/ / p1 3 = d o c m p x c h g w i t h i t c _ l a s t c y c l e
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/ / p1 4 = D i v i d e b y 1 0 0 0
/ / p1 5 = A d d m o n o t o n i c
/ /
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/ / Note t h a t i n s t r u c t i o n s a r e o p t i m i z e d f o r M c K i n l e y . M c K i n l e y c a n
/ / process t w o b u n d l e s s i m u l t a n e o u s l y a n d t h e r e f o r e w e c o n t i n u o u s l y
/ / try t o f e e d t h e C P U t w o b u n d l e s a n d t h e n a s t o p .
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add r2 = T I _ F L A G S + I A 6 4 _ T A S K _ S I Z E ,r16
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tnat. n z p6 ,p0 = r31 / / g u a r d a g a i n s t N a t a r g u m e n t
( p6 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l
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movl r20 = f s y s c a l l _ g t o d _ d a t a / / l o a d f s y s c a l l g e t t i m e o f d a y d a t a a d d r e s s
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;;
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ld4 r2 = [ r2 ] / / p r o c e s s w o r k p e n d i n g f l a g s
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movl r29 = i t c _ j i t t e r _ d a t a / / i t c _ j i t t e r
add r22 = I A 6 4 _ G T O D _ W A L L _ T I M E _ O F F S E T ,r20 / / w a l l _ t i m e
add r21 = I A 6 4 _ C L K S R C _ M M I O _ O F F S E T ,r20
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mov p r = r30 ,0 x c00 0 / / S e t p r e d i c a t e s a c c o r d i n g t o f u n c t i o n
;;
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and r2 = T I F _ A L L W O R K _ M A S K ,r2
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add r19 = I A 6 4 _ I T C _ L A S T C Y C L E _ O F F S E T ,r29
( p1 5 ) a d d r22 = I A 6 4 _ G T O D _ M O N O _ T I M E _ O F F S E T ,r20 / / m o n o t o n i c _ t i m e
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;;
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add r26 = I A 6 4 _ C L K S R C _ C Y C L E _ L A S T _ O F F S E T ,r20 / / c l k s r c _ c y c l e _ l a s t
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cmp. n e p6 , p0 = 0 , r2 / / F a l l b a c k i f w o r k i s s c h e d u l e d
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( p6 ) b r . c o n d . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
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;;
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/ / Begin c r i t i c a l s e c t i o n
.time_redo :
ld4 . a c q r28 = [ r20 ] / / g t o d _ l o c k . s e q u e n c e , M u s t t a k e f i r s t
;;
and r28 = ~ 1 ,r28 / / A n d m a k e s e q u e n c e e v e n t o f o r c e r e t r y i f o d d
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;;
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ld8 r30 = [ r21 ] / / c l o c k s o u r c e - > m m i o _ p t r
add r24 = I A 6 4 _ C L K S R C _ M U L T _ O F F S E T ,r20
ld4 r2 = [ r29 ] / / i t c _ j i t t e r v a l u e
add r23 = I A 6 4 _ C L K S R C _ S H I F T _ O F F S E T ,r20
add r14 = I A 6 4 _ C L K S R C _ M A S K _ O F F S E T ,r20
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;;
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ld4 r3 = [ r24 ] / / c l o c k s o u r c e m u l t v a l u e
ld8 r14 = [ r14 ] / / c l o c k s o u r c e m a s k v a l u e
cmp. e q p8 ,p9 = 0 ,r30 / / u s e c p u t i m e r i f n o m m i o _ p t r
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;;
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setf. s i g f7 = r3 / / S e t u p f o r m u l t s c a l i n g o f c o u n t e r
( p8 ) c m p . n e p13 ,p0 = r2 ,r0 / / n e e d i t c _ j i t t e r c o m p e n s a t i o n , s e t p13
ld4 r23 = [ r23 ] / / c l o c k s o u r c e s h i f t v a l u e
ld8 r24 = [ r26 ] / / g e t c l k s r c _ c y c l e _ l a s t v a l u e
( p9 ) c m p . e q p13 ,p0 = 0 ,r30 / / i f m m i o _ p t r , c l e a r p13 j i t t e r c o n t r o l
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;;
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.pred .rel .mutex p8 ,p9
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MOV_ F R O M _ I T C ( p8 , p6 , r2 , r10 ) / / C P U _ T I M E R . 3 6 c l o c k s l a t e n c y ! ! !
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( p9 ) l d8 r2 = [ r30 ] / / M M I O _ T I M E R . C o u l d a l s o h a v e l a t e n c y i s s u e s . .
( p1 3 ) l d8 r25 = [ r19 ] / / g e t i t c _ l a s t c y c l e v a l u e
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ld8 r9 = [ r22 ] ,I A 6 4 _ T I M E _ S N _ S P E C _ S N S E C _ O F F S E T / / s e c
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;;
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ld8 r8 = [ r22 ] ,- I A 6 4 _ T I M E _ S N _ S P E C _ S N S E C _ O F F S E T / / s n s e c
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( p1 3 ) s u b r3 = r25 ,r2 / / D i f f n e e d e d b e f o r e c o m p a r i s o n ( t h a n k s d a v i d m )
;;
( p1 3 ) c m p . g t . u n c p6 ,p7 = r3 ,r0 / / c h e c k i f i t i s l e s s t h a n l a s t . p6 ,p7 c l e a r e d
sub r10 = r2 ,r24 / / c u r r e n t _ c y c l e - l a s t _ c y c l e
;;
( p6 ) s u b r10 = r25 ,r24 / / t i m e w e g o t w a s l e s s t h a n l a s t _ c y c l e
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( p7 ) m o v a r . c c v = r25 / / m o r e t h a n l a s t _ c y c l e . P r e p f o r c m p x c h g
;;
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( p7 ) c m p x c h g 8 . r e l r3 = [ r19 ] ,r2 ,a r . c c v
;;
( p7 ) c m p . n e p7 ,p0 = r25 ,r3 / / i f c m p x c h g n o t s u c c e s s f u l
;;
( p7 ) s u b r10 = r3 ,r24 / / t h e n u s e n e w l a s t _ c y c l e i n s t e a d
;;
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and r10 = r10 ,r14 / / A p p l y m a s k
;;
setf. s i g f8 = r10
nop. i 1 2 3
;;
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/ / fault c h e c k t a k e s 5 c y c l e s a n d w e h a v e s p a r e t i m e
EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r31 , 3 )
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xmpy. l f8 = f8 ,f7 / / n s e c _ p e r _ c y c * ( c o u n t e r - l a s t _ c o u n t e r )
;;
getf. s i g r2 = f8
mf
;;
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ld4 r10 = [ r20 ] / / g t o d _ l o c k . s e q u e n c e
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add r8 = r8 ,r2 / / A d d x t i m e . n s e c s
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;;
shr. u r8 = r8 ,r23 / / s h i f t b y f a c t o r
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cmp4 . n e p7 ,p0 = r28 ,r10
( p7 ) b r . c o n d . d p n t . f e w . t i m e _ r e d o / / s e q u e n c e n u m b e r c h a n g e d , r e d o
/ / End c r i t i c a l s e c t i o n .
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/ / Now r8 =tv - > t v _ n s e c a n d r9 =tv - > t v _ s e c
mov r10 = r0
movl r2 = 1 0 0 0 0 0 0 0 0 0
add r23 = I A 6 4 _ T I M E S P E C _ T V _ N S E C _ O F F S E T , r31
( p1 4 ) m o v l r3 = 2 3 6 1 1 8 3 2 4 1 4 3 4 8 2 2 6 0 7 / / P r e p f o r / 1 0 0 0 h a c k
;;
.time_normalize :
mov r21 = r8
cmp. g e p6 ,p0 = r8 ,r2
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( p1 4 ) s h r . u r20 = r8 , 3 / / W e c a n r e p e a t t h i s i f n e c e s s a r y j u s t w a s t i n g t i m e
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;;
( p1 4 ) s e t f . s i g f8 = r20
( p6 ) s u b r8 = r8 ,r2
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( p6 ) a d d r9 = 1 ,r9 / / t w o n o p s b e f o r e t h e b r a n c h .
( p1 4 ) s e t f . s i g f7 = r3 / / C h a n c e s f o r r e p e a t s a r e 1 i n 1 0 0 0 0 f o r g e t t o d
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( p6 ) b r . c o n d . d p n t . f e w . t i m e _ n o r m a l i z e
;;
/ / Divided b y 8 t h o u g h s h i f t . N o w d i v i d e b y 1 2 5
/ / The c o m p i l e r w a s a b l e t o d o t h a t w i t h a m u l t i p l y
/ / and a s h i f t a n d w e d o t h e s a m e
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EX( . f a i l _ e f a u l t , p r o b e . w . f a u l t r23 , 3 ) / / T h i s a l s o c o s t s 5 c y c l e s
( p1 4 ) x m p y . h u f8 = f8 , f7 / / x m p y h a s 5 c y c l e s l a t e n c y s o u s e i t
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;;
( p1 4 ) g e t f . s i g r2 = f8
;;
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mov r8 = r0
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( p1 4 ) s h r . u r21 = r2 , 4
;;
EX( . f a i l _ e f a u l t , s t 8 [ r31 ] = r9 )
EX( . f a i l _ e f a u l t , s t 8 [ r23 ] = r21 )
FSYS_ R E T U R N
.fail_einval :
mov r8 = E I N V A L
mov r10 = - 1
FSYS_ R E T U R N
.fail_efault :
mov r8 = E F A U L T
mov r10 = - 1
FSYS_ R E T U R N
END( f s y s _ g e t t i m e o f d a y )
ENTRY( f s y s _ c l o c k _ g e t t i m e )
.prologue
.altrp b6
.body
cmp4 . l t u p6 , p0 = C L O C K _ M O N O T O N I C , r32
/ / Fallback i f t h i s i s n o t C L O C K _ R E A L T I M E o r C L O C K _ M O N O T O N I C
( p6 ) b r . s p n t . f e w f s y s _ f a l l b a c k _ s y s c a l l
mov r31 = r33
shl r30 = r32 ,1 5
br. m a n y . g e t t i m e
END( f s y s _ c l o c k _ g e t t i m e )
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/ *
* fsys_ g e t c p u d o e s n ' t u s e t h e t h i r d p a r a m e t e r i n t h i s i m p l e m e n t a t i o n . I t r e a d s
* current_ t h r e a d _ i n f o ( ) - > c p u a n d c o r r e s p o n d i n g n o d e i n c p u _ t o _ n o d e _ m a p .
* /
ENTRY( f s y s _ g e t c p u )
.prologue
.altrp b6
.body
;;
add r2 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r16
tnat. n z p6 ,p0 = r32 / / g u a r d a g a i n s t N a T a r g u m e n t
add r3 =TI_CPU + I A 6 4 _ T A S K _ S I Z E ,r16
;;
ld4 r3 = [ r3 ] / / M r3 = t h r e a d _ i n f o - > c p u
ld4 r2 = [ r2 ] / / M r2 = t h r e a d _ i n f o - > f l a g s
( p6 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l / / B
;;
tnat. n z p7 ,p0 = r33 / / I g u a r d a g a i n s t N a T a r g u m e n t
( p7 ) b r . c o n d . s p n t . f e w . f a i l _ e i n v a l / / B
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;;
cmp. n e p6 ,p0 =r32 ,r0
cmp. n e p7 ,p0 =r33 ,r0
;;
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# ifdef C O N F I G _ N U M A
movl r17 =cpu_to_node_map
;;
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EX( . f a i l _ e f a u l t , ( p6 ) p r o b e . w . f a u l t r32 , 3 ) / / M T h i s t a k e s 5 c y c l e s
EX( . f a i l _ e f a u l t , ( p7 ) p r o b e . w . f a u l t r33 , 3 ) / / M T h i s t a k e s 5 c y c l e s
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shladd r18 =r3 ,1 ,r17
;;
ld2 r20 = [ r18 ] / / r20 = c p u _ t o _ n o d e _ m a p [ c p u ]
and r2 = T I F _ A L L W O R K _ M A S K ,r2
;;
cmp. n e p8 ,p0 =0 ,r2
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
;;
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EX( . f a i l _ e f a u l t , ( p6 ) s t 4 [ r32 ] = r3 )
EX( . f a i l _ e f a u l t , ( p7 ) s t 2 [ r33 ] = r20 )
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mov r8 =0
;;
# else
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EX( . f a i l _ e f a u l t , ( p6 ) p r o b e . w . f a u l t r32 , 3 ) / / M T h i s t a k e s 5 c y c l e s
EX( . f a i l _ e f a u l t , ( p7 ) p r o b e . w . f a u l t r33 , 3 ) / / M T h i s t a k e s 5 c y c l e s
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and r2 = T I F _ A L L W O R K _ M A S K ,r2
;;
cmp. n e p8 ,p0 =0 ,r2
( p8 ) b r . s p n t . m a n y f s y s _ f a l l b a c k _ s y s c a l l
;;
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EX( . f a i l _ e f a u l t , ( p6 ) s t 4 [ r32 ] = r3 )
EX( . f a i l _ e f a u l t , ( p7 ) s t 2 [ r33 ] = r0 )
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mov r8 =0
;;
# endif
FSYS_ R E T U R N
END( f s y s _ g e t c p u )
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ENTRY( f s y s _ f a l l b a c k _ s y s c a l l )
.prologue
.altrp b6
.body
/ *
* We o n l y g e t h e r e f r o m l i g h t - w e i g h t s y s c a l l h a n d l e r s . T h u s , w e a l r e a d y
* know t h a t r15 c o n t a i n s a v a l i d s y s c a l l n u m b e r . N o n e e d t o r e - c h e c k .
* /
adds r17 = - 1 0 2 4 ,r15
movl r14 =sys_call_table
;;
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RSM_ P S R _ I ( p0 , r26 , r27 )
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shladd r18 =r17 ,3 ,r14
;;
ld8 r18 = [ r18 ] / / l o a d n o r m a l ( h e a v y - w e i g h t ) s y s c a l l e n t r y - p o i n t
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MOV_ F R O M _ P S R ( p0 , r29 , r26 ) / / r e a d p s r ( 1 2 c y c l o a d l a t e n c y )
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mov r27 =ar . r s c
mov r21 =ar . f p s r
mov r26 =ar . p f s
END( f s y s _ f a l l b a c k _ s y s c a l l )
/* FALL THROUGH */
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GLOBAL_ E N T R Y ( f s y s _ b u b b l e _ d o w n )
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.prologue
.altrp b6
.body
/ *
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* We g e t h e r e f o r s y s c a l l s t h a t d o n ' t h a v e a l i g h t w e i g h t
* handler. F o r t h o s e , w e n e e d t o b u b b l e d o w n i n t o t h e k e r n e l
* and t h a t r e q u i r e s s e t t i n g u p a m i n i m a l p t _ r e g s s t r u c t u r e ,
* and i n i t i a l i z i n g t h e C P U s t a t e m o r e o r l e s s a s i f a n
* interruption h a d o c c u r r e d . T o m a k e s y s c a l l - r e s t a r t s w o r k ,
* we s e t u p p t _ r e g s s u c h t h a t c r _ i i p p o i n t s t o t h e s e c o n d
* instruction i n s y s c a l l _ v i a _ b r e a k . D e c r e m e n t i n g t h e I P
* hence w i l l r e s t a r t t h e s y s c a l l v i a b r e a k a n d n o t
* decrementing I P w i l l r e t u r n u s t o t h e c a l l e r , a s u s u a l .
* Note t h a t w e p r e s e r v e t h e v a l u e o f p s r . p p r a t h e r t h a n
* initializing i t f r o m d c r . p p . T h i s m a k e s i t p o s s i b l e t o
* distinguish f s y s c a l l e x e c u t i o n f r o m o t h e r p r i v i l e g e d
* execution.
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*
* On e n t r y :
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* - normal f s y s c a l l h a n d l e r r e g i s t e r u s a g e , e x c e p t
* that w e a l s o h a v e :
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* - r18 : address o f s y s c a l l e n t r y p o i n t
* - r21 : ar. f p s r
* - r26 : ar. p f s
* - r27 : ar. r s c
* - r29 : psr
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*
* We u s e d t o c l e a r s o m e P S R b i t s h e r e b u t t h a t r e q u i r e s s l o w
* serialization. F o r t u n t e l y , t h a t i s n ' t r e a l l y n e c e s s a r y .
* The r a t i o n a l e i s a s f o l l o w s : w e u s e d t o c l e a r b i t s
* ~ PSR_ P R E S E R V E D _ B I T S i n P S R . L . S i n c e
* PSR_ P R E S E R V E D _ B I T S = =PSR . { U P ,M F L ,M F H ,P K ,D T ,P P ,S P ,R T ,I C } , w e
* ended u p c l e a r i n g P S R . { B E ,A C ,I ,D F L ,D F H ,D I ,D B ,S I ,T B } .
* However,
*
* PSR. B E : a l r e a d y i s t u r n e d o f f i n _ _ k e r n e l _ s y s c a l l _ v i a _ e p c ( )
* PSR. A C : d o n ' t c a r e ( k e r n e l n o r m a l l y t u r n s P S R . A C o n )
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* PSR. I : a l r e a d y t u r n e d o f f b y t h e t i m e f s y s _ b u b b l e _ d o w n g e t s
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* invoked
* PSR. D F L : a l w a y s 0 ( k e r n e l n e v e r t u r n s i t o n )
* PSR. D F H : d o n ' t c a r e - - - k e r n e l n e v e r t o u c h e s f32 - f12 7 o n i t s o w n
* initiative
* PSR. D I : a l w a y s 0 ( k e r n e l n e v e r t u r n s i t o n )
* PSR. S I : a l w a y s 0 ( k e r n e l n e v e r t u r n s i t o n )
* PSR. D B : d o n ' t c a r e - - - k e r n e l n e v e r e n a b l e s k e r n e l - l e v e l
* breakpoints
* PSR. T B : m u s t b e 0 a l r e a d y ; if it wasn't zero on entry to
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* _ _ kernel_ s y s c a l l _ v i a _ e p c , t h e b r a n c h t o f s y s _ b u b b l e _ d o w n
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* will t r i g g e r a t a k e n b r a n c h ; the taken-trap-handler then
* converts t h e s y s c a l l i n t o a b r e a k - b a s e d s y s t e m - c a l l .
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* /
/ *
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* Reading p s r . l g i v e s u s o n l y b i t s 0 - 3 1 , p s r . i t , a n d p s r . m c .
* The r e s t w e h a v e t o s y n t h e s i z e .
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* /
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# define P S R _ O N E _ B I T S ( ( 3 < < I A 6 4 _ P S R _ C P L 0 _ B I T ) \
| ( 0 x1 < < I A 6 4 _ P S R _ R I _ B I T ) \
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| IA6 4 _ P S R _ B N | I A 6 4 _ P S R _ I )
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invala / / M 0 | 1
movl r14 =ia64_ret_from_syscall / / X
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[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
nop. m 0
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movl r28 =__kernel_syscall_via_break / / X c r e a t e c r . i i p
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;;
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
2005-04-27 21:21:26 -07:00
mov r2 =r16 / / A g e t t a s k a d d r t o a d d l - a d d r e s s a b l e r e g i s t e r
adds r16 =IA64_TASK_THREAD_ON_USTACK_OFFSET ,r16 / / A
mov r31 =pr / / I 0 s a v e p r ( 2 c y c )
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;;
2005-04-27 21:21:26 -07:00
st1 [ r16 ] =r0 / / M 2 | 3 c l e a r c u r r e n t - > t h r e a d . o n _ u s t a c k f l a g
addl r22 =IA64_RBS_OFFSET ,r2 / / A c o m p u t e b a s e o f R B S
add r3 =TI_FLAGS + I A 6 4 _ T A S K _ S I Z E ,r2 / / A
2005-04-16 15:20:36 -07:00
;;
2005-04-27 21:21:26 -07:00
ld4 r3 = [ r3 ] / / M 0 | 1 r3 = c u r r e n t _ t h r e a d _ i n f o ( ) - > f l a g s
lfetch. f a u l t . e x c l . n t 1 [ r22 ] / / M 0 | 1 p r e f e t c h r e g i s t e r b a c k i n g - s t o r e
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
nop. i 0
2005-04-16 15:20:36 -07:00
;;
2005-04-27 21:21:26 -07:00
mov a r . r s c =0 / / M 2 s e t e n f o r c e d l a z y m o d e , p l 0 , L E , l o a d r s =0
2012-07-25 07:56:04 +02:00
# ifdef C O N F I G _ V I R T _ C P U _ A C C O U N T I N G _ N A T I V E
2009-03-04 21:05:38 +09:00
MOV_ F R O M _ I T C ( p0 , p6 , r30 , r23 ) / / M g e t c y c l e f o r a c c o u n t i n g
2008-01-29 14:27:30 +09:00
# else
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
nop. m 0
2008-01-29 14:27:30 +09:00
# endif
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
nop. i 0
;;
2005-04-27 21:21:26 -07:00
mov r23 =ar . b s p s t o r e / / M 2 ( 1 2 c y c ) s a v e a r . b s p s t o r e
mov. m r24 =ar . r n a t / / M 2 ( 5 c y c ) r e a d a r . r n a t ( d u a l - i s s u e s ! )
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
nop. i 0
2005-04-16 15:20:36 -07:00
;;
2005-04-27 21:21:26 -07:00
mov a r . b s p s t o r e =r22 / / M 2 ( 6 c y c ) s w i t c h t o k e r n e l R B S
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
movl r8 =PSR_ONE_BITS / / X
2005-04-16 15:20:36 -07:00
;;
2005-04-27 21:21:26 -07:00
mov r25 =ar . u n a t / / M 2 ( 5 c y c ) s a v e a r . u n a t
mov r19 =b6 / / I 0 s a v e b6 ( 2 c y c )
mov r20 =r1 / / A s a v e c a l l e r ' s g p i n r20
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
;;
2005-04-27 21:21:26 -07:00
or r29 =r8 ,r29 / / A c o n s t r u c t c r . i p s r v a l u e t o s a v e
mov b6 =r18 / / I 0 c o p y s y s c a l l e n t r y - p o i n t t o b6 ( 7 c y c )
addl r1 =IA64_STK_OFFSET - I A 6 4 _ P T _ R E G S _ S I Z E ,r2 / / A c o m p u t e b a s e o f m e m o r y s t a c k
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
2005-04-27 21:21:26 -07:00
mov r18 =ar . b s p / / M 2 s a v e ( k e r n e l ) a r . b s p ( 1 2 c y c )
cmp. n e p K S t k ,p U S t k =r0 ,r0 / / A s e t p K S t k < - 0 , p U S t k < - 1
br. c a l l . s p t k . m a n y b7 =ia64_syscall_setup / / B
2005-04-16 15:20:36 -07:00
;;
2012-07-25 07:56:04 +02:00
# ifdef C O N F I G _ V I R T _ C P U _ A C C O U N T I N G _ N A T I V E
2008-01-29 14:27:30 +09:00
/ / mov. m r30 =ar . i t c i s c a l l e d i n a d v a n c e
add r16 =TI_AC_STAMP + I A 6 4 _ T A S K _ S I Z E ,r2
add r17 =TI_AC_LEAVE + I A 6 4 _ T A S K _ S I Z E ,r2
;;
ld8 r18 = [ r16 ] ,T I _ A C _ S T I M E - T I _ A C _ S T A M P / / t i m e a t l a s t c h e c k i n k e r n e l
ld8 r19 = [ r17 ] ,T I _ A C _ U T I M E - T I _ A C _ L E A V E / / t i m e a t l e a v e k e r n e l
;;
ld8 r20 = [ r16 ] ,T I _ A C _ S T A M P - T I _ A C _ S T I M E / / c u m u l a t e d s t i m e
ld8 r21 = [ r17 ] / / c u m u l a t e d u t i m e
sub r22 =r19 ,r18 / / s t i m e b e f o r e l e a v e k e r n e l
;;
st8 [ r16 ] =r30 ,T I _ A C _ S T I M E - T I _ A C _ S T A M P / / u p d a t e s t a m p
sub r18 =r30 ,r19 / / e l a p s e d t i m e i n u s e r m o d e
;;
add r20 =r20 ,r22 / / s u m s t i m e
add r21 =r21 ,r18 / / s u m u t i m e
;;
st8 [ r16 ] =r20 / / u p d a t e s t i m e
st8 [ r17 ] =r21 / / u p d a t e u t i m e
;;
# endif
2005-04-27 21:21:26 -07:00
mov a r . r s c =0x3 / / M 2 s e t e a g e r m o d e , p l 0 , L E , l o a d r s =0
mov r p =r14 / / I 0 s e t t h e r e a l r e t u r n a d d r
2005-05-05 06:40:00 -07:00
and r3 =_TIF_SYSCALL_TRACEAUDIT ,r3 / / A
2005-04-16 15:20:36 -07:00
;;
2009-03-04 21:05:36 +09:00
SSM_ P S R _ I ( p0 , p6 , r22 ) / / M 2 w e ' r e o n k e r n e l s t a c k s n o w , r e e n a b l e i r q s
2005-05-05 06:40:00 -07:00
cmp. e q p8 ,p0 =r3 ,r0 / / A
2005-04-27 21:21:26 -07:00
( p1 0 ) b r . c o n d . s p n t . m a n y i a64 _ r e t _ f r o m _ s y s c a l l / / B r e t u r n i f b a d c a l l - f r a m e o r r15 i s a N a T
[IA64] Reschedule fsys_bubble_down().
Improvements come from eliminating srlz.i, not scheduling AR/CR-reads
too early (while there are others still pending), scheduling the
backing-store switch as well as possible, splitting the BBB bundle
into a MIB/MBB pair.
Why is it safe to eliminate the srlz.i? Observe
that we used to clear bits ~PSR_PRESERVED_BITS in PSR.L. Since
PSR_PRESERVED_BITS==PSR.{UP,MFL,MFH,PK,DT,PP,SP,RT,IC}, we
ended up clearing PSR.{BE,AC,I,DFL,DFH,DI,DB,SI,TB}. However,
PSR.BE : already is turned off in __kernel_syscall_via_epc()
PSR.AC : don't care (kernel normally turns PSR.AC on)
PSR.I : already turned off by the time fsys_bubble_down gets invoked
PSR.DFL: always 0 (kernel never turns it on)
PSR.DFH: don't care --- kernel never touches f32-f127 on its own
initiative
PSR.DI : always 0 (kernel never turns it on)
PSR.SI : always 0 (kernel never turns it on)
PSR.DB : don't care --- kernel never enables kernel-level breakpoints
PSR.TB : must be 0 already; if it wasn't zero on entry to
__kernel_syscall_via_epc, the branch to fsys_bubble_down
will trigger a taken branch; the taken-trap-handler then
converts the syscall into a break-based system-call.
In other words: all the bits we're clearying are either 0 already or
are don't cares! Thus, we don't have to write PSR.L at all and we
don't have to do a srlz.i either.
Good for another ~20 cycle improvement for EPC-based heavy-weight
syscalls.
Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-27 21:20:51 -07:00
nop. m 0
2005-04-27 21:21:26 -07:00
( p8 ) b r . c a l l . s p t k . m a n y b6 =b6 / / B ( i g n o r e r e t u r n a d d r e s s )
br. c o n d . s p n t i a64 _ t r a c e _ s y s c a l l / / B
2015-06-02 11:42:02 -07:00
END( f s y s _ b u b b l e _ d o w n )
2005-04-16 15:20:36 -07:00
.rodata
.align 8
2015-06-02 11:42:02 -07:00
.globl fsyscall_table
2005-04-16 15:20:36 -07:00
2015-06-02 11:42:02 -07:00
data8 f s y s _ b u b b l e _ d o w n
fsyscall_table :
2005-04-16 15:20:36 -07:00
data8 f s y s _ n i _ s y s c a l l
data8 0 / / e x i t / / 1 0 2 5
data8 0 / / r e a d
data8 0 / / w r i t e
data8 0 / / o p e n
data8 0 / / c l o s e
data8 0 / / c r e a t / / 1 0 3 0
data8 0 / / l i n k
data8 0 / / u n l i n k
data8 0 / / e x e c v e
data8 0 / / c h d i r
data8 0 / / f c h d i r / / 1 0 3 5
data8 0 / / u t i m e s
data8 0 / / m k n o d
data8 0 / / c h m o d
data8 0 / / c h o w n
data8 0 / / l s e e k / / 1 0 4 0
data8 f s y s _ g e t p i d / / g e t p i d
2013-03-18 17:03:03 -07:00
data8 0 / / g e t p p i d
2005-04-16 15:20:36 -07:00
data8 0 / / m o u n t
data8 0 / / u m o u n t
data8 0 / / s e t u i d / / 1 0 4 5
data8 0 / / g e t u i d
data8 0 / / g e t e u i d
data8 0 / / p t r a c e
data8 0 / / a c c e s s
data8 0 / / s y n c / / 1 0 5 0
data8 0 / / f s y n c
data8 0 / / f d a t a s y n c
data8 0 / / k i l l
data8 0 / / r e n a m e
data8 0 / / m k d i r / / 1 0 5 5
data8 0 / / r m d i r
data8 0 / / d u p
data8 0 / / p i p e
data8 0 / / t i m e s
data8 0 / / b r k / / 1 0 6 0
data8 0 / / s e t g i d
data8 0 / / g e t g i d
data8 0 / / g e t e g i d
data8 0 / / a c c t
data8 0 / / i o c t l / / 1 0 6 5
data8 0 / / f c n t l
data8 0 / / u m a s k
data8 0 / / c h r o o t
data8 0 / / u s t a t
data8 0 / / d u p2 / / 1 0 7 0
data8 0 / / s e t r e u i d
data8 0 / / s e t r e g i d
data8 0 / / g e t r e s u i d
data8 0 / / s e t r e s u i d
data8 0 / / g e t r e s g i d / / 1 0 7 5
data8 0 / / s e t r e s g i d
data8 0 / / g e t g r o u p s
data8 0 / / s e t g r o u p s
data8 0 / / g e t p g i d
data8 0 / / s e t p g i d / / 1 0 8 0
data8 0 / / s e t s i d
data8 0 / / g e t s i d
data8 0 / / s e t h o s t n a m e
data8 0 / / s e t r l i m i t
data8 0 / / g e t r l i m i t / / 1 0 8 5
data8 0 / / g e t r u s a g e
data8 f s y s _ g e t t i m e o f d a y / / g e t t i m e o f d a y
data8 0 / / s e t t i m e o f d a y
data8 0 / / s e l e c t
data8 0 / / p o l l / / 1 0 9 0
data8 0 / / s y m l i n k
data8 0 / / r e a d l i n k
data8 0 / / u s e l i b
data8 0 / / s w a p o n
data8 0 / / s w a p o f f / / 1 0 9 5
data8 0 / / r e b o o t
data8 0 / / t r u n c a t e
data8 0 / / f t r u n c a t e
data8 0 / / f c h m o d
data8 0 / / f c h o w n / / 1 1 0 0
data8 0 / / g e t p r i o r i t y
data8 0 / / s e t p r i o r i t y
data8 0 / / s t a t f s
data8 0 / / f s t a t f s
data8 0 / / g e t t i d / / 1 1 0 5
data8 0 / / s e m g e t
data8 0 / / s e m o p
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