linux/include/dt-bindings/clock/dm816.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright 2017 Texas Instruments, Inc.
 */
#ifndef __DT_BINDINGS_CLK_DM816_H
#define __DT_BINDINGS_CLK_DM816_H

#define DM816_CLKCTRL_OFFSET	0x0
#define DM816_CLKCTRL_INDEX(offset)	((offset) - DM816_CLKCTRL_OFFSET)

/* default clocks */
#define DM816_USB_OTG_HS_CLKCTRL	DM816_CLKCTRL_INDEX(0x58)

/* alwon clocks */
#define DM816_UART1_CLKCTRL	DM816_CLKCTRL_INDEX(0x150)
#define DM816_UART2_CLKCTRL	DM816_CLKCTRL_INDEX(0x154)
#define DM816_UART3_CLKCTRL	DM816_CLKCTRL_INDEX(0x158)
#define DM816_GPIO1_CLKCTRL	DM816_CLKCTRL_INDEX(0x15c)
#define DM816_GPIO2_CLKCTRL	DM816_CLKCTRL_INDEX(0x160)
#define DM816_I2C1_CLKCTRL	DM816_CLKCTRL_INDEX(0x164)
#define DM816_I2C2_CLKCTRL	DM816_CLKCTRL_INDEX(0x168)
#define DM816_TIMER1_CLKCTRL	DM816_CLKCTRL_INDEX(0x170)
#define DM816_TIMER2_CLKCTRL	DM816_CLKCTRL_INDEX(0x174)
#define DM816_TIMER3_CLKCTRL	DM816_CLKCTRL_INDEX(0x178)
#define DM816_TIMER4_CLKCTRL	DM816_CLKCTRL_INDEX(0x17c)
#define DM816_TIMER5_CLKCTRL	DM816_CLKCTRL_INDEX(0x180)
#define DM816_TIMER6_CLKCTRL	DM816_CLKCTRL_INDEX(0x184)
#define DM816_TIMER7_CLKCTRL	DM816_CLKCTRL_INDEX(0x188)
#define DM816_WD_TIMER_CLKCTRL	DM816_CLKCTRL_INDEX(0x18c)
#define DM816_MCSPI1_CLKCTRL	DM816_CLKCTRL_INDEX(0x190)
#define DM816_MAILBOX_CLKCTRL	DM816_CLKCTRL_INDEX(0x194)
#define DM816_SPINBOX_CLKCTRL	DM816_CLKCTRL_INDEX(0x198)
#define DM816_MMC1_CLKCTRL	DM816_CLKCTRL_INDEX(0x1b0)
#define DM816_GPMC_CLKCTRL	DM816_CLKCTRL_INDEX(0x1d0)
#define DM816_DAVINCI_MDIO_CLKCTRL	DM816_CLKCTRL_INDEX(0x1d4)
#define DM816_EMAC1_CLKCTRL	DM816_CLKCTRL_INDEX(0x1d8)
#define DM816_MPU_CLKCTRL	DM816_CLKCTRL_INDEX(0x1dc)
#define DM816_RTC_CLKCTRL	DM816_CLKCTRL_INDEX(0x1f0)
#define DM816_TPCC_CLKCTRL	DM816_CLKCTRL_INDEX(0x1f4)
#define DM816_TPTC0_CLKCTRL	DM816_CLKCTRL_INDEX(0x1f8)
#define DM816_TPTC1_CLKCTRL	DM816_CLKCTRL_INDEX(0x1fc)
#define DM816_TPTC2_CLKCTRL	DM816_CLKCTRL_INDEX(0x200)
#define DM816_TPTC3_CLKCTRL	DM816_CLKCTRL_INDEX(0x204)

#endif
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2019-05-29 07:17:56 -07:00			`/* SPDX-License-Identifier: GPL-2.0-only */`
dt-bindings: clk: add dm816 clkctrl definitions Contains offsets for all dm816 clkctrl main and optional clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> 2017-08-24 15:43:43 +03:00			`/*`
			`* Copyright 2017 Texas Instruments, Inc.`
			`*/`
			`#ifndef __DT_BINDINGS_CLK_DM816_H`
			`#define __DT_BINDINGS_CLK_DM816_H`

			`#define DM816_CLKCTRL_OFFSET 0x0`
			`#define DM816_CLKCTRL_INDEX(offset) ((offset) - DM816_CLKCTRL_OFFSET)`

			`/* default clocks */`
			`#define DM816_USB_OTG_HS_CLKCTRL DM816_CLKCTRL_INDEX(0x58)`

			`/* alwon clocks */`
			`#define DM816_UART1_CLKCTRL DM816_CLKCTRL_INDEX(0x150)`
			`#define DM816_UART2_CLKCTRL DM816_CLKCTRL_INDEX(0x154)`
			`#define DM816_UART3_CLKCTRL DM816_CLKCTRL_INDEX(0x158)`
			`#define DM816_GPIO1_CLKCTRL DM816_CLKCTRL_INDEX(0x15c)`
			`#define DM816_GPIO2_CLKCTRL DM816_CLKCTRL_INDEX(0x160)`
			`#define DM816_I2C1_CLKCTRL DM816_CLKCTRL_INDEX(0x164)`
			`#define DM816_I2C2_CLKCTRL DM816_CLKCTRL_INDEX(0x168)`
			`#define DM816_TIMER1_CLKCTRL DM816_CLKCTRL_INDEX(0x170)`
			`#define DM816_TIMER2_CLKCTRL DM816_CLKCTRL_INDEX(0x174)`
			`#define DM816_TIMER3_CLKCTRL DM816_CLKCTRL_INDEX(0x178)`
			`#define DM816_TIMER4_CLKCTRL DM816_CLKCTRL_INDEX(0x17c)`
			`#define DM816_TIMER5_CLKCTRL DM816_CLKCTRL_INDEX(0x180)`
			`#define DM816_TIMER6_CLKCTRL DM816_CLKCTRL_INDEX(0x184)`
			`#define DM816_TIMER7_CLKCTRL DM816_CLKCTRL_INDEX(0x188)`
			`#define DM816_WD_TIMER_CLKCTRL DM816_CLKCTRL_INDEX(0x18c)`
			`#define DM816_MCSPI1_CLKCTRL DM816_CLKCTRL_INDEX(0x190)`
			`#define DM816_MAILBOX_CLKCTRL DM816_CLKCTRL_INDEX(0x194)`
			`#define DM816_SPINBOX_CLKCTRL DM816_CLKCTRL_INDEX(0x198)`
			`#define DM816_MMC1_CLKCTRL DM816_CLKCTRL_INDEX(0x1b0)`
			`#define DM816_GPMC_CLKCTRL DM816_CLKCTRL_INDEX(0x1d0)`
			`#define DM816_DAVINCI_MDIO_CLKCTRL DM816_CLKCTRL_INDEX(0x1d4)`
			`#define DM816_EMAC1_CLKCTRL DM816_CLKCTRL_INDEX(0x1d8)`
			`#define DM816_MPU_CLKCTRL DM816_CLKCTRL_INDEX(0x1dc)`
			`#define DM816_RTC_CLKCTRL DM816_CLKCTRL_INDEX(0x1f0)`
			`#define DM816_TPCC_CLKCTRL DM816_CLKCTRL_INDEX(0x1f4)`
			`#define DM816_TPTC0_CLKCTRL DM816_CLKCTRL_INDEX(0x1f8)`
			`#define DM816_TPTC1_CLKCTRL DM816_CLKCTRL_INDEX(0x1fc)`
			`#define DM816_TPTC2_CLKCTRL DM816_CLKCTRL_INDEX(0x200)`
			`#define DM816_TPTC3_CLKCTRL DM816_CLKCTRL_INDEX(0x204)`

			`#endif`