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// SPDX-License-Identifier: GPL-2.0
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/*
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* AD5672R , AD5674R , AD5676 , AD5676R , AD5679R ,
* AD5681R , AD5682R , AD5683 , AD5683R , AD5684 ,
* AD5684R , AD5685R , AD5686 , AD5686R
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* Digital to analog converters driver
*
* Copyright 2018 Analog Devices Inc .
*/
# include "ad5686.h"
# include <linux/module.h>
# include <linux/spi/spi.h>
static int ad5686_spi_write ( struct ad5686_state * st ,
u8 cmd , u8 addr , u16 val )
{
struct spi_device * spi = to_spi_device ( st - > dev ) ;
iio:dac:ad5686: Add AD5681R/AD5682R/AD5683/AD5683R support
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-18 18:23:34 +03:00
u8 tx_len , * buf ;
switch ( st - > chip_info - > regmap_type ) {
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case AD5310_REGMAP :
st - > data [ 0 ] . d16 = cpu_to_be16 ( AD5310_CMD ( cmd ) |
val ) ;
buf = & st - > data [ 0 ] . d8 [ 0 ] ;
tx_len = 2 ;
break ;
iio:dac:ad5686: Add AD5681R/AD5682R/AD5683/AD5683R support
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-18 18:23:34 +03:00
case AD5683_REGMAP :
st - > data [ 0 ] . d32 = cpu_to_be32 ( AD5686_CMD ( cmd ) |
AD5683_DATA ( val ) ) ;
buf = & st - > data [ 0 ] . d8 [ 1 ] ;
tx_len = 3 ;
break ;
case AD5686_REGMAP :
st - > data [ 0 ] . d32 = cpu_to_be32 ( AD5686_CMD ( cmd ) |
AD5686_ADDR ( addr ) |
val ) ;
buf = & st - > data [ 0 ] . d8 [ 1 ] ;
tx_len = 3 ;
break ;
default :
return - EINVAL ;
}
return spi_write ( spi , buf , tx_len ) ;
2018-04-11 14:53:17 +03:00
}
static int ad5686_spi_read ( struct ad5686_state * st , u8 addr )
{
struct spi_transfer t [ ] = {
{
. tx_buf = & st - > data [ 0 ] . d8 [ 1 ] ,
. len = 3 ,
. cs_change = 1 ,
} , {
. tx_buf = & st - > data [ 1 ] . d8 [ 1 ] ,
. rx_buf = & st - > data [ 2 ] . d8 [ 1 ] ,
. len = 3 ,
} ,
} ;
struct spi_device * spi = to_spi_device ( st - > dev ) ;
iio:dac:ad5686: Add AD5681R/AD5682R/AD5683/AD5683R support
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-18 18:23:34 +03:00
u8 cmd = 0 ;
2018-04-11 14:53:17 +03:00
int ret ;
2018-12-06 15:38:30 +02:00
switch ( st - > chip_info - > regmap_type ) {
case AD5310_REGMAP :
return - ENOTSUPP ;
case AD5683_REGMAP :
iio:dac:ad5686: Add AD5681R/AD5682R/AD5683/AD5683R support
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-18 18:23:34 +03:00
cmd = AD5686_CMD_READBACK_ENABLE_V2 ;
2018-12-06 15:38:30 +02:00
break ;
case AD5686_REGMAP :
cmd = AD5686_CMD_READBACK_ENABLE ;
break ;
default :
return - EINVAL ;
}
iio:dac:ad5686: Add AD5681R/AD5682R/AD5683/AD5683R support
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-18 18:23:34 +03:00
st - > data [ 0 ] . d32 = cpu_to_be32 ( AD5686_CMD ( cmd ) |
2018-04-11 14:53:17 +03:00
AD5686_ADDR ( addr ) ) ;
st - > data [ 1 ] . d32 = cpu_to_be32 ( AD5686_CMD ( AD5686_CMD_NOOP ) ) ;
ret = spi_sync_transfer ( spi , t , ARRAY_SIZE ( t ) ) ;
if ( ret < 0 )
return ret ;
return be32_to_cpu ( st - > data [ 2 ] . d32 ) ;
}
static int ad5686_spi_probe ( struct spi_device * spi )
{
const struct spi_device_id * id = spi_get_device_id ( spi ) ;
return ad5686_probe ( & spi - > dev , id - > driver_data , id - > name ,
ad5686_spi_write , ad5686_spi_read ) ;
}
static int ad5686_spi_remove ( struct spi_device * spi )
{
return ad5686_remove ( & spi - > dev ) ;
}
static const struct spi_device_id ad5686_spi_id [ ] = {
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{ " ad5310r " , ID_AD5310R } ,
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{ " ad5672r " , ID_AD5672R } ,
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{ " ad5674r " , ID_AD5674R } ,
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{ " ad5676 " , ID_AD5676 } ,
{ " ad5676r " , ID_AD5676R } ,
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{ " ad5679r " , ID_AD5679R } ,
iio:dac:ad5686: Add AD5681R/AD5682R/AD5683/AD5683R support
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-18 18:23:34 +03:00
{ " ad5681r " , ID_AD5681R } ,
{ " ad5682r " , ID_AD5682R } ,
{ " ad5683 " , ID_AD5683 } ,
{ " ad5683r " , ID_AD5683R } ,
2018-04-11 14:53:17 +03:00
{ " ad5684 " , ID_AD5684 } ,
{ " ad5684r " , ID_AD5684R } ,
{ " ad5685 " , ID_AD5685R } , /* Does not exist */
{ " ad5685r " , ID_AD5685R } ,
{ " ad5686 " , ID_AD5686 } ,
{ " ad5686r " , ID_AD5686R } ,
{ }
} ;
MODULE_DEVICE_TABLE ( spi , ad5686_spi_id ) ;
static struct spi_driver ad5686_spi_driver = {
. driver = {
. name = " ad5686 " ,
} ,
. probe = ad5686_spi_probe ,
. remove = ad5686_spi_remove ,
. id_table = ad5686_spi_id ,
} ;
module_spi_driver ( ad5686_spi_driver ) ;
MODULE_AUTHOR ( " Stefan Popa <stefan.popa@analog.com> " ) ;
MODULE_DESCRIPTION ( " Analog Devices AD5686 and similar multi-channel DACs " ) ;
MODULE_LICENSE ( " GPL v2 " ) ;