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# SPDX-License-Identifier: GPL-2.0
usb: Introduce DesignWare USB3 DRD Driver
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.
Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.
The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.
More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.
While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.
[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-19 19:10:58 +04:00
config USB_DWC3
tristate "DesignWare USB3 DRD Core Support"
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depends on (USB || USB_GADGET) && HAS_DMA
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select USB_XHCI_PLATFORM if USB_XHCI_HCD
usb: Introduce DesignWare USB3 DRD Driver
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.
Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.
The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.
More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.
While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.
[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-19 19:10:58 +04:00
help
Say Y or M here if your system has a Dual Role SuperSpeed
USB controller based on the DesignWare USB3 IP Core.
If you choose to build this driver is a dynamically linked
module, the module will be called dwc3.ko.
if USB_DWC3
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config USB_DWC3_ULPI
bool "Register ULPI PHY Interface"
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depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
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help
Select this if you have ULPI type PHY attached to your DWC3
controller.
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choice
bool "DWC3 Mode Selection"
default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
default USB_DWC3_HOST if (USB && !USB_GADGET)
default USB_DWC3_GADGET if (!USB && USB_GADGET)
config USB_DWC3_HOST
bool "Host only mode"
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depends on USB=y || USB=USB_DWC3
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help
Select this when you want to use DWC3 in host mode only,
thereby the gadget feature will be regressed.
config USB_DWC3_GADGET
bool "Gadget only mode"
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depends on USB_GADGET=y || USB_GADGET=USB_DWC3
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help
Select this when you want to use DWC3 in gadget mode only,
thereby the host feature will be regressed.
config USB_DWC3_DUAL_ROLE
bool "Dual Role mode"
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depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
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depends on (EXTCON=y || EXTCON=USB_DWC3)
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help
This is the default mode of working of DWC3 controller where
both host and gadget features are enabled.
endchoice
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comment "Platform Glue Driver Support"
config USB_DWC3_OMAP
tristate "Texas Instruments OMAP5 and similar Platforms"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
depends on EXTCON || !EXTCON
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depends on OF
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default USB_DWC3
help
Some platforms from Texas Instruments like OMAP5, DRA7xxx and
AM437x use this IP for USB2/3 functionality.
Say 'Y' or 'M' here if you have one such device
config USB_DWC3_EXYNOS
tristate "Samsung Exynos Platform"
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depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
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default USB_DWC3
help
Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
say 'Y' or 'M' if you have one such device.
config USB_DWC3_PCI
tristate "PCIe-based Platforms"
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depends on USB_PCI && ACPI
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default USB_DWC3
help
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If you're using the DesignWare Core IP with a PCIe (but not HAPS
platform), please say 'Y' or 'M' here.
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2018-06-13 00:26:43 +03:00
config USB_DWC3_HAPS
tristate "Synopsys PCIe-based HAPS Platforms"
depends on USB_PCI
default USB_DWC3
help
If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
platform, please say 'Y' or 'M' here.
2013-06-26 16:14:06 +04:00
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config USB_DWC3_KEYSTONE
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tristate "Texas Instruments Keystone2/AM654 Platforms"
depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
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default USB_DWC3
help
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Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
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Say 'Y' or 'M' here if you have one such device
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config USB_DWC3_MESON_G12A
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tristate "Amlogic Meson G12A Platforms"
depends on OF && COMMON_CLK
depends on ARCH_MESON || COMPILE_TEST
default USB_DWC3
select USB_ROLE_SWITCH
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select REGMAP_MMIO
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help
Support USB2/3 functionality in Amlogic G12A platforms.
Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_OF_SIMPLE
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tristate "Generic OF Simple Glue Layer"
depends on OF && COMMON_CLK
default USB_DWC3
help
Support USB2/3 functionality in simple SoC integrations.
Currently supports Xilinx and Qualcomm DWC USB3 IP.
Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_ST
tristate "STMicroelectronics Platforms"
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depends on (ARCH_STI || COMPILE_TEST) && OF
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default USB_DWC3
help
STMicroelectronics SoCs with one DesignWare Core USB3 IP
inside (i.e. STiH407).
Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_QCOM
tristate "Qualcomm Platform"
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depends on ARCH_QCOM || COMPILE_TEST
depends on EXTCON || !EXTCON
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depends on (OF || ACPI)
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default USB_DWC3
help
Some Qualcomm SoCs use DesignWare Core IP for USB2/3
functionality.
This driver also handles Qscratch wrapper which is needed
for peripheral mode support.
Say 'Y' or 'M' if you have one such device.
usb: Introduce DesignWare USB3 DRD Driver
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.
Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.
The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.
More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.
While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.
[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-19 19:10:58 +04:00
endif