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# ifndef _EDAC_MCE_AMD_H
# define _EDAC_MCE_AMD_H
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# include <linux/notifier.h>
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# include <asm/mce.h>
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# define EC(x) ((x) & 0xffff)
# define XEC(x, mask) (((x) >> 16) & mask)
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# define LOW_SYNDROME(x) (((x) >> 15) & 0xff)
# define HIGH_SYNDROME(x) (((x) >> 24) & 0xff)
# define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010)
# define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100)
# define BUS_ERROR(x) (((x) & 0xF800) == 0x0800)
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# define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400)
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# define TT(x) (((x) >> 2) & 0x3)
# define TT_MSG(x) tt_msgs[TT(x)]
# define II(x) (((x) >> 2) & 0x3)
# define II_MSG(x) ii_msgs[II(x)]
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# define LL(x) ((x) & 0x3)
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# define LL_MSG(x) ll_msgs[LL(x)]
# define TO(x) (((x) >> 8) & 0x1)
# define TO_MSG(x) to_msgs[TO(x)]
# define PP(x) (((x) >> 9) & 0x3)
# define PP_MSG(x) pp_msgs[PP(x)]
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# define UU(x) (((x) >> 8) & 0x3)
# define UU_MSG(x) uu_msgs[UU(x)]
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# define R4(x) (((x) >> 4) & 0xf)
# define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
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extern const char * const pp_msgs [ ] ;
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enum tt_ids {
TT_INSTR = 0 ,
TT_DATA ,
TT_GEN ,
TT_RESV ,
} ;
enum ll_ids {
LL_RESV = 0 ,
LL_L1 ,
LL_L2 ,
LL_LG ,
} ;
enum ii_ids {
II_MEM = 0 ,
II_RESV ,
II_IO ,
II_GEN ,
} ;
enum rrrr_ids {
R4_GEN = 0 ,
R4_RD ,
R4_WR ,
R4_DRD ,
R4_DWR ,
R4_IRD ,
R4_PREF ,
R4_EVICT ,
R4_SNOOP ,
} ;
/*
* per - family decoder ops
*/
struct amd_decoder_ops {
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bool ( * mc0_mce ) ( u16 , u8 ) ;
bool ( * mc1_mce ) ( u16 , u8 ) ;
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bool ( * mc2_mce ) ( u16 , u8 ) ;
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} ;
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void amd_report_gart_errors ( bool ) ;
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void amd_register_ecc_decoder ( void ( * f ) ( int , struct mce * ) ) ;
void amd_unregister_ecc_decoder ( void ( * f ) ( int , struct mce * ) ) ;
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int amd_decode_mce ( struct notifier_block * nb , unsigned long val , void * data ) ;
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# endif /* _EDAC_MCE_AMD_H */