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/ *
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* arch/ a r m / m a c h - h72 0 x / i n c l u d e / m a c h / e n t r y - m a c r o . S
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*
* Low- l e v e l I R Q h e l p e r m a c r o s f o r H y n i x H M S 7 2 0 x b a s e d p l a t f o r m s
*
* This f i l e i s l i c e n s e d u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c
* License v e r s i o n 2 . T h i s p r o g r a m i s l i c e n s e d " a s i s " w i t h o u t a n y
* warranty o f a n y k i n d , w h e t h e r e x p r e s s o r i m p l i e d .
* /
.macro disable_fiq
.endm
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.macro get_ i r q n r _ p r e a m b l e , b a s e , t m p
.endm
.macro arch_ r e t _ t o _ u s e r , t m p1 , t m p2
.endm
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.macro get_ i r q n r _ a n d _ b a s e , i r q n r , i r q s t a t , b a s e , t m p
# if d e f i n e d ( C O N F I G _ C P U _ H 7 2 0 1 ) | | d e f i n e d ( C O N F I G _ C P U _ H 7 2 0 2 )
@ we could use the id register on H7202, but this is not
@ properly updated when we come back from asm_do_irq
@ without a previous return from interrupt
@ (see loops below in irq_svc, irq_usr)
@ We see unmasked pending ints only, as the masked pending ints
@ are not visible here
mov \ b a s e , #0xf0000000 @ base register
orr \ b a s e , \ b a s e , #0x24000 @ irqbase
ldr \ i r q s t a t , [ \ b a s e , #0x04 ] @ get interrupt status
# if d e f i n e d ( C O N F I G _ C P U _ H 7 2 0 1 )
ldr \ t m p , =0x001fffff
# else
mvn \ t m p , #0xc0000000
# endif
and \ i r q s t a t , \ i r q s t a t , \ t m p @ mask out unused ints
mov \ i r q n r , #0
mov \ t m p , #0xff00
orr \ t m p , \ t m p , #0xff
tst \ i r q s t a t , \ t m p
addeq \ i r q n r , \ i r q n r , #16
moveq \ i r q s t a t , \ i r q s t a t , l s r #16
tst \ i r q s t a t , #255
addeq \ i r q n r , \ i r q n r , #8
moveq \ i r q s t a t , \ i r q s t a t , l s r #8
tst \ i r q s t a t , #15
addeq \ i r q n r , \ i r q n r , #4
moveq \ i r q s t a t , \ i r q s t a t , l s r #4
tst \ i r q s t a t , #3
addeq \ i r q n r , \ i r q n r , #2
moveq \ i r q s t a t , \ i r q s t a t , l s r #2
tst \ i r q s t a t , #1
addeq \ i r q n r , \ i r q n r , #1
moveq \ i r q s t a t , \ i r q s t a t , l s r #1
tst \ i r q s t a t , #1 @ bit 0 should be set
.endm
# else
# error h y n i x p r o c e s s o r s e l e c t i o n m i s s m a t c h
# endif