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linux/arch/arm/mach-shmobile/include/mach/common.h

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ARM: mach-shmobile: SH-Mobile G3 support. This adds preliminary support for the SH-Mobile G-series. The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside from the ARM MPU are primarily composed of existing SH IP blocks. This includes initial support for the SH7367 (SH-Mobile G3) CPU and the G3EVM reference board. Only timer, serial console, and NOR flash are supported at this point. Patches for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:14:49 +00:00
#ifndef __ARCH_MACH_COMMON_H
#define __ARCH_MACH_COMMON_H
extern struct sys_timer shmobile_timer;
ARM: mach-shmobile: early console support using earlyprintk Add support for early console to the SH-Mobile boards. Simply perform an early platform probe for "earlyprintk" to trigger the early serial console code in sh-sci.c. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08 11:02:54 +00:00
extern void shmobile_setup_console(void);
ARM: mach-shmobile: SMP base support Add SMP base support for R-Mobile / SH-Mobile processors. This patch contains all base code to support CONFIG_SMP regardless of ARCH_SHMOBILE processor type. Both local timer and CPU hotplug are supported, but no processor specific code is included. At this point only the default behavior is in place, so a single core will always be used even though CONFIG_SMP is enabled on multicore systems. The SMP Kconfig entry for arch/arm/Kconfig is excluded from this patch to simplify merging. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-14 16:56:55 +09:00
extern void shmobile_secondary_vector(void);
ARM: mach-shmobile: Allow SoC specific CPU kill code Add the function shmobile_platform_kill_cpu() to allow SoC specific code to tie in their CPU shutdown code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-28 16:47:16 +09:00
extern int shmobile_platform_cpu_kill(unsigned int cpu);
ARM: mach-shmobile: sh7372 clock fixes Fixes for the sh7372 clock framework: - remove unused #include <linux/platform_device.h> - add sh7372 prefix to user modifiable root clocks - put modifiable root clock prototypes in header file - fix off-by-one id error on VEU MSTP clocks - make arrays static Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-20 14:45:03 +00:00
struct clk;
ARM: mach-shmobile: Use shared clock framework Teach SH-Mobile ARM how to make use of the shared SH clock framework. This commit is one atomic switch that dumps the local hackery and instead links in the shared clock framework code in drivers/sh. A few local functions are kept in clock.c. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-12 14:21:24 +00:00
extern int clk_init(void);
ARM: mach-shmobile: Run-time IRQ handler for INTCA Break-out INTC specific IRQ demux code from the file entry-macro-intc.S and register during run-time. Covers sh7367, sh7377 and sh7372. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-28 08:27:01 +00:00
extern void shmobile_handle_irq_intc(struct pt_regs *);
ARM: mach-shmobile: Suspend-to-RAM support This patch adds a simple Suspend-to-RAM implementation for SH-Mobile ARM. The struct shmobile_suspend_ops are kept global to allow cpu-specific code to override the callbacks if needed. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-04-29 02:23:28 +09:00
extern struct platform_suspend_ops shmobile_suspend_ops;
ARM: mach-shmobile: cpuidle single/global and last_state fixes The following commits break cpuidle on SH-Mobile ARM: 46bcfad cpuidle: Single/Global registration of idle states e978aa7 cpuidle: Move dev->last_residency update to driver enter routine; remove dev->last_state This patch remedies these issues by up-porting the SH-Mobile code to fit with the above introduced framework changes. It is worth noting that the new code becomes significantly cleaner, so these framework changes are very welcome. At the same time this breakage could probably have been avoided by grepping for "last_state" and "cpuidle_register_driver". Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-11-11 14:01:30 +09:00
struct cpuidle_driver;
ARM: mach-shmobile: CPUIdle support This patch adds a shared SH-Mobile ARM specific CPUIdle implementation supporting WFI only at this point. It serves as a common point for late registration of the arch-specific CPUIdle code, and supports adding extra sleep modes using the callback shmobile_cpuidle_setup() together with shmobile_cpuidle_modes[]. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-04-29 02:36:07 +09:00
extern void (*shmobile_cpuidle_modes[])(void);
ARM: mach-shmobile: cpuidle single/global and last_state fixes The following commits break cpuidle on SH-Mobile ARM: 46bcfad cpuidle: Single/Global registration of idle states e978aa7 cpuidle: Move dev->last_residency update to driver enter routine; remove dev->last_state This patch remedies these issues by up-porting the SH-Mobile code to fit with the above introduced framework changes. It is worth noting that the new code becomes significantly cleaner, so these framework changes are very welcome. At the same time this breakage could probably have been avoided by grepping for "last_state" and "cpuidle_register_driver". Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-11-11 14:01:30 +09:00
extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
ARM: mach-shmobile: Use shared clock framework Teach SH-Mobile ARM how to make use of the shared SH clock framework. This commit is one atomic switch that dumps the local hackery and instead links in the shared clock framework code in drivers/sh. A few local functions are kept in clock.c. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-12 14:21:24 +00:00
ARM: mach-shmobile: SH-Mobile G3 support. This adds preliminary support for the SH-Mobile G-series. The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside from the ARM MPU are primarily composed of existing SH IP blocks. This includes initial support for the SH7367 (SH-Mobile G3) CPU and the G3EVM reference board. Only timer, serial console, and NOR flash are supported at this point. Patches for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:14:49 +00:00
extern void sh7367_init_irq(void);
extern void sh7367_add_early_devices(void);
extern void sh7367_add_standard_devices(void);
extern void sh7367_clock_init(void);
ARM: mach-shmobile: sh7367 and G3EVM pinmux support Add support for the sh7367 pinmux using drivers/sh/pfc.c and select serial console pins and some LEDs on G3EVM. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-10 20:10:55 +09:00
extern void sh7367_pinmux_init(void);
ARM: mach-shmobile: sh7367 clock framework V2 This patch is V2 of clock framework tables/code for sh7367. MSTP support is included for the following hardware blocks: KEYSC, SCIF, IIC, IRDA, FLCTL, VOU, SIU, USB, SDHI and UIO. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-20 14:49:28 +00:00
extern struct clk sh7367_extalb1_clk;
extern struct clk sh7367_extal2_clk;
ARM: mach-shmobile: SH-Mobile G3 support. This adds preliminary support for the SH-Mobile G-series. The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside from the ARM MPU are primarily composed of existing SH IP blocks. This includes initial support for the SH7367 (SH-Mobile G3) CPU and the G3EVM reference board. Only timer, serial console, and NOR flash are supported at this point. Patches for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:14:49 +00:00
ARM: mach-shmobile: SH-Mobile G4 support. This adds preliminary support for the SH7377 (SH-Mobile G4) CPU and the G4EVM reference board. Only timer, serial console and NOR flash are supported at this point. Support for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:15:07 +00:00
extern void sh7377_init_irq(void);
extern void sh7377_add_early_devices(void);
extern void sh7377_add_standard_devices(void);
ARM: mach-shmobile: sh7377 clock framework V2 This patch is V2 of clock framework tables/code for sh7377. MSTP support is included for the following hardware blocks: KEYSC, SCIF, IIC, IRDA, FLCTL, USB, SDHI and UIO. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-21 05:19:34 +00:00
extern void sh7377_clock_init(void);
ARM: mach-shmobile: sh7377 and G4EVM pinmux support Add support for the sh 7377 pinmux using drivers/sh/pfc.c and some LEDs on G4EVM. Signed-off-by: NISHIMOTO Hiroki <nishimoto.hiroki@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-12 08:10:06 +00:00
extern void sh7377_pinmux_init(void);
ARM: mach-shmobile: sh7377 clock framework V2 This patch is V2 of clock framework tables/code for sh7377. MSTP support is included for the following hardware blocks: KEYSC, SCIF, IIC, IRDA, FLCTL, USB, SDHI and UIO. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-21 05:19:34 +00:00
extern struct clk sh7377_extalc1_clk;
extern struct clk sh7377_extal2_clk;
ARM: mach-shmobile: SH-Mobile G4 support. This adds preliminary support for the SH7377 (SH-Mobile G4) CPU and the G4EVM reference board. Only timer, serial console and NOR flash are supported at this point. Support for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:15:07 +00:00
ARM: mach-shmobile: SH-Mobile AP4 support. This adds preliminary support for the SH7372 (SH-Mobile AP4) CPU and the AP4EVB reference board. Only timer, serial console and NOR flash are supported at this point. Support for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:14:58 +00:00
extern void sh7372_init_irq(void);
extern void sh7372_add_early_devices(void);
extern void sh7372_add_standard_devices(void);
ARM: mach-shmobile: sh7372 clock framework support V2 This patch is V2 of clock framework tables/code for sh7372. MSTP are included for KEYSC, SCIF, IIC, USB, SDHI and UIO. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-12 14:21:34 +00:00
extern void sh7372_clock_init(void);
ARM: mach-shmobile: Add sh7372 pinmux support Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-17 09:39:10 +00:00
extern void sh7372_pinmux_init(void);
ARM: mach-shmobile: sh7372 Core Standby Suspend-to-RAM Add sh7372 Core Standby sleep mode support and tie it in with the shared SH-Mobile ARM suspend code. The Core Standby mode is the lightest sh7372-specific sleep mode, cutting power to the ARM core excluding the L2 cache. Any interrupt source can be used for wakeups. The low level portion of this code is based on the TI OMAP sleep code in sleep34xx.S, thanks to them. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-04-29 02:28:08 +09:00
extern void sh7372_pm_init(void);
PM / shmobile: Add support for the sh7372 A4S power domain / sleep mode The sh7372 contains a power domain named A4S which in turn contains power domains for both I/O Devices and CPU cores. At this point only System wide Suspend-to-RAM is supported, but the the hardware can also support CPUIdle. With more efforts in the future CPUIdle can work with bot A4S and A3SM. Tested on the sh7372 Mackerel board. [rjw: Rebased on top of the current linux-pm tree.] Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-12-23 01:23:07 +01:00
extern void sh7372_resume_core_standby_sysc(void);
extern int sh7372_do_idle_sysc(unsigned long sleep_mode);
ARM: mach-shmobile: sh7372 clock fixes Fixes for the sh7372 clock framework: - remove unused #include <linux/platform_device.h> - add sh7372 prefix to user modifiable root clocks - put modifiable root clock prototypes in header file - fix off-by-one id error on VEU MSTP clocks - make arrays static Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-20 14:45:03 +00:00
extern struct clk sh7372_extal1_clk;
extern struct clk sh7372_extal2_clk;
ARM: mach-shmobile: SH-Mobile AP4 support. This adds preliminary support for the SH7372 (SH-Mobile AP4) CPU and the AP4EVB reference board. Only timer, serial console and NOR flash are supported at this point. Support for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:14:58 +00:00
ARM: mach-shmobile: sh73a0 INTCS support Add INTCS support for the sh73a0 processor. The interrupts on the sh73a0 processor are managed through controllers such as GIC, INTCS and INTCA. The ARM cores use the GIC as primary interrupt controller and the INTCS and INTCA are hanging off the GIC as cascaded interrupt controllers. Peripherals connected both to the GIC and the INTC controllers should if possible only use the GIC. If no GIC connection is available then INTCS and INTCA may be used instead. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-21 08:37:32 +00:00
extern void sh73a0_init_irq(void);
ARM: mach-shmobile: Initial AG5 and AG5EVM support This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-17 10:59:31 +00:00
extern void sh73a0_add_early_devices(void);
extern void sh73a0_add_standard_devices(void);
extern void sh73a0_clock_init(void);
ARM: mach-shmobile: Add sh73a0 pinmux support PFC definitions for sh73a0 to support GPIO and pinmux handling. Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-19 16:47:16 +09:00
extern void sh73a0_pinmux_init(void);
ARM: mach-shmobile: AG5 clock framework improvements This patch improves the state of the AG5 clock framework support. The main clock parent is automatically detected, but most of the clocks are not used by any driver or subsystem at this point. More work is needed for support of multi media hardware such as FSI and/or LCDC/MIPI-DSI. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-03 07:22:31 +00:00
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
sh: clkfwk: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT() Current div6 clocks can specify their current parent clocks from its register value if it is registered by sh_clk_div6_reparent_register(). This patch modifies all div6 clocks into SH_CLK_DIV6_EXT(). Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-05 22:29:15 -08:00
extern struct clk sh73a0_extcki_clk;
extern struct clk sh73a0_extalr_clk;
ARM: mach-shmobile: Initial AG5 and AG5EVM support This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-17 10:59:31 +00:00
ARM: mach-shmobile: sh73a0 SMP support Add SMP support for ag5evm and the sh73a0 processor. Onlining and offlining works well, but at this point offlined processor cores are not put into sleep mode. There is no spinlock for syncing the secondary core with the first one in this implementation. The code instead relies on the cpu_online() check in __cpu_up(). Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-14 16:57:11 +09:00
extern unsigned int sh73a0_get_core_count(void);
extern void sh73a0_secondary_init(unsigned int cpu);
extern int sh73a0_boot_secondary(unsigned int cpu);
extern void sh73a0_smp_prepare_cpus(void);
ARM: mach-shmobile: R-Mobile A1 support. This adds preliminary support for the R8A7740 (R-Mobile A1) CPU Timer, serial, gic, clock are supported at this point. This patch is based on v0.1 manual Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-11-10 18:45:52 -08:00
extern void r8a7740_init_irq(void);
extern void r8a7740_add_early_devices(void);
extern void r8a7740_add_standard_devices(void);
extern void r8a7740_clock_init(u8 md_ck);
extern void r8a7740_pinmux_init(void);
ARM: mach-shmobile: r8a7779 and Marzen base support V2 Initial support for the r8a7779 SoC and the Marzen board (V2). Only SCIF ports and the TMU are supported at this point. To keep things simple only entity-mapped virt-to-phys mappings are supported. This forces drivers and other SoC glue code to make use of ioremap(). We cannot support early serial console due to virtual address space collisions with the ARM kernel. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-14 01:36:12 +09:00
extern void r8a7779_init_irq(void);
extern void r8a7779_add_early_devices(void);
extern void r8a7779_add_standard_devices(void);
extern void r8a7779_clock_init(void);
ARM: mach-shmobile: r8a7779 PFC GPIO-only support V2 Add GPIO-only r8a7779 PFC support V2. Only regular GPIOs are supported at this time. GPIO_FN are not supported because they require variable bit width support in be the shared pfc code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-14 01:36:22 +09:00
extern void r8a7779_pinmux_init(void);
ARM: mach-shmobile: r8a7779 power domain support V2 Add power domain control support for the r8a7779 SoC V2. This adds support for 4 power domains for I/O Devices together with code that can be used for CPU cores as well. The only out of the ordinary experience is the need for ioremap() of SYSC registers. Because of that we need to execute some init function before setting up the domains. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-01-10 15:50:01 +09:00
extern void r8a7779_pm_init(void);
ARM: mach-shmobile: r8a7779 and Marzen base support V2 Initial support for the r8a7779 SoC and the Marzen board (V2). Only SCIF ports and the TMU are supported at this point. To keep things simple only entity-mapped virt-to-phys mappings are supported. This forces drivers and other SoC glue code to make use of ioremap(). We cannot support early serial console due to virtual address space collisions with the ARM kernel. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-14 01:36:12 +09:00
ARM: mach-shmobile: r8a7779 SMP support V3 This patch contains r8a7779 SMP support V3 - now including CPU hotplug offine and online support. The r8a7779 power domain code is tied together with SMP glue code which allows us to control the power domains via CPU hotplug. At this point the kernel boots with the 4 Cortex-A9 cores in SMP mode and all CPU cores except CPU0 can be hotplugged. The code in platsmp.c is quite far from pretty, but it is kept like that intentionally to avoid creating layers of code that will go away in the near future anyway. The code needs to be updated when some per-SoC handling code will be added to the ARM architecture, see the following patch for more information: "[RFC PATCH 0/3] Per SoC descriptor" Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-01-10 17:44:39 +09:00
extern unsigned int r8a7779_get_core_count(void);
extern int r8a7779_platform_cpu_kill(unsigned int cpu);
extern void r8a7779_secondary_init(unsigned int cpu);
extern int r8a7779_boot_secondary(unsigned int cpu);
extern void r8a7779_smp_prepare_cpus(void);
ARM: mach-shmobile: SH-Mobile G3 support. This adds preliminary support for the SH-Mobile G-series. The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside from the ARM MPU are primarily composed of existing SH IP blocks. This includes initial support for the SH7367 (SH-Mobile G3) CPU and the G3EVM reference board. Only timer, serial console, and NOR flash are supported at this point. Patches for the interrupt controller, pinmux support, clock framework and runtime pm will be submitted as feature patches on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 11:14:49 +00:00
#endif /* __ARCH_MACH_COMMON_H */
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