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/ * arch/ a r m / m a c h - i m x / i n c l u d e / m a c h / d e b u g - m a c r o . S
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*
* Debugging m a c r o i n c l u d e h e a d e r
*
* Copyright ( C ) 1 9 9 4 - 1 9 9 9 R u s s e l l K i n g
* Moved f r o m l i n u x / a r c h / a r m / k e r n e l / d e b u g . S b y B e n D o o k s
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or modify
* it u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e v e r s i o n 2 a s
* published b y t h e F r e e S o f t w a r e F o u n d a t i o n .
*
* /
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# define I M X _ N E E D S _ D E P R E C A T E D _ S Y M B O L S
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# ifdef C O N F I G _ A R C H _ M X 1
# include < m a c h / m x1 . h >
# define U A R T _ P A D D R U A R T 1 _ B A S E _ A D D R
# define U A R T _ V A D D R I O _ A D D R E S S ( U A R T 1 _ B A S E _ A D D R )
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# endif
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# ifdef C O N F I G _ A R C H _ M X 2 5
# ifdef U A R T _ P A D D R
# error " C O N F I G _ D E B U G _ L L i s i n c o m p a t i b l e w i t h m u l t i p l e a r c h s "
# endif
# include < m a c h / m x25 . h >
# define U A R T _ P A D D R U A R T 1 _ B A S E _ A D D R
# define U A R T _ V A D D R M X 2 5 _ A I P S 1 _ I O _ A D D R E S S ( U A R T 1 _ B A S E _ A D D R )
# endif
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# ifdef C O N F I G _ A R C H _ M X 2
# ifdef U A R T _ P A D D R
# error " C O N F I G _ D E B U G _ L L i s i n c o m p a t i b l e w i t h m u l t i p l e a r c h s "
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# endif
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# include < m a c h / m x2 x . h >
# define U A R T _ P A D D R U A R T 1 _ B A S E _ A D D R
# define U A R T _ V A D D R A I P I _ I O _ A D D R E S S ( U A R T 1 _ B A S E _ A D D R )
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# endif
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# ifdef C O N F I G _ A R C H _ M X 3
# ifdef U A R T _ P A D D R
# error " C O N F I G _ D E B U G _ L L i s i n c o m p a t i b l e w i t h m u l t i p l e a r c h s "
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# endif
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# include < m a c h / m x3 x . h >
# define U A R T _ P A D D R U A R T 1 _ B A S E _ A D D R
# define U A R T _ V A D D R A I P S 1 _ I O _ A D D R E S S ( U A R T 1 _ B A S E _ A D D R )
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# endif
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# ifdef C O N F I G _ A R C H _ M X 5
# ifdef U A R T _ P A D D R
# error " C O N F I G _ D E B U G _ L L i s i n c o m p a t i b l e w i t h m u l t i p l e a r c h s "
# endif
# include < m a c h / m x51 . h >
# define U A R T _ P A D D R M X 5 1 _ U A R T 1 _ B A S E _ A D D R
# define U A R T _ V A D D R M X 5 1 _ A I P S 1 _ I O _ A D D R E S S ( M X 5 1 _ U A R T 1 _ B A S E _ A D D R )
# endif
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# ifdef C O N F I G _ A R C H _ M X C 9 1 2 3 1
# ifdef U A R T _ P A D D R
# error " C O N F I G _ D E B U G _ L L i s i n c o m p a t i b l e w i t h m u l t i p l e a r c h s "
# endif
# include < m a c h / m x c91 2 3 1 . h >
# define U A R T _ P A D D R M X C 9 1 2 3 1 _ U A R T 2 _ B A S E _ A D D R
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# define U A R T _ V A D D R M X C 9 1 2 3 1 _ I O _ A D D R E S S ( M X C 9 1 2 3 1 _ U A R T 2 _ B A S E _ A D D R )
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# endif
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.macro r x
mrc p15 , 0 , \ r x , c1 , c0
tst \ r x , #1 @ MMU enabled?
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ldreq \ r x , =UART_PADDR @ physical
ldrne \ r x , =UART_VADDR @ virtual
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.endm
.macro r d ,r x
str \ r d , [ \ r x , #0x40 ] @ TXDATA
.endm
.macro r d ,r x
.endm
.macro r d ,r x
1002 : ldr \ r d , [ \ r x , #0x98 ] @ SR2
tst \ r d , #1 < < 3 @ TXDC
beq 1 0 0 2 b @ wait until transmit done
.endm
