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/ *
* FPU s u p p o r t c o d e , m o v e d h e r e f r o m h e a d . S s o t h a t i t c a n b e u s e d
* by c h i p s w h i c h u s e o t h e r h e a d - w h a t e v e r . S f i l e s .
*
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* Copyright ( C ) 1 9 9 5 - 1 9 9 6 G a r y T h o m a s ( g d t @linuxppc.org)
* Copyright ( C ) 1 9 9 6 C o r t D o u g a n < c o r t @cs.nmt.edu>
* Copyright ( C ) 1 9 9 6 P a u l M a c k e r r a s .
* Copyright ( C ) 1 9 9 7 D a n M a l e k ( d m a l e k @jlc.net).
*
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* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
*
* /
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# include < a s m / r e g . h >
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# include < a s m / p a g e . h >
# include < a s m / m m u . h >
# include < a s m / p g t a b l e . h >
# include < a s m / c p u t a b l e . h >
# include < a s m / c a c h e . h >
# include < a s m / t h r e a d _ i n f o . h >
# include < a s m / p p c _ a s m . h >
# include < a s m / a s m - o f f s e t s . h >
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# include < a s m / p t r a c e . h >
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# ifdef C O N F I G _ V S X
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# define _ _ R E S T _ 3 2 F P V S R S ( n ,c ,b a s e ) \
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BEGIN_ F T R _ S E C T I O N \
b 2 f ; \
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ V S X ) ; \
REST_ 3 2 F P R S ( n ,b a s e ) ; \
b 3 f ; \
2 : REST_ 3 2 V S R S ( n ,c ,b a s e ) ; \
3 :
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# define _ _ S A V E _ 3 2 F P V S R S ( n ,c ,b a s e ) \
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BEGIN_ F T R _ S E C T I O N \
b 2 f ; \
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ V S X ) ; \
SAVE_ 3 2 F P R S ( n ,b a s e ) ; \
b 3 f ; \
2 : SAVE_ 3 2 V S R S ( n ,c ,b a s e ) ; \
3 :
# else
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# define _ _ R E S T _ 3 2 F P V S R S ( n ,b ,b a s e ) R E S T _ 3 2 F P R S ( n , b a s e )
# define _ _ S A V E _ 3 2 F P V S R S ( n ,b ,b a s e ) S A V E _ 3 2 F P R S ( n , b a s e )
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# endif
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# define R E S T _ 3 2 F P V S R S ( n ,c ,b a s e ) _ _ R E S T _ 3 2 F P V S R S ( n ,_ _ R E G _ ## c , _ _ R E G _ # # b a s e )
# define S A V E _ 3 2 F P V S R S ( n ,c ,b a s e ) _ _ S A V E _ 3 2 F P V S R S ( n ,_ _ R E G _ ## c , _ _ R E G _ # # b a s e )
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# ifdef C O N F I G _ P P C _ T R A N S A C T I O N A L _ M E M
/ * void d o _ l o a d _ u p _ t r a n s a c t _ f p u ( s t r u c t t h r e a d _ s t r u c t * t h r e a d )
*
* This i s s i m i l a r t o l o a d _ u p _ f p u b u t f o r t h e t r a n s a c t i o n a l v e r s i o n o f t h e F P
* register s e t . I t d o e s n ' t m e s s w i t h t h e t a s k M S R o r v a l i d f l a g s .
* Furthermore, w e d o n ' t d o l a z y F P w i t h T M c u r r e n t l y .
* /
_ GLOBAL( d o _ l o a d _ u p _ t r a n s a c t _ f p u )
mfmsr r6
ori r5 ,r6 ,M S R _ F P
# ifdef C O N F I G _ V S X
BEGIN_ F T R _ S E C T I O N
oris r5 ,r5 ,M S R _ V S X @h
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ V S X )
# endif
SYNC
MTMSRD( r5 )
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addi r7 ,r3 ,T H R E A D _ T R A N S A C T _ F P S T A T E
lfd f r0 ,F P S T A T E _ F P S C R ( r7 )
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MTFSF_ L ( f r0 )
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REST_ 3 2 F P V S R S ( 0 , R 4 , R 7 )
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blr
# endif / * C O N F I G _ P P C _ T R A N S A C T I O N A L _ M E M * /
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/ *
* Load s t a t e f r o m m e m o r y i n t o F P r e g i s t e r s i n c l u d i n g F P S C R .
* Assumes t h e c a l l e r h a s e n a b l e d F P i n t h e M S R .
* /
_ GLOBAL( l o a d _ f p _ s t a t e )
lfd f r0 ,F P S T A T E _ F P S C R ( r3 )
MTFSF_ L ( f r0 )
REST_ 3 2 F P V S R S ( 0 , R 4 , R 3 )
blr
/ *
* Store F P s t a t e i n t o m e m o r y , i n c l u d i n g F P S C R
* Assumes t h e c a l l e r h a s e n a b l e d F P i n t h e M S R .
* /
_ GLOBAL( s t o r e _ f p _ s t a t e )
SAVE_ 3 2 F P V S R S ( 0 , R 4 , R 3 )
mffs f r0
stfd f r0 ,F P S T A T E _ F P S C R ( r3 )
blr
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/ *
* This t a s k w a n t s t o u s e t h e F P U n o w .
* On U P , d i s a b l e F P f o r t h e t a s k w h i c h h a d t h e F P U p r e v i o u s l y ,
* and s a v e i t s f l o a t i n g - p o i n t r e g i s t e r s i n i t s t h r e a d _ s t r u c t .
* Load u p t h i s t a s k ' s F P r e g i s t e r s f r o m i t s t h r e a d _ s t r u c t ,
* enable t h e F P U f o r t h e c u r r e n t t a s k a n d r e t u r n t o t h e t a s k .
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* Note t h a t o n 3 2 - b i t t h i s c a n o n l y u s e r e g i s t e r s t h a t w i l l b e
* restored b y f a s t _ e x c e p t i o n _ r e t u r n , i . e . r3 - r6 , r10 a n d r11 .
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* /
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_ GLOBAL( l o a d _ u p _ f p u )
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mfmsr r5
ori r5 ,r5 ,M S R _ F P
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# ifdef C O N F I G _ V S X
BEGIN_ F T R _ S E C T I O N
oris r5 ,r5 ,M S R _ V S X @h
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ V S X )
# endif
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SYNC
MTMSRD( r5 ) / * e n a b l e u s e o f f p u n o w * /
isync
/* enable use of FP after return */
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# ifdef C O N F I G _ P P C 3 2
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mfspr r5 ,S P R N _ S P R G _ T H R E A D / * c u r r e n t t a s k ' s T H R E A D ( p h y s ) * /
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lwz r4 ,T H R E A D _ F P E X C _ M O D E ( r5 )
ori r9 ,r9 ,M S R _ F P / * e n a b l e F P f o r c u r r e n t * /
or r9 ,r9 ,r4
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# else
ld r4 ,P A C A C U R R E N T ( r13 )
addi r5 ,r4 ,T H R E A D / * G e t T H R E A D * /
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lwz r4 ,T H R E A D _ F P E X C _ M O D E ( r5 )
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ori r12 ,r12 ,M S R _ F P
or r12 ,r12 ,r4
std r12 ,_ M S R ( r1 )
# endif
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/* Don't care if r4 overflows, this is desired behaviour */
lbz r4 ,T H R E A D _ L O A D _ F P ( r5 )
addi r4 ,r4 ,1
stb r4 ,T H R E A D _ L O A D _ F P ( r5 )
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addi r10 ,r5 ,T H R E A D _ F P S T A T E
lfd f r0 ,F P S T A T E _ F P S C R ( r10 )
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MTFSF_ L ( f r0 )
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REST_ 3 2 F P V S R S ( 0 , R 4 , R 1 0 )
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/* restore registers and return */
/* we haven't used ctr or xer or lr */
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blr
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/ *
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* save_ f p u ( t s k )
* Save t h e f l o a t i n g - p o i n t r e g i s t e r s i n i t s t h r e a d _ s t r u c t .
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* Enables t h e F P U f o r u s e i n t h e k e r n e l o n r e t u r n .
* /
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_ GLOBAL( s a v e _ f p u )
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addi r3 ,r3 ,T H R E A D / * w a n t T H R E A D o f t a s k * /
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PPC_ L L r6 ,T H R E A D _ F P S A V E A R E A ( r3 )
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs. A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros. It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files. Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.
ppc_asm.h is now for use in .S files *only*, and a #error enforces
that. As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.
While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.
Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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PPC_ L L r5 ,P T _ R E G S ( r3 )
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PPC_ L C M P I 0 ,r6 ,0
bne 2 f
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addi r6 ,r3 ,T H R E A D _ F P S T A T E
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2 : SAVE_ 3 2 F P V S R S ( 0 , R 4 , R 6 )
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mffs f r0
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stfd f r0 ,F P S T A T E _ F P S C R ( r6 )
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blr
[PATCH] powerpc: Fix handling of fpscr on 64-bit
The recent merge of fpu.S broken the handling of fpscr for
ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted,
leading to strange random application crashes.
The confusion arises, because the thread_struct has (and requires) a
64-bit area to save the fpscr, because we use load/store double
instructions to get it in to/out of the FPU. However, only the low
32-bits are actually used, so we want to treat it as a 32-bit quantity
when manipulating its bits to avoid extra load/stores on 32-bit. This
patch replaces the current definition with a structure of two 32-bit
quantities (pad and val), to clarify things as much as is possible.
The 'val' field is used when manipulating bits, the structure itself
is used when obtaining the address for loading/unloading the value
from the FPU.
While we're at it, consolidate the 4 (!) almost identical versions of
cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The
new version takes a pointer to thread_struct and applies the correct
offset itself, rather than a pointer to the fpscr field itself, again
to avoid confusion as to which is the correct field to use.
Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
code, which it previously did not.
Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
Booted on G5 (ARCH=powerpc) and things which previously fell over no
longer do.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-27 10:27:25 +04:00
/ *
* These a r e u s e d i n t h e a l i g n m e n t t r a p h a n d l e r w h e n e m u l a t i n g
* single- p r e c i s i o n l o a d s a n d s t o r e s .
* /
_ GLOBAL( c v t _ f d )
lfs 0 ,0 ( r3 )
stfd 0 ,0 ( r4 )
blr
_ GLOBAL( c v t _ d f )
lfd 0 ,0 ( r3 )
stfs 0 ,0 ( r4 )
blr
