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/*
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* Copyright 2011 - 2012 Calxeda , Inc .
* Copyright ( C ) 2012 - 2013 Altera Corporation < www . altera . com >
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*
* This program is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation ; either version 2 of the License , or
* ( at your option ) any later version .
*
* This program is distributed in the hope that it will be useful ,
* but WITHOUT ANY WARRANTY ; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE . See the
* GNU General Public License for more details .
*
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* Based from clk - highbank . c
*
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* You should have received a copy of the GNU General Public License
* along with this program . If not , see < http : //www.gnu.org/licenses/>.
*/
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# include <linux/of.h>
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# include "clk.h"
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CLK_OF_DECLARE ( socfpga_pll_clk , " altr,socfpga-pll-clock " , socfpga_pll_init ) ;
CLK_OF_DECLARE ( socfpga_perip_clk , " altr,socfpga-perip-clk " , socfpga_periph_init ) ;
CLK_OF_DECLARE ( socfpga_gate_clk , " altr,socfpga-gate-clk " , socfpga_gate_init ) ;
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CLK_OF_DECLARE ( socfpga_a10_pll_clk , " altr,socfpga-a10-pll-clock " ,
socfpga_a10_pll_init ) ;
CLK_OF_DECLARE ( socfpga_a10_perip_clk , " altr,socfpga-a10-perip-clk " ,
socfpga_a10_periph_init ) ;
CLK_OF_DECLARE ( socfpga_a10_gate_clk , " altr,socfpga-a10-gate-clk " ,
socfpga_a10_gate_init ) ;