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/*
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* x86 TSC related functions
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*/
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# ifndef _ASM_X86_TSC_H
# define _ASM_X86_TSC_H
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# include <asm/processor.h>
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# define NS_SCALE 10 /* 2^10, carefully chosen */
# define US_SCALE 32 /* 2^32, arbitralrily chosen */
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/*
* Standard way to access the cycle counter .
*/
typedef unsigned long long cycles_t ;
extern unsigned int cpu_khz ;
extern unsigned int tsc_khz ;
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extern void disable_TSC ( void ) ;
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static inline cycles_t get_cycles ( void )
{
unsigned long long ret = 0 ;
# ifndef CONFIG_X86_TSC
if ( ! cpu_has_tsc )
return 0 ;
# endif
rdtscll ( ret ) ;
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return ret ;
}
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static inline cycles_t vget_cycles ( void )
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{
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/*
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* We only do VDSOs on TSC capable CPUs , so this shouldnt
* access boot_cpu_data ( which is not VDSO - safe ) :
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*/
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# ifndef CONFIG_X86_TSC
if ( ! cpu_has_tsc )
return 0 ;
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# endif
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return ( cycles_t ) __native_read_tsc ( ) ;
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}
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extern void tsc_init ( void ) ;
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extern void mark_tsc_unstable ( char * reason ) ;
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extern int unsynchronized_tsc ( void ) ;
extern void init_tsc_clocksource ( void ) ;
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int check_tsc_unstable ( void ) ;
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/*
* Boot - time check whether the TSCs are synchronized across
* all CPUs / cores :
*/
extern void check_tsc_sync_source ( int cpu ) ;
extern void check_tsc_sync_target ( void ) ;
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extern void tsc_calibrate ( void ) ;
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extern int notsc_setup ( char * ) ;
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# endif