2005-04-17 02:20:36 +04:00
/ * entry- t a b l e . S : m a i n t r a p v e c t o r t a b l e s a n d e x c e p t i o n j u m p t a b l e
*
* Copyright ( C ) 2 0 0 3 R e d H a t , I n c . A l l R i g h t s R e s e r v e d .
* Written b y D a v i d H o w e l l s ( d h o w e l l s @redhat.com)
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
*
* /
# include < l i n u x / s y s . h >
# include < l i n u x / l i n k a g e . h >
# include < a s m / s p r - r e g s . h >
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# Declare t h e m a i n t r a p a n d v e c t o r t a b l e s
#
# There a r e s i x t a b l e s :
#
# ( 1 ) The t r a p t a b l e f o r d e b u g m o d e
# ( 2 ) The t r a p t a b l e f o r k e r n e l m o d e
# ( 3 ) The t r a p t a b l e f o r u s e r m o d e
#
# The C P U j u m p s t o a n a p p r o p r i a t e s l o t i n t h e a p p r o p r i a t e t a b l e t o p e r f o r m
# exception p r o c e s s i n g . W e h a v e t h r e e d i f f e r e n t t a b l e s f o r t h e t h r e e
# different C P U m o d e s b e c a u s e t h e r e i s n o h a r d w a r e d i f f e r e n t i a t i o n b e t w e e n
# stack p o i n t e r s f o r t h e s e t h r e e m o d e s , a n d s o w e h a v e t o i n v e n t o n e w h e n
# crossing m o d e b o u n d a r i e s .
#
# ( 4 ) The e x c e p t i o n h a n d l e r v e c t o r t a b l e
#
# The u s e r a n d k e r n e l t r a p t a b l e s u s e t h e s a m e p r o l o g u e f o r n o r m a l
# exception p r o c e s s i n g . T h e p r o l o g u e t h e n j u m p s t o t h e h a n d l e r i n t h i s
# table, a s i n d e x e d b y t h e e x c e p t i o n I D f r o m t h e T B R .
#
# ( 5 ) The f i x u p t a b l e f o r k e r n e l - t r a p s i n g l e - s t e p
# ( 6 ) The f i x u p t a b l e f o r u s e r - t r a p s i n g l e - s t e p
#
# Due t o t h e w a y s i n g l e - s t e p p i n g w o r k s o n t h i s C P U ( s i n g l e - s t e p i s n o t
# disabled w h e n c r o s s i n g e x c e p t i o n b o u n d a r i e s , o n l y w h e n i n d e b u g m o d e ) ,
# we h a v e t o c a t c h t h e s i n g l e - s t e p e v e n t i n b r e a k . S a n d j u m p t o t h e f i x u p
# routine p o i n t e d t o b y t h i s t a b l e .
#
# The l i n k e r s c r i p t p l a c e s t h e u s e r m o d e a n d k e r n e l m o d e t r a p t a b l e s o n t o
# the s a m e 8 K b p a g e , s o t h a t b r e a k . S c a n b e m o r e e f f i c i e n t w h e n p e r f o r m i n g
# single- s t e p b y p a s s m a n a g e m e n t
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# trap t a b l e f o r e n t r y f r o m d e b u g m o d e
.section .trap .break , " ax"
.balign 2 5 6 * 1 6
.globl __entry_breaktrap_table
__entry_breaktrap_table :
# trap t a b l e f o r e n t r y f r o m u s e r m o d e
.section .trap .user , " ax"
.balign 2 5 6 * 1 6
.globl __entry_usertrap_table
__entry_usertrap_table :
# trap t a b l e f o r e n t r y f r o m k e r n e l m o d e
.section .trap .kernel , " ax"
.balign 2 5 6 * 1 6
.globl __entry_kerneltrap_table
__entry_kerneltrap_table :
# exception h a n d l e r j u m p t a b l e
.section .trap .vector , " ax"
.balign 2 5 6 * 4
.globl __entry_vector_table
__entry_vector_table :
# trap f i x u p t a b l e f o r s i n g l e - s t e p p i n g i n u s e r m o d e
.section .trap .fixup .user , " a"
.balign 2 5 6 * 4
.globl __break_usertrap_fixup_table
__break_usertrap_fixup_table :
# trap f i x u p t a b l e f o r s i n g l e - s t e p p i n g i n u s e r m o d e
.section .trap .fixup .kernel , " a"
.balign 2 5 6 * 4
.globl __break_kerneltrap_fixup_table
__break_kerneltrap_fixup_table :
# handler d e c l a r a t i o n f o r a s o f w a r e o r p r o g r a m i n t e r r u p t
.macro VECTOR_SOFTPROG tbr_ t t , v e c
.section .trap .user
.org \ tbr_ t t
bra _ _ e n t r y _ u s p a c e _ s o f t p r o g _ i n t e r r u p t
.section .trap .fixup .user
.org \ tbr_ t t > > 2
.long __break_step_uspace_softprog_interrupt
.section .trap .kernel
.org \ tbr_ t t
bra _ _ e n t r y _ k e r n e l _ s o f t p r o g _ i n t e r r u p t
.section .trap .fixup .kernel
.org \ tbr_ t t > > 2
.long __break_step_kernel_softprog_interrupt
.section .trap .vector
.org \ tbr_ t t > > 2
.long \ vec
.endm
# handler d e c l a r a t i o n f o r a m a s k a b l e e x t e r n a l i n t e r r u p t
.macro VECTOR_IRQ tbr_ t t , v e c
.section .trap .user
.org \ tbr_ t t
bra _ _ e n t r y _ u s p a c e _ e x t e r n a l _ i n t e r r u p t
.section .trap .fixup .user
.org \ tbr_ t t > > 2
.long __break_step_uspace_external_interrupt
.section .trap .kernel
.org \ tbr_ t t
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the
processor status register (PSR) are relatively slow and because we will
soon have the need to deal with multiple interrupt controls at the same
time (separate h/w and inter-core interrupts).
The way this is done is to dedicate one of the four integer condition code
registers (ICC2) to maintaining a virtual interrupt disablement state
whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate
whether the interrupts are virtually disabled and the ICC2.C flag (Carry)
to indicate whether the interrupts are physically disabled.
ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set
to indicate interrupts are physically enabled. Under normal running
conditions Z==0 and C==1.
Disabling interrupts with local_irq_disable() doesn't then actually
physically disable interrupts - it merely sets ICC2.Z to 1. Should an
interrupt then happen, the exception prologue will note ICC2.Z is set and
branch out of line using one instruction (an unlikely BEQ). Here it will
physically disable interrupts and clear ICC2.C.
When it comes time to enable interrupts (local_irq_enable()), this simply
clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are
clear (the HI integer condition). This can be done with the TIHI
conditional trap instruction.
The trap then physically reenables interrupts and sets ICC2.C again. Upon
returning the interrupt will be taken as interrupts will then be enabled.
Note that whilst processing the trap, the whole exceptions system is
disabled, and so an interrupt can't happen till it returns.
If no pending interrupt had happened, ICC2.C would still be set, the HI
condition would not be fulfilled, and no trap will happen.
Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z
flag out of the CCR register, shifting it down and masking it off. This
gives a result of 0 if interrupts were enabled and 1 if they weren't.
Restoring interrupts (local_irq_restore) is then a matter of taking the
saved value mentioned previously and XOR'ing it against 1. If it was one,
the result will be zero, and if it was zero the result will be non-zero.
This result is then used to affect the ICC2.Z flag directly (it is a
condition code flag after all). An XOR instruction does not affect the
Carry flag, and so that bit of state is unchanged. The two flags can then
be sampled to see if they're both zero using the trap (TIHI) as for the
unconditional reenablement (local_irq_enable).
This patch also:
(1) Modifies the debugging stub (break.S) to handle single-stepping crossing
into the trap #2 handler and into virtually disabled interrupts.
(2) Removes superseded fixup pointers from the second instructions in the trap
tables (there's no a separate fixup table for this).
(3) Declares the trap #3 vector for use in .org directives in the trap table.
(4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with
virtual interrupt handling, and removes the duplicate code that has now
been folded into irq_exit() (softirq and preemption handling).
(5) Tells the compiler in the arch Makefile that ICC2 is now reserved.
(6) Documents the in-kernel ABI, including the virtual interrupts.
(7) Renames the old irq management functions to different names.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 00:53:20 +03:00
# deal w i t h v i r t u a l i n t e r r u p t d i s a b l e m e n t
beq i c c2 ,#0 ,_ _ e n t r y _ k e r n e l _ e x t e r n a l _ i n t e r r u p t _ v i r t u a l l y _ d i s a b l e d
2005-04-17 02:20:36 +04:00
bra _ _ e n t r y _ k e r n e l _ e x t e r n a l _ i n t e r r u p t
.section .trap .fixup .kernel
.org \ tbr_ t t > > 2
.long __break_step_kernel_external_interrupt
.section .trap .vector
.org \ tbr_ t t > > 2
.long \ vec
.endm
# handler d e c l a r a t i o n f o r a n N M I e x t e r n a l i n t e r r u p t
.macro VECTOR_NMI tbr_ t t , v e c
.section .trap .user
.org \ tbr_ t t
break
break
break
break
.section .trap .kernel
.org \ tbr_ t t
break
break
break
break
.section .trap .vector
.org \ tbr_ t t > > 2
.long \ vec
.endm
# handler d e c l a r a t i o n f o r a n M M U o n l y s o f w a r e o r p r o g r a m i n t e r r u p t
.macro VECTOR_SP_MMU tbr_ t t , v e c
# ifdef C O N F I G _ M M U
VECTOR_ S O F T P R O G \ t b r _ t t , \ v e c
# else
VECTOR_ N M I \ t b r _ t t , 0
# endif
.endm
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
#
# specification o f t h e v e c t o r s
# - note : each m a c r o i n s e r t s c o d e i n t o m u l t i p l e s e c t i o n s
#
# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
VECTOR_ S P _ M M U T B R _ T T _ I N S T R _ M M U _ M I S S , _ _ e n t r y _ i n s n _ m m u _ m i s s
VECTOR_ S O F T P R O G T B R _ T T _ I N S T R _ A C C _ E R R O R , _ _ e n t r y _ i n s n _ a c c e s s _ e r r o r
VECTOR_ S O F T P R O G T B R _ T T _ I N S T R _ A C C _ E X C E P , _ _ e n t r y _ i n s n _ a c c e s s _ e x c e p t i o n
VECTOR_ S O F T P R O G T B R _ T T _ P R I V _ I N S T R , _ _ e n t r y _ p r i v i l e g e d _ i n s t r u c t i o n
VECTOR_ S O F T P R O G T B R _ T T _ I L L E G A L _ I N S T R , _ _ e n t r y _ i l l e g a l _ i n s t r u c t i o n
VECTOR_ S O F T P R O G T B R _ T T _ F P _ E X C E P T I O N , _ _ e n t r y _ m e d i a _ e x c e p t i o n
VECTOR_ S O F T P R O G T B R _ T T _ M P _ E X C E P T I O N , _ _ e n t r y _ m e d i a _ e x c e p t i o n
VECTOR_ S O F T P R O G T B R _ T T _ D A T A _ A C C _ E R R O R , _ _ e n t r y _ d a t a _ a c c e s s _ e r r o r
VECTOR_ S P _ M M U T B R _ T T _ D A T A _ M M U _ M I S S , _ _ e n t r y _ d a t a _ m m u _ m i s s
VECTOR_ S O F T P R O G T B R _ T T _ D A T A _ A C C _ E X C E P , _ _ e n t r y _ d a t a _ a c c e s s _ e x c e p t i o n
VECTOR_ S O F T P R O G T B R _ T T _ D A T A _ S T R _ E R R O R , _ _ e n t r y _ d a t a _ s t o r e _ e r r o r
VECTOR_ S O F T P R O G T B R _ T T _ D I V I S I O N _ E X C E P , _ _ e n t r y _ d i v i s i o n _ e x c e p t i o n
# ifdef C O N F I G _ M M U
.section .trap .user
.org TBR_TT_INSTR_TLB_MISS
.globl __trap_user_insn_tlb_miss
__trap_user_insn_tlb_miss :
movsg e a r0 ,g r28 / * f a u l t i n g a d d r e s s * /
movsg s c r0 ,g r31 / * g e t m a p p e d P T D c o v e r a g e s t a r t a d d r e s s * /
xor. p g r28 ,g r31 ,g r31 / * c o m p a r e a d d r e s s e s * /
bra _ _ e n t r y _ u s e r _ i n s n _ t l b _ m i s s
.org TBR_TT_DATA_TLB_MISS
.globl __trap_user_data_tlb_miss
__trap_user_data_tlb_miss :
movsg e a r0 ,g r28 / * f a u l t i n g a d d r e s s * /
movsg s c r1 ,g r31 / * g e t m a p p e d P T D c o v e r a g e s t a r t a d d r e s s * /
xor. p g r28 ,g r31 ,g r31 / * c o m p a r e a d d r e s s e s * /
bra _ _ e n t r y _ u s e r _ d a t a _ t l b _ m i s s
.section .trap .kernel
.org TBR_TT_INSTR_TLB_MISS
.globl __trap_kernel_insn_tlb_miss
__trap_kernel_insn_tlb_miss :
movsg e a r0 ,g r29 / * f a u l t i n g a d d r e s s * /
movsg s c r0 ,g r31 / * g e t m a p p e d P T D c o v e r a g e s t a r t a d d r e s s * /
xor. p g r29 ,g r31 ,g r31 / * c o m p a r e a d d r e s s e s * /
bra _ _ e n t r y _ k e r n e l _ i n s n _ t l b _ m i s s
.org TBR_TT_DATA_TLB_MISS
.globl __trap_kernel_data_tlb_miss
__trap_kernel_data_tlb_miss :
movsg e a r0 ,g r29 / * f a u l t i n g a d d r e s s * /
movsg s c r1 ,g r31 / * g e t m a p p e d P T D c o v e r a g e s t a r t a d d r e s s * /
xor. p g r29 ,g r31 ,g r31 / * c o m p a r e a d d r e s s e s * /
bra _ _ e n t r y _ k e r n e l _ d a t a _ t l b _ m i s s
.section .trap .fixup .user
.org TBR_TT_INSTR_TLB_MISS > > 2
.globl __trap_fixup_user_insn_tlb_miss
__trap_fixup_user_insn_tlb_miss :
.long __break_user_insn_tlb_miss
.org TBR_TT_DATA_TLB_MISS > > 2
.globl __trap_fixup_user_data_tlb_miss
__trap_fixup_user_data_tlb_miss :
.long __break_user_data_tlb_miss
.section .trap .fixup .kernel
.org TBR_TT_INSTR_TLB_MISS > > 2
.globl __trap_fixup_kernel_insn_tlb_miss
__trap_fixup_kernel_insn_tlb_miss :
.long __break_kernel_insn_tlb_miss
.org TBR_TT_DATA_TLB_MISS > > 2
.globl __trap_fixup_kernel_data_tlb_miss
__trap_fixup_kernel_data_tlb_miss :
.long __break_kernel_data_tlb_miss
.section .trap .vector
.org TBR_TT_INSTR_TLB_MISS > > 2
.long __entry_insn_mmu_fault
.org TBR_TT_DATA_TLB_MISS > > 2
.long __entry_data_mmu_fault
# endif
VECTOR_ S P _ M M U T B R _ T T _ D A T A _ D A T _ E X C E P , _ _ e n t r y _ d a t a _ d a t _ f a u l t
VECTOR_ N M I T B R _ T T _ D E C R E M E N T _ T I M E R , _ _ e n t r y _ d o _ N M I
VECTOR_ S O F T P R O G T B R _ T T _ C O M P O U N D _ E X C E P , _ _ e n t r y _ c o m p o u n d _ e x c e p t i o n
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 1 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 2 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 3 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 4 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 5 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 6 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 7 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 8 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 9 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 1 0 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 1 1 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 1 2 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 1 3 , _ _ e n t r y _ d o _ I R Q
VECTOR_ I R Q T B R _ T T _ I N T E R R U P T _ 1 4 , _ _ e n t r y _ d o _ I R Q
VECTOR_ N M I T B R _ T T _ I N T E R R U P T _ 1 5 , _ _ e n t r y _ d o _ N M I
# miscellaneous u s e r m o d e e n t r y p o i n t s
.section .trap .user
.org TBR_TT_TRAP0
.rept 127
bra _ _ e n t r y _ u s p a c e _ s o f t p r o g _ i n t e r r u p t
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the
processor status register (PSR) are relatively slow and because we will
soon have the need to deal with multiple interrupt controls at the same
time (separate h/w and inter-core interrupts).
The way this is done is to dedicate one of the four integer condition code
registers (ICC2) to maintaining a virtual interrupt disablement state
whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate
whether the interrupts are virtually disabled and the ICC2.C flag (Carry)
to indicate whether the interrupts are physically disabled.
ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set
to indicate interrupts are physically enabled. Under normal running
conditions Z==0 and C==1.
Disabling interrupts with local_irq_disable() doesn't then actually
physically disable interrupts - it merely sets ICC2.Z to 1. Should an
interrupt then happen, the exception prologue will note ICC2.Z is set and
branch out of line using one instruction (an unlikely BEQ). Here it will
physically disable interrupts and clear ICC2.C.
When it comes time to enable interrupts (local_irq_enable()), this simply
clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are
clear (the HI integer condition). This can be done with the TIHI
conditional trap instruction.
The trap then physically reenables interrupts and sets ICC2.C again. Upon
returning the interrupt will be taken as interrupts will then be enabled.
Note that whilst processing the trap, the whole exceptions system is
disabled, and so an interrupt can't happen till it returns.
If no pending interrupt had happened, ICC2.C would still be set, the HI
condition would not be fulfilled, and no trap will happen.
Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z
flag out of the CCR register, shifting it down and masking it off. This
gives a result of 0 if interrupts were enabled and 1 if they weren't.
Restoring interrupts (local_irq_restore) is then a matter of taking the
saved value mentioned previously and XOR'ing it against 1. If it was one,
the result will be zero, and if it was zero the result will be non-zero.
This result is then used to affect the ICC2.Z flag directly (it is a
condition code flag after all). An XOR instruction does not affect the
Carry flag, and so that bit of state is unchanged. The two flags can then
be sampled to see if they're both zero using the trap (TIHI) as for the
unconditional reenablement (local_irq_enable).
This patch also:
(1) Modifies the debugging stub (break.S) to handle single-stepping crossing
into the trap #2 handler and into virtually disabled interrupts.
(2) Removes superseded fixup pointers from the second instructions in the trap
tables (there's no a separate fixup table for this).
(3) Declares the trap #3 vector for use in .org directives in the trap table.
(4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with
virtual interrupt handling, and removes the duplicate code that has now
been folded into irq_exit() (softirq and preemption handling).
(5) Tells the compiler in the arch Makefile that ICC2 is now reserved.
(6) Documents the in-kernel ABI, including the virtual interrupts.
(7) Renames the old irq management functions to different names.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 00:53:20 +03:00
.long 0 , 0 , 0
2005-04-17 02:20:36 +04:00
.endr
.org TBR_TT_BREAK
bra _ _ e n t r y _ b r e a k
.long 0 , 0 , 0
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the
processor status register (PSR) are relatively slow and because we will
soon have the need to deal with multiple interrupt controls at the same
time (separate h/w and inter-core interrupts).
The way this is done is to dedicate one of the four integer condition code
registers (ICC2) to maintaining a virtual interrupt disablement state
whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate
whether the interrupts are virtually disabled and the ICC2.C flag (Carry)
to indicate whether the interrupts are physically disabled.
ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set
to indicate interrupts are physically enabled. Under normal running
conditions Z==0 and C==1.
Disabling interrupts with local_irq_disable() doesn't then actually
physically disable interrupts - it merely sets ICC2.Z to 1. Should an
interrupt then happen, the exception prologue will note ICC2.Z is set and
branch out of line using one instruction (an unlikely BEQ). Here it will
physically disable interrupts and clear ICC2.C.
When it comes time to enable interrupts (local_irq_enable()), this simply
clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are
clear (the HI integer condition). This can be done with the TIHI
conditional trap instruction.
The trap then physically reenables interrupts and sets ICC2.C again. Upon
returning the interrupt will be taken as interrupts will then be enabled.
Note that whilst processing the trap, the whole exceptions system is
disabled, and so an interrupt can't happen till it returns.
If no pending interrupt had happened, ICC2.C would still be set, the HI
condition would not be fulfilled, and no trap will happen.
Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z
flag out of the CCR register, shifting it down and masking it off. This
gives a result of 0 if interrupts were enabled and 1 if they weren't.
Restoring interrupts (local_irq_restore) is then a matter of taking the
saved value mentioned previously and XOR'ing it against 1. If it was one,
the result will be zero, and if it was zero the result will be non-zero.
This result is then used to affect the ICC2.Z flag directly (it is a
condition code flag after all). An XOR instruction does not affect the
Carry flag, and so that bit of state is unchanged. The two flags can then
be sampled to see if they're both zero using the trap (TIHI) as for the
unconditional reenablement (local_irq_enable).
This patch also:
(1) Modifies the debugging stub (break.S) to handle single-stepping crossing
into the trap #2 handler and into virtually disabled interrupts.
(2) Removes superseded fixup pointers from the second instructions in the trap
tables (there's no a separate fixup table for this).
(3) Declares the trap #3 vector for use in .org directives in the trap table.
(4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with
virtual interrupt handling, and removes the duplicate code that has now
been folded into irq_exit() (softirq and preemption handling).
(5) Tells the compiler in the arch Makefile that ICC2 is now reserved.
(6) Documents the in-kernel ABI, including the virtual interrupts.
(7) Renames the old irq management functions to different names.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 00:53:20 +03:00
.section .trap .fixup .user
.org TBR_TT_TRAP0 > > 2
.rept 127
.long __break_step_uspace_softprog_interrupt
.endr
.org TBR_TT_BREAK > > 2
.long 0
2005-04-17 02:20:36 +04:00
# miscellaneous k e r n e l m o d e e n t r y p o i n t s
.section .trap .kernel
.org TBR_TT_TRAP0
bra _ _ e n t r y _ k e r n e l _ s o f t p r o g _ i n t e r r u p t
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the
processor status register (PSR) are relatively slow and because we will
soon have the need to deal with multiple interrupt controls at the same
time (separate h/w and inter-core interrupts).
The way this is done is to dedicate one of the four integer condition code
registers (ICC2) to maintaining a virtual interrupt disablement state
whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate
whether the interrupts are virtually disabled and the ICC2.C flag (Carry)
to indicate whether the interrupts are physically disabled.
ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set
to indicate interrupts are physically enabled. Under normal running
conditions Z==0 and C==1.
Disabling interrupts with local_irq_disable() doesn't then actually
physically disable interrupts - it merely sets ICC2.Z to 1. Should an
interrupt then happen, the exception prologue will note ICC2.Z is set and
branch out of line using one instruction (an unlikely BEQ). Here it will
physically disable interrupts and clear ICC2.C.
When it comes time to enable interrupts (local_irq_enable()), this simply
clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are
clear (the HI integer condition). This can be done with the TIHI
conditional trap instruction.
The trap then physically reenables interrupts and sets ICC2.C again. Upon
returning the interrupt will be taken as interrupts will then be enabled.
Note that whilst processing the trap, the whole exceptions system is
disabled, and so an interrupt can't happen till it returns.
If no pending interrupt had happened, ICC2.C would still be set, the HI
condition would not be fulfilled, and no trap will happen.
Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z
flag out of the CCR register, shifting it down and masking it off. This
gives a result of 0 if interrupts were enabled and 1 if they weren't.
Restoring interrupts (local_irq_restore) is then a matter of taking the
saved value mentioned previously and XOR'ing it against 1. If it was one,
the result will be zero, and if it was zero the result will be non-zero.
This result is then used to affect the ICC2.Z flag directly (it is a
condition code flag after all). An XOR instruction does not affect the
Carry flag, and so that bit of state is unchanged. The two flags can then
be sampled to see if they're both zero using the trap (TIHI) as for the
unconditional reenablement (local_irq_enable).
This patch also:
(1) Modifies the debugging stub (break.S) to handle single-stepping crossing
into the trap #2 handler and into virtually disabled interrupts.
(2) Removes superseded fixup pointers from the second instructions in the trap
tables (there's no a separate fixup table for this).
(3) Declares the trap #3 vector for use in .org directives in the trap table.
(4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with
virtual interrupt handling, and removes the duplicate code that has now
been folded into irq_exit() (softirq and preemption handling).
(5) Tells the compiler in the arch Makefile that ICC2 is now reserved.
(6) Documents the in-kernel ABI, including the virtual interrupts.
(7) Renames the old irq management functions to different names.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 00:53:20 +03:00
.org TBR_TT_TRAP1
bra _ _ e n t r y _ k e r n e l _ s o f t p r o g _ i n t e r r u p t
# trap #2 i n k e r n e l - r e e n a b l e i n t e r r u p t s
.org TBR_TT_TRAP2
bra _ _ e n t r y _ k e r n e l _ e x t e r n a l _ i n t e r r u p t _ v i r t u a l _ r e e n a b l e
# miscellaneous k e r n e l t r a p s
.org TBR_TT_TRAP3
.rept 124
bra _ _ e n t r y _ k e r n e l _ s o f t p r o g _ i n t e r r u p t
.long 0 , 0 , 0
2005-04-17 02:20:36 +04:00
.endr
.org TBR_TT_BREAK
bra _ _ e n t r y _ b r e a k
.long 0 , 0 , 0
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the
processor status register (PSR) are relatively slow and because we will
soon have the need to deal with multiple interrupt controls at the same
time (separate h/w and inter-core interrupts).
The way this is done is to dedicate one of the four integer condition code
registers (ICC2) to maintaining a virtual interrupt disablement state
whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate
whether the interrupts are virtually disabled and the ICC2.C flag (Carry)
to indicate whether the interrupts are physically disabled.
ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set
to indicate interrupts are physically enabled. Under normal running
conditions Z==0 and C==1.
Disabling interrupts with local_irq_disable() doesn't then actually
physically disable interrupts - it merely sets ICC2.Z to 1. Should an
interrupt then happen, the exception prologue will note ICC2.Z is set and
branch out of line using one instruction (an unlikely BEQ). Here it will
physically disable interrupts and clear ICC2.C.
When it comes time to enable interrupts (local_irq_enable()), this simply
clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are
clear (the HI integer condition). This can be done with the TIHI
conditional trap instruction.
The trap then physically reenables interrupts and sets ICC2.C again. Upon
returning the interrupt will be taken as interrupts will then be enabled.
Note that whilst processing the trap, the whole exceptions system is
disabled, and so an interrupt can't happen till it returns.
If no pending interrupt had happened, ICC2.C would still be set, the HI
condition would not be fulfilled, and no trap will happen.
Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z
flag out of the CCR register, shifting it down and masking it off. This
gives a result of 0 if interrupts were enabled and 1 if they weren't.
Restoring interrupts (local_irq_restore) is then a matter of taking the
saved value mentioned previously and XOR'ing it against 1. If it was one,
the result will be zero, and if it was zero the result will be non-zero.
This result is then used to affect the ICC2.Z flag directly (it is a
condition code flag after all). An XOR instruction does not affect the
Carry flag, and so that bit of state is unchanged. The two flags can then
be sampled to see if they're both zero using the trap (TIHI) as for the
unconditional reenablement (local_irq_enable).
This patch also:
(1) Modifies the debugging stub (break.S) to handle single-stepping crossing
into the trap #2 handler and into virtually disabled interrupts.
(2) Removes superseded fixup pointers from the second instructions in the trap
tables (there's no a separate fixup table for this).
(3) Declares the trap #3 vector for use in .org directives in the trap table.
(4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with
virtual interrupt handling, and removes the duplicate code that has now
been folded into irq_exit() (softirq and preemption handling).
(5) Tells the compiler in the arch Makefile that ICC2 is now reserved.
(6) Documents the in-kernel ABI, including the virtual interrupts.
(7) Renames the old irq management functions to different names.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-02-15 00:53:20 +03:00
.section .trap .fixup .kernel
.org TBR_TT_TRAP0 > > 2
.long __break_step_kernel_softprog_interrupt
.long __break_step_kernel_softprog_interrupt
.long __break_step_kernel_external_interrupt_virtual_reenable
.rept 124
.long __break_step_kernel_softprog_interrupt
.endr
.org TBR_TT_BREAK > > 2
.long 0
2005-04-17 02:20:36 +04:00
# miscellaneous d e b u g m o d e e n t r y p o i n t s
.section .trap .break
.org TBR_TT_BREAK
movsg b p c s r ,g r30
jmpl @(gr30,gr0)
# miscellaneous v e c t o r s
.section .trap .vector
.org TBR_TT_TRAP0 > > 2
.long system_call
2008-04-10 19:10:55 +04:00
.rept 119
2005-04-17 02:20:36 +04:00
.long __entry_unsupported_trap
.endr
2008-04-10 19:10:55 +04:00
# userspace a t o m i c o p e m u l a t i o n , t r a p s 1 2 0 - 1 2 6
.rept 7
.long __entry_atomic_op
.endr
2005-04-17 02:20:36 +04:00
.org TBR_TT_BREAK > > 2
.long __entry_debug_exception
