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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
* HiSilicon SoC Hardware event counters support
*
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* Copyright ( C ) 2017 HiSilicon Limited
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* Author : Anurup M < anurup . m @ huawei . com >
* Shaokun Zhang < zhangshaokun @ hisilicon . com >
*
* This code is based on the uncore PMUs like arm - cci and arm - ccn .
*/
# ifndef __HISI_UNCORE_PMU_H__
# define __HISI_UNCORE_PMU_H__
drivers/perf: hisi: Add new functions for L3C PMU
On HiSilicon Hip09 platform, some new functions are enhanced on L3C PMU:
* tt_req: it is the abbreviation of tracetag request and allows user to
count only read/write/atomic operations. tt_req is 3-bit and details are
listed in the hisi-pmu document.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
* tt_core: it is the abbreviation of tracetag core and allows user to
filter by core/thread within the cluster, it is a 8-bit bitmap that each
bit represents the corresponding core/thread in this L3C.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0xf/ sleep 5
* datasrc_cfg: it is the abbreviation of data source configuration and
allows user to check where the data comes from, such as: from local DDR,
cross-die DDR or cross-socket DDR. Its is 5-bit and represents different
data source in the SoC.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0xe/ sleep 5
* datasrc_skt: it is the abbreviation of data source from another socket
and is used in the multi-chips, if user wants to check the cross-socket
datat source, it shall be added in perf command. Only one bit is used to
control this.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0x10,datasrc_skt=1/ sleep 5
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-5-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-03-08 14:50:32 +08:00
# include <linux/bitfield.h>
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# include <linux/cpumask.h>
# include <linux/device.h>
# include <linux/kernel.h>
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# include <linux/module.h>
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# include <linux/perf_event.h>
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# include <linux/platform_device.h>
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# include <linux/types.h>
# undef pr_fmt
# define pr_fmt(fmt) "hisi_pmu: " fmt
drivers/perf: hisi: Add new functions for L3C PMU
On HiSilicon Hip09 platform, some new functions are enhanced on L3C PMU:
* tt_req: it is the abbreviation of tracetag request and allows user to
count only read/write/atomic operations. tt_req is 3-bit and details are
listed in the hisi-pmu document.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
* tt_core: it is the abbreviation of tracetag core and allows user to
filter by core/thread within the cluster, it is a 8-bit bitmap that each
bit represents the corresponding core/thread in this L3C.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0xf/ sleep 5
* datasrc_cfg: it is the abbreviation of data source configuration and
allows user to check where the data comes from, such as: from local DDR,
cross-die DDR or cross-socket DDR. Its is 5-bit and represents different
data source in the SoC.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0xe/ sleep 5
* datasrc_skt: it is the abbreviation of data source from another socket
and is used in the multi-chips, if user wants to check the cross-socket
datat source, it shall be added in perf command. Only one bit is used to
control this.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0x10,datasrc_skt=1/ sleep 5
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-5-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-03-08 14:50:32 +08:00
# define HISI_PMU_V2 0x30
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# define HISI_MAX_COUNTERS 0x10
# define to_hisi_pmu(p) (container_of(p, struct hisi_pmu, pmu))
# define HISI_PMU_ATTR(_name, _func, _config) \
( & ( ( struct dev_ext_attribute [ ] ) { \
{ __ATTR ( _name , 0444 , _func , NULL ) , ( void * ) _config } \
} ) [ 0 ] . attr . attr )
# define HISI_PMU_FORMAT_ATTR(_name, _config) \
HISI_PMU_ATTR ( _name , hisi_format_sysfs_show , ( void * ) _config )
# define HISI_PMU_EVENT_ATTR(_name, _config) \
HISI_PMU_ATTR ( _name , hisi_event_sysfs_show , ( unsigned long ) _config )
drivers/perf: hisi: Add new functions for L3C PMU
On HiSilicon Hip09 platform, some new functions are enhanced on L3C PMU:
* tt_req: it is the abbreviation of tracetag request and allows user to
count only read/write/atomic operations. tt_req is 3-bit and details are
listed in the hisi-pmu document.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
* tt_core: it is the abbreviation of tracetag core and allows user to
filter by core/thread within the cluster, it is a 8-bit bitmap that each
bit represents the corresponding core/thread in this L3C.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0xf/ sleep 5
* datasrc_cfg: it is the abbreviation of data source configuration and
allows user to check where the data comes from, such as: from local DDR,
cross-die DDR or cross-socket DDR. Its is 5-bit and represents different
data source in the SoC.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0xe/ sleep 5
* datasrc_skt: it is the abbreviation of data source from another socket
and is used in the multi-chips, if user wants to check the cross-socket
datat source, it shall be added in perf command. Only one bit is used to
control this.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0x10,datasrc_skt=1/ sleep 5
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-5-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-03-08 14:50:32 +08:00
# define HISI_PMU_EVENT_ATTR_EXTRACTOR(name, config, hi, lo) \
static inline u32 hisi_get_ # # name ( struct perf_event * event ) \
{ \
return FIELD_GET ( GENMASK_ULL ( hi , lo ) , event - > attr . config ) ; \
}
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struct hisi_pmu ;
struct hisi_uncore_ops {
void ( * write_evtype ) ( struct hisi_pmu * , int , u32 ) ;
int ( * get_event_idx ) ( struct perf_event * ) ;
u64 ( * read_counter ) ( struct hisi_pmu * , struct hw_perf_event * ) ;
void ( * write_counter ) ( struct hisi_pmu * , struct hw_perf_event * , u64 ) ;
void ( * enable_counter ) ( struct hisi_pmu * , struct hw_perf_event * ) ;
void ( * disable_counter ) ( struct hisi_pmu * , struct hw_perf_event * ) ;
void ( * enable_counter_int ) ( struct hisi_pmu * , struct hw_perf_event * ) ;
void ( * disable_counter_int ) ( struct hisi_pmu * , struct hw_perf_event * ) ;
void ( * start_counters ) ( struct hisi_pmu * ) ;
void ( * stop_counters ) ( struct hisi_pmu * ) ;
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u32 ( * get_int_status ) ( struct hisi_pmu * hisi_pmu ) ;
void ( * clear_int_status ) ( struct hisi_pmu * hisi_pmu , int idx ) ;
drivers/perf: hisi: Add new functions for L3C PMU
On HiSilicon Hip09 platform, some new functions are enhanced on L3C PMU:
* tt_req: it is the abbreviation of tracetag request and allows user to
count only read/write/atomic operations. tt_req is 3-bit and details are
listed in the hisi-pmu document.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
* tt_core: it is the abbreviation of tracetag core and allows user to
filter by core/thread within the cluster, it is a 8-bit bitmap that each
bit represents the corresponding core/thread in this L3C.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0xf/ sleep 5
* datasrc_cfg: it is the abbreviation of data source configuration and
allows user to check where the data comes from, such as: from local DDR,
cross-die DDR or cross-socket DDR. Its is 5-bit and represents different
data source in the SoC.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0xe/ sleep 5
* datasrc_skt: it is the abbreviation of data source from another socket
and is used in the multi-chips, if user wants to check the cross-socket
datat source, it shall be added in perf command. Only one bit is used to
control this.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0x10,datasrc_skt=1/ sleep 5
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-5-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-03-08 14:50:32 +08:00
void ( * enable_filter ) ( struct perf_event * event ) ;
void ( * disable_filter ) ( struct perf_event * event ) ;
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} ;
struct hisi_pmu_hwevents {
struct perf_event * hw_events [ HISI_MAX_COUNTERS ] ;
DECLARE_BITMAP ( used_mask , HISI_MAX_COUNTERS ) ;
drivers/perf: hisi: Add new functions for L3C PMU
On HiSilicon Hip09 platform, some new functions are enhanced on L3C PMU:
* tt_req: it is the abbreviation of tracetag request and allows user to
count only read/write/atomic operations. tt_req is 3-bit and details are
listed in the hisi-pmu document.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
* tt_core: it is the abbreviation of tracetag core and allows user to
filter by core/thread within the cluster, it is a 8-bit bitmap that each
bit represents the corresponding core/thread in this L3C.
$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0xf/ sleep 5
* datasrc_cfg: it is the abbreviation of data source configuration and
allows user to check where the data comes from, such as: from local DDR,
cross-die DDR or cross-socket DDR. Its is 5-bit and represents different
data source in the SoC.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0xe/ sleep 5
* datasrc_skt: it is the abbreviation of data source from another socket
and is used in the multi-chips, if user wants to check the cross-socket
datat source, it shall be added in perf command. Only one bit is used to
control this.
$# perf stat -a -e hisi_sccl3_l3c0/dat_access,datasrc_cfg=0x10,datasrc_skt=1/ sleep 5
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Co-developed-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Link: https://lore.kernel.org/r/1615186237-22263-5-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-03-08 14:50:32 +08:00
const struct attribute_group * * attr_groups ;
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} ;
/* Generic pmu struct for different pmu types */
struct hisi_pmu {
struct pmu pmu ;
const struct hisi_uncore_ops * ops ;
struct hisi_pmu_hwevents pmu_events ;
/* associated_cpus: All CPUs associated with the PMU */
cpumask_t associated_cpus ;
/* CPU used for counting */
int on_cpu ;
int irq ;
struct device * dev ;
struct hlist_node node ;
int sccl_id ;
int ccl_id ;
void __iomem * base ;
/* the ID of the PMU modules */
u32 index_id ;
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/* For DDRC PMU v2: each DDRC has more than one DMC */
u32 sub_id ;
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int num_counters ;
int counter_bits ;
/* check event code range */
int check_event ;
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u32 identifier ;
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} ;
int hisi_uncore_pmu_get_event_idx ( struct perf_event * event ) ;
void hisi_uncore_pmu_read ( struct perf_event * event ) ;
int hisi_uncore_pmu_add ( struct perf_event * event , int flags ) ;
void hisi_uncore_pmu_del ( struct perf_event * event , int flags ) ;
void hisi_uncore_pmu_start ( struct perf_event * event , int flags ) ;
void hisi_uncore_pmu_stop ( struct perf_event * event , int flags ) ;
void hisi_uncore_pmu_set_event_period ( struct perf_event * event ) ;
void hisi_uncore_pmu_event_update ( struct perf_event * event ) ;
int hisi_uncore_pmu_event_init ( struct perf_event * event ) ;
void hisi_uncore_pmu_enable ( struct pmu * pmu ) ;
void hisi_uncore_pmu_disable ( struct pmu * pmu ) ;
ssize_t hisi_event_sysfs_show ( struct device * dev ,
struct device_attribute * attr , char * buf ) ;
ssize_t hisi_format_sysfs_show ( struct device * dev ,
struct device_attribute * attr , char * buf ) ;
ssize_t hisi_cpumask_sysfs_show ( struct device * dev ,
struct device_attribute * attr , char * buf ) ;
int hisi_uncore_pmu_online_cpu ( unsigned int cpu , struct hlist_node * node ) ;
int hisi_uncore_pmu_offline_cpu ( unsigned int cpu , struct hlist_node * node ) ;
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ssize_t hisi_uncore_pmu_identifier_attr_show ( struct device * dev ,
struct device_attribute * attr ,
char * page ) ;
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int hisi_uncore_pmu_init_irq ( struct hisi_pmu * hisi_pmu ,
struct platform_device * pdev ) ;
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# endif /* __HISI_UNCORE_PMU_H__ */