[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-25 23:32:13 -07:00
/*
* Copyright ( C ) 2004 - 2006 Atmel Corporation
*
* This program is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation .
*/
# ifndef __ASM_AVR32_ASM_H__
# define __ASM_AVR32_ASM_H__
# include <asm/sysreg.h>
# include <asm/asm-offsets.h>
# include <asm/thread_info.h>
2008-02-24 23:19:22 +01:00
# define mask_interrupts ssrf SYSREG_GM_OFFSET
# define mask_exceptions ssrf SYSREG_EM_OFFSET
# define unmask_interrupts csrf SYSREG_GM_OFFSET
# define unmask_exceptions csrf SYSREG_EM_OFFSET
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-25 23:32:13 -07:00
# ifdef CONFIG_FRAME_POINTER
. macro save_fp
st . w - - sp , r7
. endm
. macro restore_fp
ld . w r7 , sp + +
. endm
. macro zero_fp
mov r7 , 0
. endm
# else
. macro save_fp
. endm
. macro restore_fp
. endm
. macro zero_fp
. endm
# endif
. macro get_thread_info reg
mov \ reg , sp
andl \ reg , ~ ( THREAD_SIZE - 1 ) & 0xffff
. endm
/* Save and restore registers */
. macro save_min sr , tmp = lr
pushm lr
mfsr \ tmp , \ sr
zero_fp
st . w - - sp , \ tmp
. endm
. macro restore_min sr , tmp = lr
ld . w \ tmp , sp + +
mtsr \ sr , \ tmp
popm lr
. endm
. macro save_half sr , tmp = lr
save_fp
pushm r8 - r9 , r10 , r11 , r12 , lr
zero_fp
mfsr \ tmp , \ sr
st . w - - sp , \ tmp
. endm
. macro restore_half sr , tmp = lr
ld . w \ tmp , sp + +
mtsr \ sr , \ tmp
popm r8 - r9 , r10 , r11 , r12 , lr
restore_fp
. endm
. macro save_full_user sr , tmp = lr
stmts - - sp , r0 , r1 , r2 , r3 , r4 , r5 , r6 , r7 , r8 , r9 , r10 , r11 , r12 , sp , lr
st . w - - sp , lr
zero_fp
mfsr \ tmp , \ sr
st . w - - sp , \ tmp
. endm
. macro restore_full_user sr , tmp = lr
ld . w \ tmp , sp + +
mtsr \ sr , \ tmp
ld . w lr , sp + +
ldmts sp + + , r0 , r1 , r2 , r3 , r4 , r5 , r6 , r7 , r8 , r9 , r10 , r11 , r12 , sp , lr
. endm
/* uaccess macros */
. macro branch_if_kernel scratch , label
get_thread_info \ scratch
ld . w \ scratch , \ scratch [ TI_flags ]
bld \ scratch , TIF_USERSPACE
brcc \ label
. endm
. macro ret_if_privileged scratch , addr , size , ret
sub \ scratch , \ size , 1
add \ scratch , \ addr
retcs \ ret
retmi \ ret
. endm
# endif /* __ASM_AVR32_ASM_H__ */