linux/arch/arm/mach-omap2/hdq1w.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Shared macros and function prototypes for the HDQ1W/1-wire IP block
 *
 * Copyright (C) 2012 Texas Instruments, Inc.
 * Paul Walmsley
 */
#ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H
#define ARCH_ARM_MACH_OMAP2_HDQ1W_H

#include "omap_hwmod.h"

/*
 * XXX A future cleanup patch should modify
 * drivers/w1/masters/omap_hdq.c to use these macros
 */
#define HDQ_CTRL_STATUS_OFFSET			0x0c
#define HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT	5


extern int omap_hdq1w_reset(struct omap_hwmod *oh);

#endif
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin st fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 246 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.674189849@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2019-05-30 02:57:50 +03:00			`/* SPDX-License-Identifier: GPL-2.0-only */`
ARM: OMAP2+: HDQ1W: add custom reset function Implement a custom reset function for the HDQ1W IP block. This is because the HDQ1W IP block, like I2C, has an internal clock gating bit that needs to be toggled after setting the SOFTRESET bit to allow the reset to propagate. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: NeilBrown <neilb@suse.de> Cc: Avinash.H.M <avinashhm@ti.com> Tested-by: NeilBrown <neilb@suse.de> 2012-05-08 21:34:27 +04:00			`/*`
			`* Shared macros and function prototypes for the HDQ1W/1-wire IP block`
			`*`
			`* Copyright (C) 2012 Texas Instruments, Inc.`
			`* Paul Walmsley`
			`*/`
			`#ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H`
			`#define ARCH_ARM_MACH_OMAP2_HDQ1W_H`

ARM: OMAP: Make plat/omap_hwmod.h local to mach-omap2 Let's make omap_hwmod local to mach-omap2 for ARM common zImage support. Signed-off-by: Tony Lindgren <tony@atomide.com> 2012-10-03 04:41:35 +04:00			`#include "omap_hwmod.h"`
ARM: OMAP2+: HDQ1W: add custom reset function Implement a custom reset function for the HDQ1W IP block. This is because the HDQ1W IP block, like I2C, has an internal clock gating bit that needs to be toggled after setting the SOFTRESET bit to allow the reset to propagate. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: NeilBrown <neilb@suse.de> Cc: Avinash.H.M <avinashhm@ti.com> Tested-by: NeilBrown <neilb@suse.de> 2012-05-08 21:34:27 +04:00
			`/*`
			`* XXX A future cleanup patch should modify`
			`* drivers/w1/masters/omap_hdq.c to use these macros`
			`*/`
			`#define HDQ_CTRL_STATUS_OFFSET 0x0c`
			`#define HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT 5`


			`extern int omap_hdq1w_reset(struct omap_hwmod *oh);`

			`#endif`