Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 07:56:01 +04:00
/*
* drivers / net / ibm_newemac / phy . h
*
* Driver for PowerPC 4 xx on - chip ethernet controller , PHY support
*
2007-12-05 03:14:33 +03:00
* Copyright 2007 Benjamin Herrenschmidt , IBM Corp .
* < benh @ kernel . crashing . org >
*
* Based on the arch / ppc version of the driver :
*
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 07:56:01 +04:00
* Benjamin Herrenschmidt < benh @ kernel . crashing . org >
* February 2003
*
* Minor additions by Eugene Surovegin < ebs @ ebshome . net > , 2004
*
* This program is free software ; you can redistribute it and / or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation ; either version 2 of the License , or ( at your
* option ) any later version .
*
* This file basically duplicates sungem_phy . { c , h } with different PHYs
* supported . I ' m looking into merging that in a single mii layer more
* flexible than mii . c
*/
# ifndef __IBM_NEWEMAC_PHY_H
# define __IBM_NEWEMAC_PHY_H
struct mii_phy ;
/* Operations supported by any kind of PHY */
struct mii_phy_ops {
int ( * init ) ( struct mii_phy * phy ) ;
int ( * suspend ) ( struct mii_phy * phy , int wol_options ) ;
int ( * setup_aneg ) ( struct mii_phy * phy , u32 advertise ) ;
int ( * setup_forced ) ( struct mii_phy * phy , int speed , int fd ) ;
int ( * poll_link ) ( struct mii_phy * phy ) ;
int ( * read_link ) ( struct mii_phy * phy ) ;
} ;
/* Structure used to statically define an mii/gii based PHY */
struct mii_phy_def {
u32 phy_id ; /* Concatenated ID1 << 16 | ID2 */
u32 phy_id_mask ; /* Significant bits */
u32 features ; /* Ethtool SUPPORTED_* defines or
0 for autodetect */
int magic_aneg ; /* Autoneg does all speed test for us */
const char * name ;
const struct mii_phy_ops * ops ;
} ;
/* An instance of a PHY, partially borrowed from mii_if_info */
struct mii_phy {
struct mii_phy_def * def ;
u32 advertising ; /* Ethtool ADVERTISED_* defines */
u32 features ; /* Copied from mii_phy_def.features
or determined automaticaly */
int address ; /* PHY address */
int mode ; /* PHY mode */
/* 1: autoneg enabled, 0: disabled */
int autoneg ;
/* forced speed & duplex (no autoneg)
* partner speed & duplex & pause ( autoneg )
*/
int speed ;
int duplex ;
int pause ;
int asym_pause ;
/* Provided by host chip */
struct net_device * dev ;
int ( * mdio_read ) ( struct net_device * dev , int addr , int reg ) ;
void ( * mdio_write ) ( struct net_device * dev , int addr , int reg ,
int val ) ;
} ;
/* Pass in a struct mii_phy with dev, mdio_read and mdio_write
* filled , the remaining fields will be filled on return
*/
int emac_mii_phy_probe ( struct mii_phy * phy , int address ) ;
int emac_mii_reset_phy ( struct mii_phy * phy ) ;
# endif /* __IBM_NEWEMAC_PHY_H */
