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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id : http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
$schema : http://devicetree.org/meta-schemas/core.yaml#
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title : MediaTek JPEG Encoder
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maintainers :
- Xia Jiang <xia.jiang@mediatek.com>
description : |-
MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
properties :
compatible :
items :
- enum :
- mediatek,mt2701-jpgenc
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- mediatek,mt8183-jpgenc
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- mediatek,mt8186-jpgenc
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- mediatek,mt8188-jpgenc
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- const : mediatek,mtk-jpgenc
reg :
maxItems : 1
interrupts :
maxItems : 1
clocks :
maxItems : 1
clock-names :
items :
- const : jpgenc
power-domains :
maxItems : 1
iommus :
maxItems : 2
description : |
Points to the respective IOMMU block with master port as argument, see
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
Ports are according to the HW.
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dma-ranges :
maxItems : 1
description : |
Describes the physical address space of IOMMU maps to memory.
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required :
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
- iommus
additionalProperties : false
examples :
- |
#include <dt-bindings/clock/mt2701-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/power/mt2701-power.h>
jpegenc : jpegenc@1500a000 {
compatible = "mediatek,mt2701-jpgenc",
"mediatek,mtk-jpgenc" ;
reg = <0x1500a000 0x1000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
clocks = <&imgsys CLK_IMG_VENC>;
clock-names = "jpgenc";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
<&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
};