2019-06-01 11:09:00 +03:00
/* SPDX-License-Identifier: GPL-2.0-only */
2015-01-17 21:15:14 +03:00
/*
* Pin controller and GPIO driver for Amlogic Meson SoCs
*
* Copyright ( C ) 2014 Beniamino Galvani < b . galvani @ gmail . com >
*/
2018-09-13 14:58:21 +03:00
# include <linux/gpio/driver.h>
2015-01-17 21:15:14 +03:00
# include <linux/pinctrl/pinctrl.h>
2017-10-12 15:40:25 +03:00
# include <linux/platform_device.h>
2015-01-17 21:15:14 +03:00
# include <linux/regmap.h>
# include <linux/types.h>
/**
* struct meson_pmx_group - a pinmux group
*
* @ name : group name
* @ pins : pins in the group
* @ num_pins : number of pins in the group
* @ is_gpio : whether the group is a single GPIO group
* @ reg : register offset for the group in the domain mux registers
* @ bit bit index enabling the group
* @ domain : index of the domain this group belongs to
*/
struct meson_pmx_group {
const char * name ;
const unsigned int * pins ;
unsigned int num_pins ;
2017-10-12 15:40:26 +03:00
const void * data ;
2015-01-17 21:15:14 +03:00
} ;
/**
* struct meson_pmx_func - a pinmux function
*
* @ name : function name
* @ groups : groups in the function
* @ num_groups : number of groups in the function
*/
struct meson_pmx_func {
const char * name ;
const char * const * groups ;
unsigned int num_groups ;
} ;
/**
* struct meson_reg_desc - a register descriptor
*
* @ reg : register offset in the regmap
* @ bit : bit index in register
*
* The structure describes the information needed to control pull ,
* pull - enable , direction , etc . for a single pin
*/
struct meson_reg_desc {
unsigned int reg ;
unsigned int bit ;
} ;
/**
* enum meson_reg_type - type of registers encoded in @ meson_reg_desc
*/
enum meson_reg_type {
REG_PULLEN ,
REG_PULL ,
REG_DIR ,
REG_OUT ,
REG_IN ,
2019-05-14 11:26:51 +03:00
REG_DS ,
2015-01-17 21:15:14 +03:00
NUM_REG ,
} ;
2019-05-14 11:26:51 +03:00
/**
* enum meson_pinconf_drv - value of drive - strength supported
*/
enum meson_pinconf_drv {
MESON_PINCONF_DRV_500UA ,
MESON_PINCONF_DRV_2500UA ,
MESON_PINCONF_DRV_3000UA ,
MESON_PINCONF_DRV_4000UA ,
} ;
2015-01-17 21:15:14 +03:00
/**
* struct meson bank
*
* @ name : bank name
* @ first : first pin of the bank
* @ last : last pin of the bank
2017-06-08 22:37:50 +03:00
* @ irq : hwirq base number of the bank
2015-01-17 21:15:14 +03:00
* @ regs : array of register descriptors
*
* A bank represents a set of pins controlled by a contiguous set of
* bits in the domain registers . The structure specifies which bits in
* the regmap control the different functionalities . Each member of
* the @ regs array refers to the first pin of the bank .
*/
struct meson_bank {
const char * name ;
unsigned int first ;
unsigned int last ;
2017-06-08 22:37:50 +03:00
int irq_first ;
int irq_last ;
2015-01-17 21:15:14 +03:00
struct meson_reg_desc regs [ NUM_REG ] ;
} ;
struct meson_pinctrl_data {
2016-08-13 20:41:18 +03:00
const char * name ;
2015-01-17 21:15:14 +03:00
const struct pinctrl_pin_desc * pins ;
struct meson_pmx_group * groups ;
struct meson_pmx_func * funcs ;
unsigned int num_pins ;
unsigned int num_groups ;
unsigned int num_funcs ;
2016-08-13 20:41:18 +03:00
struct meson_bank * banks ;
unsigned int num_banks ;
2017-10-12 15:40:26 +03:00
const struct pinmux_ops * pmx_ops ;
2017-11-20 13:08:24 +03:00
void * pmx_data ;
2015-01-17 21:15:14 +03:00
} ;
struct meson_pinctrl {
struct device * dev ;
struct pinctrl_dev * pcdev ;
struct pinctrl_desc desc ;
struct meson_pinctrl_data * data ;
2016-08-13 20:41:18 +03:00
struct regmap * reg_mux ;
struct regmap * reg_pullen ;
struct regmap * reg_pull ;
struct regmap * reg_gpio ;
2019-01-17 13:23:15 +03:00
struct regmap * reg_ds ;
2016-08-13 20:41:18 +03:00
struct gpio_chip chip ;
struct device_node * of_node ;
2015-01-17 21:15:14 +03:00
} ;
# define FUNCTION(fn) \
{ \
. name = # fn , \
. groups = fn # # _groups , \
. num_groups = ARRAY_SIZE ( fn # # _groups ) , \
}
2019-05-14 11:26:51 +03:00
# define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
dsr , dsb ) \
2015-01-17 21:15:14 +03:00
{ \
2017-06-08 22:37:50 +03:00
. name = n , \
. first = f , \
. last = l , \
. irq_first = fi , \
. irq_last = li , \
. regs = { \
2015-01-17 21:15:14 +03:00
[ REG_PULLEN ] = { per , peb } , \
[ REG_PULL ] = { pr , pb } , \
[ REG_DIR ] = { dr , db } , \
[ REG_OUT ] = { or , ob } , \
[ REG_IN ] = { ir , ib } , \
2019-05-14 11:26:51 +03:00
[ REG_DS ] = { dsr , dsb } , \
2015-01-17 21:15:14 +03:00
} , \
}
2019-05-14 11:26:51 +03:00
# define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
BANK_DS ( n , f , l , fi , li , per , peb , pr , pb , dr , db , or , ob , ir , ib , 0 , 0 )
2017-09-20 16:39:20 +03:00
# define MESON_PIN(x) PINCTRL_PIN(x, #x)
2015-01-17 21:15:14 +03:00
2017-10-12 15:40:26 +03:00
/* Common pmx functions */
int meson_pmx_get_funcs_count ( struct pinctrl_dev * pcdev ) ;
const char * meson_pmx_get_func_name ( struct pinctrl_dev * pcdev ,
unsigned selector ) ;
int meson_pmx_get_groups ( struct pinctrl_dev * pcdev ,
unsigned selector ,
const char * const * * groups ,
unsigned * const num_groups ) ;
2017-10-12 15:40:25 +03:00
/* Common probe function */
int meson_pinctrl_probe ( struct platform_device * pdev ) ;