2019-05-27 08:55:21 +02:00
// SPDX-License-Identifier: GPL-2.0-only
2016-08-22 22:57:44 -07:00
/*
2017-01-30 20:33:08 +05:30
* Qualcomm ADSP / SLPI Peripheral Image Loader for MSM8974 and MSM8996
2016-08-22 22:57:44 -07:00
*
* Copyright ( C ) 2016 Linaro Ltd
* Copyright ( C ) 2014 Sony Mobile Communications AB
* Copyright ( c ) 2012 - 2013 , The Linux Foundation . All rights reserved .
*/
2016-10-25 13:57:26 -07:00
# include <linux/clk.h>
2016-08-22 22:57:44 -07:00
# include <linux/firmware.h>
# include <linux/interrupt.h>
# include <linux/kernel.h>
# include <linux/module.h>
# include <linux/of_address.h>
# include <linux/of_device.h>
# include <linux/platform_device.h>
2019-11-18 21:43:41 +00:00
# include <linux/pm_domain.h>
# include <linux/pm_runtime.h>
2016-08-22 22:57:44 -07:00
# include <linux/qcom_scm.h>
# include <linux/regulator/consumer.h>
# include <linux/remoteproc.h>
2017-01-27 03:12:57 -08:00
# include <linux/soc/qcom/mdt_loader.h>
2016-08-22 22:57:44 -07:00
# include <linux/soc/qcom/smem.h>
# include <linux/soc/qcom/smem_state.h>
2017-01-27 02:28:32 -08:00
# include "qcom_common.h"
2020-06-22 12:19:40 -07:00
# include "qcom_pil_info.h"
2018-06-04 13:30:37 -07:00
# include "qcom_q6v5.h"
2016-08-22 22:57:44 -07:00
# include "remoteproc_internal.h"
2017-01-30 20:33:06 +05:30
struct adsp_data {
int crash_reason_smem ;
const char * firmware_name ;
int pas_id ;
2020-11-19 13:05:34 -08:00
unsigned int minidump_id ;
2017-01-30 20:33:07 +05:30
bool has_aggre2_clk ;
2019-11-18 21:44:07 +00:00
bool auto_boot ;
2017-08-27 21:51:38 -07:00
2019-11-18 21:43:41 +00:00
char * * proxy_pd_names ;
2021-09-16 19:29:21 +05:30
const char * load_state ;
2017-07-24 22:56:43 -07:00
const char * ssr_name ;
2017-08-27 21:51:38 -07:00
const char * sysmon_name ;
int ssctl_id ;
2017-01-30 20:33:06 +05:30
} ;
2016-08-22 22:57:44 -07:00
struct qcom_adsp {
struct device * dev ;
struct rproc * rproc ;
2018-06-04 13:30:37 -07:00
struct qcom_q6v5 q6v5 ;
2016-08-22 22:57:44 -07:00
2016-10-25 13:57:26 -07:00
struct clk * xo ;
2017-01-30 20:33:07 +05:30
struct clk * aggre2_clk ;
2016-10-25 13:57:26 -07:00
2016-08-22 22:57:44 -07:00
struct regulator * cx_supply ;
2017-01-30 20:33:07 +05:30
struct regulator * px_supply ;
2016-08-22 22:57:44 -07:00
2019-11-18 21:43:41 +00:00
struct device * proxy_pds [ 3 ] ;
int proxy_pd_count ;
2017-01-30 20:33:06 +05:30
int pas_id ;
2020-11-19 13:05:34 -08:00
unsigned int minidump_id ;
2017-01-30 20:33:06 +05:30
int crash_reason_smem ;
2017-01-30 20:33:07 +05:30
bool has_aggre2_clk ;
2020-06-22 12:19:40 -07:00
const char * info_name ;
2017-01-30 20:33:06 +05:30
2016-08-22 22:57:44 -07:00
struct completion start_done ;
struct completion stop_done ;
phys_addr_t mem_phys ;
phys_addr_t mem_reloc ;
void * mem_region ;
size_t mem_size ;
2017-01-29 14:05:50 -08:00
2017-08-29 16:13:35 -07:00
struct qcom_rproc_glink glink_subdev ;
2017-01-29 14:05:50 -08:00
struct qcom_rproc_subdev smd_subdev ;
2017-07-24 22:56:43 -07:00
struct qcom_rproc_ssr ssr_subdev ;
2017-08-27 21:51:38 -07:00
struct qcom_sysmon * sysmon ;
2022-01-27 18:55:09 -08:00
struct qcom_scm_pas_metadata pas_metadata ;
2016-08-22 22:57:44 -07:00
} ;
2020-11-19 13:05:34 -08:00
static void adsp_minidump ( struct rproc * rproc )
{
struct qcom_adsp * adsp = rproc - > priv ;
qcom_minidump ( rproc , adsp - > minidump_id ) ;
}
2019-11-18 21:43:41 +00:00
static int adsp_pds_enable ( struct qcom_adsp * adsp , struct device * * pds ,
size_t pd_count )
{
int ret ;
int i ;
for ( i = 0 ; i < pd_count ; i + + ) {
dev_pm_genpd_set_performance_state ( pds [ i ] , INT_MAX ) ;
ret = pm_runtime_get_sync ( pds [ i ] ) ;
2020-11-02 22:35:54 +08:00
if ( ret < 0 ) {
pm_runtime_put_noidle ( pds [ i ] ) ;
dev_pm_genpd_set_performance_state ( pds [ i ] , 0 ) ;
2019-11-18 21:43:41 +00:00
goto unroll_pd_votes ;
2020-11-02 22:35:54 +08:00
}
2019-11-18 21:43:41 +00:00
}
return 0 ;
unroll_pd_votes :
for ( i - - ; i > = 0 ; i - - ) {
dev_pm_genpd_set_performance_state ( pds [ i ] , 0 ) ;
pm_runtime_put ( pds [ i ] ) ;
}
return ret ;
} ;
static void adsp_pds_disable ( struct qcom_adsp * adsp , struct device * * pds ,
size_t pd_count )
{
int i ;
for ( i = 0 ; i < pd_count ; i + + ) {
dev_pm_genpd_set_performance_state ( pds [ i ] , 0 ) ;
pm_runtime_put ( pds [ i ] ) ;
}
}
2022-01-27 18:55:09 -08:00
static int adsp_unprepare ( struct rproc * rproc )
{
struct qcom_adsp * adsp = ( struct qcom_adsp * ) rproc - > priv ;
/*
* adsp_load ( ) did pass pas_metadata to the SCM driver for storing
* metadata context . It might have been released already if
* auth_and_reset ( ) was successful , but in other cases clean it up
* here .
*/
qcom_scm_pas_metadata_release ( & adsp - > pas_metadata ) ;
return 0 ;
}
2016-08-22 22:57:44 -07:00
static int adsp_load ( struct rproc * rproc , const struct firmware * fw )
{
struct qcom_adsp * adsp = ( struct qcom_adsp * ) rproc - > priv ;
2020-06-22 12:19:40 -07:00
int ret ;
2016-08-22 22:57:44 -07:00
2022-01-27 18:55:09 -08:00
ret = qcom_mdt_pas_init ( adsp - > dev , fw , rproc - > firmware , adsp - > pas_id ,
adsp - > mem_phys , & adsp - > pas_metadata ) ;
if ( ret )
return ret ;
ret = qcom_mdt_load_no_init ( adsp - > dev , fw , rproc - > firmware , adsp - > pas_id ,
adsp - > mem_region , adsp - > mem_phys , adsp - > mem_size ,
& adsp - > mem_reloc ) ;
2020-06-22 12:19:40 -07:00
if ( ret )
return ret ;
2018-01-05 16:04:19 -08:00
2020-06-22 12:19:40 -07:00
qcom_pil_info_store ( adsp - > info_name , adsp - > mem_phys , adsp - > mem_size ) ;
return 0 ;
2016-08-22 22:57:44 -07:00
}
static int adsp_start ( struct rproc * rproc )
{
struct qcom_adsp * adsp = ( struct qcom_adsp * ) rproc - > priv ;
int ret ;
2021-09-16 19:29:21 +05:30
ret = qcom_q6v5_prepare ( & adsp - > q6v5 ) ;
if ( ret )
return ret ;
2019-11-18 21:43:41 +00:00
ret = adsp_pds_enable ( adsp , adsp - > proxy_pds , adsp - > proxy_pd_count ) ;
if ( ret < 0 )
2021-09-16 19:29:21 +05:30
goto disable_irqs ;
2019-11-18 21:43:41 +00:00
2016-10-25 13:57:26 -07:00
ret = clk_prepare_enable ( adsp - > xo ) ;
2016-08-22 22:57:44 -07:00
if ( ret )
2019-11-18 21:43:41 +00:00
goto disable_proxy_pds ;
2016-08-22 22:57:44 -07:00
2017-01-30 20:33:07 +05:30
ret = clk_prepare_enable ( adsp - > aggre2_clk ) ;
if ( ret )
goto disable_xo_clk ;
2016-10-25 13:57:26 -07:00
ret = regulator_enable ( adsp - > cx_supply ) ;
if ( ret )
2017-01-30 20:33:07 +05:30
goto disable_aggre2_clk ;
ret = regulator_enable ( adsp - > px_supply ) ;
if ( ret )
goto disable_cx_supply ;
2016-10-25 13:57:26 -07:00
2017-01-30 20:33:06 +05:30
ret = qcom_scm_pas_auth_and_reset ( adsp - > pas_id ) ;
2016-08-22 22:57:44 -07:00
if ( ret ) {
dev_err ( adsp - > dev ,
" failed to authenticate image and release reset \n " ) ;
2017-01-30 20:33:07 +05:30
goto disable_px_supply ;
2016-08-22 22:57:44 -07:00
}
2018-06-04 13:30:37 -07:00
ret = qcom_q6v5_wait_for_start ( & adsp - > q6v5 , msecs_to_jiffies ( 5000 ) ) ;
if ( ret = = - ETIMEDOUT ) {
2016-08-22 22:57:44 -07:00
dev_err ( adsp - > dev , " start timed out \n " ) ;
2017-01-30 20:33:06 +05:30
qcom_scm_pas_shutdown ( adsp - > pas_id ) ;
2017-01-30 20:33:07 +05:30
goto disable_px_supply ;
2016-08-22 22:57:44 -07:00
}
2022-01-27 18:55:09 -08:00
qcom_scm_pas_metadata_release ( & adsp - > pas_metadata ) ;
2018-06-04 13:30:37 -07:00
return 0 ;
2016-08-22 22:57:44 -07:00
2017-01-30 20:33:07 +05:30
disable_px_supply :
regulator_disable ( adsp - > px_supply ) ;
disable_cx_supply :
2016-08-22 22:57:44 -07:00
regulator_disable ( adsp - > cx_supply ) ;
2017-01-30 20:33:07 +05:30
disable_aggre2_clk :
clk_disable_unprepare ( adsp - > aggre2_clk ) ;
disable_xo_clk :
2016-10-25 13:57:26 -07:00
clk_disable_unprepare ( adsp - > xo ) ;
2019-11-18 21:43:41 +00:00
disable_proxy_pds :
adsp_pds_disable ( adsp , adsp - > proxy_pds , adsp - > proxy_pd_count ) ;
2019-11-18 21:43:30 +00:00
disable_irqs :
qcom_q6v5_unprepare ( & adsp - > q6v5 ) ;
2016-08-22 22:57:44 -07:00
return ret ;
}
2018-06-04 13:30:37 -07:00
static void qcom_pas_handover ( struct qcom_q6v5 * q6v5 )
{
struct qcom_adsp * adsp = container_of ( q6v5 , struct qcom_adsp , q6v5 ) ;
regulator_disable ( adsp - > px_supply ) ;
regulator_disable ( adsp - > cx_supply ) ;
clk_disable_unprepare ( adsp - > aggre2_clk ) ;
clk_disable_unprepare ( adsp - > xo ) ;
2019-11-18 21:43:41 +00:00
adsp_pds_disable ( adsp , adsp - > proxy_pds , adsp - > proxy_pd_count ) ;
2018-06-04 13:30:37 -07:00
}
2016-08-22 22:57:44 -07:00
static int adsp_stop ( struct rproc * rproc )
{
struct qcom_adsp * adsp = ( struct qcom_adsp * ) rproc - > priv ;
2018-06-04 13:30:37 -07:00
int handover ;
2016-08-22 22:57:44 -07:00
int ret ;
2020-11-21 21:41:34 -08:00
ret = qcom_q6v5_request_stop ( & adsp - > q6v5 , adsp - > sysmon ) ;
2018-06-04 13:30:37 -07:00
if ( ret = = - ETIMEDOUT )
2016-08-22 22:57:44 -07:00
dev_err ( adsp - > dev , " timed out on wait \n " ) ;
2017-01-30 20:33:06 +05:30
ret = qcom_scm_pas_shutdown ( adsp - > pas_id ) ;
2016-08-22 22:57:44 -07:00
if ( ret )
dev_err ( adsp - > dev , " failed to shutdown: %d \n " , ret ) ;
2018-06-04 13:30:37 -07:00
handover = qcom_q6v5_unprepare ( & adsp - > q6v5 ) ;
if ( handover )
qcom_pas_handover ( & adsp - > q6v5 ) ;
2016-08-22 22:57:44 -07:00
return ret ;
}
2021-03-06 19:24:19 +08:00
static void * adsp_da_to_va ( struct rproc * rproc , u64 da , size_t len , bool * is_iomem )
2016-08-22 22:57:44 -07:00
{
struct qcom_adsp * adsp = ( struct qcom_adsp * ) rproc - > priv ;
int offset ;
offset = da - adsp - > mem_reloc ;
if ( offset < 0 | | offset + len > adsp - > mem_size )
return NULL ;
return adsp - > mem_region + offset ;
}
2020-03-23 22:29:04 -07:00
static unsigned long adsp_panic ( struct rproc * rproc )
{
struct qcom_adsp * adsp = ( struct qcom_adsp * ) rproc - > priv ;
return qcom_q6v5_panic ( & adsp - > q6v5 ) ;
}
2016-08-22 22:57:44 -07:00
static const struct rproc_ops adsp_ops = {
2022-01-27 18:55:09 -08:00
. unprepare = adsp_unprepare ,
2016-08-22 22:57:44 -07:00
. start = adsp_start ,
. stop = adsp_stop ,
. da_to_va = adsp_da_to_va ,
2018-01-05 16:04:20 -08:00
. parse_fw = qcom_register_dump_segments ,
2018-01-05 15:58:01 -08:00
. load = adsp_load ,
2020-03-23 22:29:04 -07:00
. panic = adsp_panic ,
2016-08-22 22:57:44 -07:00
} ;
2020-11-19 13:05:34 -08:00
static const struct rproc_ops adsp_minidump_ops = {
2022-01-27 18:55:09 -08:00
. unprepare = adsp_unprepare ,
2020-11-19 13:05:34 -08:00
. start = adsp_start ,
. stop = adsp_stop ,
. da_to_va = adsp_da_to_va ,
. load = adsp_load ,
. panic = adsp_panic ,
. coredump = adsp_minidump ,
} ;
2016-10-25 13:57:26 -07:00
static int adsp_init_clock ( struct qcom_adsp * adsp )
{
int ret ;
adsp - > xo = devm_clk_get ( adsp - > dev , " xo " ) ;
if ( IS_ERR ( adsp - > xo ) ) {
ret = PTR_ERR ( adsp - > xo ) ;
if ( ret ! = - EPROBE_DEFER )
dev_err ( adsp - > dev , " failed to get xo clock " ) ;
return ret ;
}
2017-01-30 20:33:07 +05:30
if ( adsp - > has_aggre2_clk ) {
adsp - > aggre2_clk = devm_clk_get ( adsp - > dev , " aggre2 " ) ;
if ( IS_ERR ( adsp - > aggre2_clk ) ) {
ret = PTR_ERR ( adsp - > aggre2_clk ) ;
if ( ret ! = - EPROBE_DEFER )
dev_err ( adsp - > dev ,
" failed to get aggre2 clock " ) ;
return ret ;
}
}
2016-10-25 13:57:26 -07:00
return 0 ;
}
2016-08-22 22:57:44 -07:00
static int adsp_init_regulator ( struct qcom_adsp * adsp )
{
adsp - > cx_supply = devm_regulator_get ( adsp - > dev , " cx " ) ;
if ( IS_ERR ( adsp - > cx_supply ) )
return PTR_ERR ( adsp - > cx_supply ) ;
regulator_set_load ( adsp - > cx_supply , 100000 ) ;
2017-01-30 20:33:07 +05:30
adsp - > px_supply = devm_regulator_get ( adsp - > dev , " px " ) ;
2017-08-29 19:13:18 +05:30
return PTR_ERR_OR_ZERO ( adsp - > px_supply ) ;
2016-08-22 22:57:44 -07:00
}
2019-11-18 21:43:41 +00:00
static int adsp_pds_attach ( struct device * dev , struct device * * devs ,
char * * pd_names )
{
size_t num_pds = 0 ;
int ret ;
int i ;
if ( ! pd_names )
return 0 ;
/* Handle single power domain */
if ( dev - > pm_domain ) {
devs [ 0 ] = dev ;
pm_runtime_enable ( dev ) ;
return 1 ;
}
while ( pd_names [ num_pds ] )
num_pds + + ;
for ( i = 0 ; i < num_pds ; i + + ) {
devs [ i ] = dev_pm_domain_attach_by_name ( dev , pd_names [ i ] ) ;
if ( IS_ERR_OR_NULL ( devs [ i ] ) ) {
ret = PTR_ERR ( devs [ i ] ) ? : - ENODATA ;
goto unroll_attach ;
}
}
return num_pds ;
unroll_attach :
for ( i - - ; i > = 0 ; i - - )
dev_pm_domain_detach ( devs [ i ] , false ) ;
return ret ;
} ;
static void adsp_pds_detach ( struct qcom_adsp * adsp , struct device * * pds ,
size_t pd_count )
{
struct device * dev = adsp - > dev ;
int i ;
/* Handle single power domain */
if ( dev - > pm_domain & & pd_count ) {
pm_runtime_disable ( dev ) ;
return ;
}
for ( i = 0 ; i < pd_count ; i + + )
dev_pm_domain_detach ( pds [ i ] , false ) ;
}
2016-08-22 22:57:44 -07:00
static int adsp_alloc_memory_region ( struct qcom_adsp * adsp )
{
struct device_node * node ;
struct resource r ;
int ret ;
node = of_parse_phandle ( adsp - > dev - > of_node , " memory-region " , 0 ) ;
if ( ! node ) {
dev_err ( adsp - > dev , " no memory-region specified \n " ) ;
return - EINVAL ;
}
ret = of_address_to_resource ( node , 0 , & r ) ;
if ( ret )
return ret ;
adsp - > mem_phys = adsp - > mem_reloc = r . start ;
adsp - > mem_size = resource_size ( & r ) ;
adsp - > mem_region = devm_ioremap_wc ( adsp - > dev , adsp - > mem_phys , adsp - > mem_size ) ;
if ( ! adsp - > mem_region ) {
dev_err ( adsp - > dev , " unable to map memory region: %pa+%zx \n " ,
& r . start , adsp - > mem_size ) ;
return - EBUSY ;
}
return 0 ;
}
static int adsp_probe ( struct platform_device * pdev )
{
2017-01-30 20:33:06 +05:30
const struct adsp_data * desc ;
2016-08-22 22:57:44 -07:00
struct qcom_adsp * adsp ;
struct rproc * rproc ;
2019-01-15 01:20:01 +05:30
const char * fw_name ;
2020-11-19 13:05:34 -08:00
const struct rproc_ops * ops = & adsp_ops ;
2016-08-22 22:57:44 -07:00
int ret ;
2017-01-30 20:33:06 +05:30
desc = of_device_get_match_data ( & pdev - > dev ) ;
if ( ! desc )
return - EINVAL ;
2016-08-22 22:57:44 -07:00
if ( ! qcom_scm_is_available ( ) )
return - EPROBE_DEFER ;
2019-01-15 01:20:01 +05:30
fw_name = desc - > firmware_name ;
ret = of_property_read_string ( pdev - > dev . of_node , " firmware-name " ,
& fw_name ) ;
if ( ret < 0 & & ret ! = - EINVAL )
return ret ;
2020-11-19 13:05:34 -08:00
if ( desc - > minidump_id )
ops = & adsp_minidump_ops ;
rproc = rproc_alloc ( & pdev - > dev , pdev - > name , ops , fw_name , sizeof ( * adsp ) ) ;
2016-08-22 22:57:44 -07:00
if ( ! rproc ) {
dev_err ( & pdev - > dev , " unable to allocate remoteproc \n " ) ;
return - ENOMEM ;
}
2019-11-18 21:44:07 +00:00
rproc - > auto_boot = desc - > auto_boot ;
2020-04-10 12:24:33 +02:00
rproc_coredump_set_elf_info ( rproc , ELFCLASS32 , EM_NONE ) ;
2019-11-18 21:44:07 +00:00
2016-08-22 22:57:44 -07:00
adsp = ( struct qcom_adsp * ) rproc - > priv ;
adsp - > dev = & pdev - > dev ;
adsp - > rproc = rproc ;
2020-11-19 13:05:34 -08:00
adsp - > minidump_id = desc - > minidump_id ;
2017-01-30 20:33:06 +05:30
adsp - > pas_id = desc - > pas_id ;
2017-01-30 20:33:07 +05:30
adsp - > has_aggre2_clk = desc - > has_aggre2_clk ;
2020-06-22 12:19:40 -07:00
adsp - > info_name = desc - > sysmon_name ;
2016-08-22 22:57:44 -07:00
platform_set_drvdata ( pdev , adsp ) ;
2020-04-29 11:04:42 -07:00
device_wakeup_enable ( adsp - > dev ) ;
2016-08-22 22:57:44 -07:00
ret = adsp_alloc_memory_region ( adsp ) ;
if ( ret )
goto free_rproc ;
2016-10-25 13:57:26 -07:00
ret = adsp_init_clock ( adsp ) ;
if ( ret )
goto free_rproc ;
2016-08-22 22:57:44 -07:00
ret = adsp_init_regulator ( adsp ) ;
if ( ret )
goto free_rproc ;
2019-11-18 21:43:41 +00:00
ret = adsp_pds_attach ( & pdev - > dev , adsp - > proxy_pds ,
desc - > proxy_pd_names ) ;
if ( ret < 0 )
2021-09-16 19:29:21 +05:30
goto free_rproc ;
2019-11-18 21:43:41 +00:00
adsp - > proxy_pd_count = ret ;
2021-09-16 19:29:21 +05:30
ret = qcom_q6v5_init ( & adsp - > q6v5 , pdev , rproc , desc - > crash_reason_smem , desc - > load_state ,
2018-06-04 13:30:37 -07:00
qcom_pas_handover ) ;
if ( ret )
2019-11-18 21:43:41 +00:00
goto detach_proxy_pds ;
2016-08-22 22:57:44 -07:00
2020-04-22 17:37:33 -07:00
qcom_add_glink_subdev ( rproc , & adsp - > glink_subdev , desc - > ssr_name ) ;
2017-01-29 14:05:50 -08:00
qcom_add_smd_subdev ( rproc , & adsp - > smd_subdev ) ;
2017-07-24 22:56:43 -07:00
qcom_add_ssr_subdev ( rproc , & adsp - > ssr_subdev , desc - > ssr_name ) ;
2017-08-27 21:51:38 -07:00
adsp - > sysmon = qcom_add_sysmon_subdev ( rproc ,
desc - > sysmon_name ,
desc - > ssctl_id ) ;
2019-01-08 15:53:43 +05:30
if ( IS_ERR ( adsp - > sysmon ) ) {
ret = PTR_ERR ( adsp - > sysmon ) ;
2019-11-18 21:43:41 +00:00
goto detach_proxy_pds ;
2019-01-08 15:53:43 +05:30
}
2017-01-29 14:05:50 -08:00
2016-08-22 22:57:44 -07:00
ret = rproc_add ( rproc ) ;
if ( ret )
2019-11-18 21:43:41 +00:00
goto detach_proxy_pds ;
2016-08-22 22:57:44 -07:00
return 0 ;
2019-11-18 21:43:41 +00:00
detach_proxy_pds :
adsp_pds_detach ( adsp , adsp - > proxy_pds , adsp - > proxy_pd_count ) ;
2016-08-22 22:57:44 -07:00
free_rproc :
2016-11-19 22:42:55 -08:00
rproc_free ( rproc ) ;
2016-08-22 22:57:44 -07:00
return ret ;
}
static int adsp_remove ( struct platform_device * pdev )
{
struct qcom_adsp * adsp = platform_get_drvdata ( pdev ) ;
rproc_del ( adsp - > rproc ) ;
2017-01-29 14:05:50 -08:00
2021-09-16 19:29:21 +05:30
qcom_q6v5_deinit ( & adsp - > q6v5 ) ;
2017-08-29 16:13:35 -07:00
qcom_remove_glink_subdev ( adsp - > rproc , & adsp - > glink_subdev ) ;
2017-08-27 21:51:38 -07:00
qcom_remove_sysmon_subdev ( adsp - > sysmon ) ;
2017-01-29 14:05:50 -08:00
qcom_remove_smd_subdev ( adsp - > rproc , & adsp - > smd_subdev ) ;
2017-07-24 22:56:43 -07:00
qcom_remove_ssr_subdev ( adsp - > rproc , & adsp - > ssr_subdev ) ;
2016-11-19 22:42:55 -08:00
rproc_free ( adsp - > rproc ) ;
2016-08-22 22:57:44 -07:00
return 0 ;
}
2017-01-30 20:33:06 +05:30
static const struct adsp_data adsp_resource_init = {
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
2017-01-30 20:33:07 +05:30
. has_aggre2_clk = false ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2017-07-24 22:56:43 -07:00
. ssr_name = " lpass " ,
2017-08-27 21:51:38 -07:00
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
2017-01-30 20:33:06 +05:30
} ;
2021-09-16 19:29:21 +05:30
static const struct adsp_data sdm845_adsp_resource_init = {
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. load_state = " adsp " ,
. ssr_name = " lpass " ,
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
} ;
2021-12-13 09:22:04 +01:00
static const struct adsp_data sm6350_adsp_resource = {
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" lcx " ,
" lmx " ,
NULL
} ,
. load_state = " adsp " ,
. ssr_name = " lpass " ,
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
} ;
2019-11-18 21:43:58 +00:00
static const struct adsp_data sm8150_adsp_resource = {
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
. has_aggre2_clk = false ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2019-11-18 21:43:58 +00:00
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " adsp " ,
2019-11-18 21:43:58 +00:00
. ssr_name = " lpass " ,
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
} ;
2020-04-30 11:00:51 -07:00
static const struct adsp_data sm8250_adsp_resource = {
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" lcx " ,
" lmx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " adsp " ,
2020-04-30 11:00:51 -07:00
. ssr_name = " lpass " ,
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
} ;
2021-02-10 16:15:39 +05:30
static const struct adsp_data sm8350_adsp_resource = {
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" lcx " ,
" lmx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " adsp " ,
2021-02-10 16:15:39 +05:30
. ssr_name = " lpass " ,
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
} ;
2021-09-26 19:06:22 +00:00
static const struct adsp_data msm8996_adsp_resource = {
2019-12-18 18:52:15 +05:30
. crash_reason_smem = 423 ,
. firmware_name = " adsp.mdt " ,
. pas_id = 1 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
NULL
} ,
. ssr_name = " lpass " ,
. sysmon_name = " adsp " ,
. ssctl_id = 0x14 ,
} ;
2018-08-28 00:14:58 -07:00
static const struct adsp_data cdsp_resource_init = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2018-08-28 00:14:58 -07:00
. ssr_name = " cdsp " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
2021-09-16 19:29:21 +05:30
static const struct adsp_data sdm845_cdsp_resource_init = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. load_state = " cdsp " ,
. ssr_name = " cdsp " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
2021-12-13 09:22:06 +01:00
static const struct adsp_data sm6350_cdsp_resource = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
" mx " ,
NULL
} ,
. load_state = " cdsp " ,
. ssr_name = " cdsp " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
2019-11-18 21:43:58 +00:00
static const struct adsp_data sm8150_cdsp_resource = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2019-11-18 21:43:58 +00:00
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " cdsp " ,
2019-11-18 21:43:58 +00:00
. ssr_name = " cdsp " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
2020-04-30 11:00:51 -07:00
static const struct adsp_data sm8250_cdsp_resource = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " cdsp " ,
2020-04-30 11:00:51 -07:00
. ssr_name = " cdsp " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
2022-04-08 15:05:39 -07:00
static const struct adsp_data sc8280xp_nsp0_resource = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" nsp " ,
NULL
} ,
. ssr_name = " cdsp0 " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
static const struct adsp_data sc8280xp_nsp1_resource = {
. crash_reason_smem = 633 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 30 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" nsp " ,
NULL
} ,
. ssr_name = " cdsp1 " ,
. sysmon_name = " cdsp1 " ,
. ssctl_id = 0x20 ,
} ;
2021-02-10 16:15:39 +05:30
static const struct adsp_data sm8350_cdsp_resource = {
. crash_reason_smem = 601 ,
. firmware_name = " cdsp.mdt " ,
. pas_id = 18 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
2021-06-25 00:03:25 +05:30
" mxc " ,
2021-02-10 16:15:39 +05:30
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " cdsp " ,
2021-02-10 16:15:39 +05:30
. ssr_name = " cdsp " ,
. sysmon_name = " cdsp " ,
. ssctl_id = 0x17 ,
} ;
2019-11-18 21:43:58 +00:00
static const struct adsp_data mpss_resource_init = {
. crash_reason_smem = 421 ,
. firmware_name = " modem.mdt " ,
. pas_id = 4 ,
2020-11-19 13:05:35 -08:00
. minidump_id = 3 ,
2019-11-18 21:43:58 +00:00
. has_aggre2_clk = false ,
2019-11-18 21:44:07 +00:00
. auto_boot = false ,
2019-11-18 21:43:58 +00:00
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
" mss " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " modem " ,
2019-11-18 21:43:58 +00:00
. ssr_name = " mpss " ,
. sysmon_name = " modem " ,
. ssctl_id = 0x12 ,
} ;
2021-06-08 10:49:44 -07:00
static const struct adsp_data sc8180x_mpss_resource = {
. crash_reason_smem = 421 ,
. firmware_name = " modem.mdt " ,
. pas_id = 4 ,
. has_aggre2_clk = false ,
. auto_boot = false ,
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " modem " ,
2021-06-08 10:49:44 -07:00
. ssr_name = " mpss " ,
. sysmon_name = " modem " ,
. ssctl_id = 0x12 ,
} ;
2017-01-30 20:33:08 +05:30
static const struct adsp_data slpi_resource_init = {
. crash_reason_smem = 424 ,
. firmware_name = " slpi.mdt " ,
. pas_id = 12 ,
. has_aggre2_clk = true ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2021-09-26 19:06:22 +00:00
. proxy_pd_names = ( char * [ ] ) {
" ssc_cx " ,
NULL
} ,
2017-07-24 22:56:43 -07:00
. ssr_name = " dsps " ,
2017-08-27 21:51:38 -07:00
. sysmon_name = " slpi " ,
. ssctl_id = 0x16 ,
2017-01-30 20:33:08 +05:30
} ;
2019-11-18 21:43:58 +00:00
static const struct adsp_data sm8150_slpi_resource = {
. crash_reason_smem = 424 ,
. firmware_name = " slpi.mdt " ,
. pas_id = 12 ,
. has_aggre2_clk = false ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2019-11-18 21:43:58 +00:00
. proxy_pd_names = ( char * [ ] ) {
" lcx " ,
" lmx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " slpi " ,
2019-11-18 21:43:58 +00:00
. ssr_name = " dsps " ,
. sysmon_name = " slpi " ,
. ssctl_id = 0x16 ,
} ;
2020-04-30 11:00:51 -07:00
static const struct adsp_data sm8250_slpi_resource = {
. crash_reason_smem = 424 ,
. firmware_name = " slpi.mdt " ,
. pas_id = 12 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" lcx " ,
" lmx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " slpi " ,
2020-04-30 11:00:51 -07:00
. ssr_name = " dsps " ,
. sysmon_name = " slpi " ,
. ssctl_id = 0x16 ,
} ;
2021-02-10 16:15:39 +05:30
static const struct adsp_data sm8350_slpi_resource = {
. crash_reason_smem = 424 ,
. firmware_name = " slpi.mdt " ,
. pas_id = 12 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" lcx " ,
" lmx " ,
NULL
} ,
2021-09-16 19:29:21 +05:30
. load_state = " slpi " ,
2021-02-10 16:15:39 +05:30
. ssr_name = " dsps " ,
. sysmon_name = " slpi " ,
. ssctl_id = 0x16 ,
} ;
2018-09-27 12:03:46 -07:00
static const struct adsp_data wcss_resource_init = {
. crash_reason_smem = 421 ,
. firmware_name = " wcnss.mdt " ,
. pas_id = 6 ,
2019-11-18 21:44:07 +00:00
. auto_boot = true ,
2018-09-27 12:03:46 -07:00
. ssr_name = " mpss " ,
. sysmon_name = " wcnss " ,
. ssctl_id = 0x12 ,
} ;
2021-04-08 22:42:11 +05:30
static const struct adsp_data sdx55_mpss_resource = {
. crash_reason_smem = 421 ,
. firmware_name = " modem.mdt " ,
. pas_id = 4 ,
. has_aggre2_clk = false ,
. auto_boot = true ,
. proxy_pd_names = ( char * [ ] ) {
" cx " ,
" mss " ,
NULL
} ,
. ssr_name = " mpss " ,
. sysmon_name = " modem " ,
. ssctl_id = 0x22 ,
} ;
2016-08-22 22:57:44 -07:00
static const struct of_device_id adsp_of_match [ ] = {
2022-04-23 17:50:56 +02:00
{ . compatible = " qcom,msm8226-adsp-pil " , . data = & adsp_resource_init } ,
2017-01-30 20:33:06 +05:30
{ . compatible = " qcom,msm8974-adsp-pil " , . data = & adsp_resource_init } ,
2021-09-26 19:06:22 +00:00
{ . compatible = " qcom,msm8996-adsp-pil " , . data = & msm8996_adsp_resource } ,
2017-01-30 20:33:08 +05:30
{ . compatible = " qcom,msm8996-slpi-pil " , . data = & slpi_resource_init } ,
2021-09-26 19:06:22 +00:00
{ . compatible = " qcom,msm8998-adsp-pas " , . data = & msm8996_adsp_resource } ,
{ . compatible = " qcom,msm8998-slpi-pas " , . data = & slpi_resource_init } ,
2018-09-27 12:03:46 -07:00
{ . compatible = " qcom,qcs404-adsp-pas " , . data = & adsp_resource_init } ,
{ . compatible = " qcom,qcs404-cdsp-pas " , . data = & cdsp_resource_init } ,
{ . compatible = " qcom,qcs404-wcss-pas " , . data = & wcss_resource_init } ,
2020-04-21 20:02:23 +05:30
{ . compatible = " qcom,sc7180-mpss-pas " , . data = & mpss_resource_init } ,
2021-09-17 19:25:27 +05:30
{ . compatible = " qcom,sc7280-mpss-pas " , . data = & mpss_resource_init } ,
2021-06-08 10:49:44 -07:00
{ . compatible = " qcom,sc8180x-adsp-pas " , . data = & sm8150_adsp_resource } ,
{ . compatible = " qcom,sc8180x-cdsp-pas " , . data = & sm8150_cdsp_resource } ,
{ . compatible = " qcom,sc8180x-mpss-pas " , . data = & sc8180x_mpss_resource } ,
2022-04-08 15:05:39 -07:00
{ . compatible = " qcom,sc8280xp-adsp-pas " , . data = & sm8250_adsp_resource } ,
{ . compatible = " qcom,sc8280xp-nsp0-pas " , . data = & sc8280xp_nsp0_resource } ,
{ . compatible = " qcom,sc8280xp-nsp1-pas " , . data = & sc8280xp_nsp1_resource } ,
2021-07-28 23:52:12 +02:00
{ . compatible = " qcom,sdm660-adsp-pas " , . data = & adsp_resource_init } ,
2021-09-16 19:29:21 +05:30
{ . compatible = " qcom,sdm845-adsp-pas " , . data = & sdm845_adsp_resource_init } ,
{ . compatible = " qcom,sdm845-cdsp-pas " , . data = & sdm845_cdsp_resource_init } ,
2021-04-08 22:42:11 +05:30
{ . compatible = " qcom,sdx55-mpss-pas " , . data = & sdx55_mpss_resource } ,
2021-12-13 09:22:04 +01:00
{ . compatible = " qcom,sm6350-adsp-pas " , . data = & sm6350_adsp_resource } ,
2021-12-13 09:22:06 +01:00
{ . compatible = " qcom,sm6350-cdsp-pas " , . data = & sm6350_cdsp_resource } ,
2021-12-13 09:22:02 +01:00
{ . compatible = " qcom,sm6350-mpss-pas " , . data = & mpss_resource_init } ,
2019-11-18 21:43:58 +00:00
{ . compatible = " qcom,sm8150-adsp-pas " , . data = & sm8150_adsp_resource } ,
{ . compatible = " qcom,sm8150-cdsp-pas " , . data = & sm8150_cdsp_resource } ,
{ . compatible = " qcom,sm8150-mpss-pas " , . data = & mpss_resource_init } ,
{ . compatible = " qcom,sm8150-slpi-pas " , . data = & sm8150_slpi_resource } ,
2020-04-30 11:00:51 -07:00
{ . compatible = " qcom,sm8250-adsp-pas " , . data = & sm8250_adsp_resource } ,
{ . compatible = " qcom,sm8250-cdsp-pas " , . data = & sm8250_cdsp_resource } ,
{ . compatible = " qcom,sm8250-slpi-pas " , . data = & sm8250_slpi_resource } ,
2021-02-10 16:15:39 +05:30
{ . compatible = " qcom,sm8350-adsp-pas " , . data = & sm8350_adsp_resource } ,
{ . compatible = " qcom,sm8350-cdsp-pas " , . data = & sm8350_cdsp_resource } ,
{ . compatible = " qcom,sm8350-slpi-pas " , . data = & sm8350_slpi_resource } ,
{ . compatible = " qcom,sm8350-mpss-pas " , . data = & mpss_resource_init } ,
2022-01-27 18:55:11 -08:00
{ . compatible = " qcom,sm8450-adsp-pas " , . data = & sm8350_adsp_resource } ,
{ . compatible = " qcom,sm8450-cdsp-pas " , . data = & sm8350_cdsp_resource } ,
{ . compatible = " qcom,sm8450-slpi-pas " , . data = & sm8350_slpi_resource } ,
{ . compatible = " qcom,sm8450-mpss-pas " , . data = & mpss_resource_init } ,
2016-08-22 22:57:44 -07:00
{ } ,
} ;
2016-11-19 22:41:56 -08:00
MODULE_DEVICE_TABLE ( of , adsp_of_match ) ;
2016-08-22 22:57:44 -07:00
static struct platform_driver adsp_driver = {
. probe = adsp_probe ,
. remove = adsp_remove ,
. driver = {
2018-09-24 16:45:25 -07:00
. name = " qcom_q6v5_pas " ,
2016-08-22 22:57:44 -07:00
. of_match_table = adsp_of_match ,
} ,
} ;
module_platform_driver ( adsp_driver ) ;
2018-09-24 16:45:25 -07:00
MODULE_DESCRIPTION ( " Qualcomm Hexagon v5 Peripheral Authentication Service driver " ) ;
2016-08-22 22:57:44 -07:00
MODULE_LICENSE ( " GPL v2 " ) ;