2012-08-09 18:23:32 +02:00
/*
* imx35 pinctrl driver .
*
* This driver was mostly copied from the imx51 pinctrl driver which has :
*
* Copyright ( C ) 2012 Freescale Semiconductor , Inc .
* Copyright ( C ) 2012 Linaro , Inc .
*
* Author : Dong Aisheng < dong . aisheng @ linaro . org >
*
* This program is free software ; you can redistribute it and / or modify
* it under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation .
*/
# include <linux/err.h>
# include <linux/init.h>
# include <linux/io.h>
# include <linux/module.h>
# include <linux/of.h>
# include <linux/of_device.h>
# include <linux/pinctrl/pinctrl.h>
# include "pinctrl-imx.h"
enum imx35_pads {
MX35_PAD_CAPTURE = 0 ,
MX35_PAD_COMPARE = 1 ,
MX35_PAD_WDOG_RST = 2 ,
MX35_PAD_GPIO1_0 = 3 ,
MX35_PAD_GPIO1_1 = 4 ,
MX35_PAD_GPIO2_0 = 5 ,
MX35_PAD_GPIO3_0 = 6 ,
MX35_PAD_RESET_IN_B = 7 ,
MX35_PAD_POR_B = 8 ,
MX35_PAD_CLKO = 9 ,
MX35_PAD_BOOT_MODE0 = 10 ,
MX35_PAD_BOOT_MODE1 = 11 ,
MX35_PAD_CLK_MODE0 = 12 ,
MX35_PAD_CLK_MODE1 = 13 ,
MX35_PAD_POWER_FAIL = 14 ,
MX35_PAD_VSTBY = 15 ,
MX35_PAD_A0 = 16 ,
MX35_PAD_A1 = 17 ,
MX35_PAD_A2 = 18 ,
MX35_PAD_A3 = 19 ,
MX35_PAD_A4 = 20 ,
MX35_PAD_A5 = 21 ,
MX35_PAD_A6 = 22 ,
MX35_PAD_A7 = 23 ,
MX35_PAD_A8 = 24 ,
MX35_PAD_A9 = 25 ,
MX35_PAD_A10 = 26 ,
MX35_PAD_MA10 = 27 ,
MX35_PAD_A11 = 28 ,
MX35_PAD_A12 = 29 ,
MX35_PAD_A13 = 30 ,
MX35_PAD_A14 = 31 ,
MX35_PAD_A15 = 32 ,
MX35_PAD_A16 = 33 ,
MX35_PAD_A17 = 34 ,
MX35_PAD_A18 = 35 ,
MX35_PAD_A19 = 36 ,
MX35_PAD_A20 = 37 ,
MX35_PAD_A21 = 38 ,
MX35_PAD_A22 = 39 ,
MX35_PAD_A23 = 40 ,
MX35_PAD_A24 = 41 ,
MX35_PAD_A25 = 42 ,
MX35_PAD_SDBA1 = 43 ,
MX35_PAD_SDBA0 = 44 ,
MX35_PAD_SD0 = 45 ,
MX35_PAD_SD1 = 46 ,
MX35_PAD_SD2 = 47 ,
MX35_PAD_SD3 = 48 ,
MX35_PAD_SD4 = 49 ,
MX35_PAD_SD5 = 50 ,
MX35_PAD_SD6 = 51 ,
MX35_PAD_SD7 = 52 ,
MX35_PAD_SD8 = 53 ,
MX35_PAD_SD9 = 54 ,
MX35_PAD_SD10 = 55 ,
MX35_PAD_SD11 = 56 ,
MX35_PAD_SD12 = 57 ,
MX35_PAD_SD13 = 58 ,
MX35_PAD_SD14 = 59 ,
MX35_PAD_SD15 = 60 ,
MX35_PAD_SD16 = 61 ,
MX35_PAD_SD17 = 62 ,
MX35_PAD_SD18 = 63 ,
MX35_PAD_SD19 = 64 ,
MX35_PAD_SD20 = 65 ,
MX35_PAD_SD21 = 66 ,
MX35_PAD_SD22 = 67 ,
MX35_PAD_SD23 = 68 ,
MX35_PAD_SD24 = 69 ,
MX35_PAD_SD25 = 70 ,
MX35_PAD_SD26 = 71 ,
MX35_PAD_SD27 = 72 ,
MX35_PAD_SD28 = 73 ,
MX35_PAD_SD29 = 74 ,
MX35_PAD_SD30 = 75 ,
MX35_PAD_SD31 = 76 ,
MX35_PAD_DQM0 = 77 ,
MX35_PAD_DQM1 = 78 ,
MX35_PAD_DQM2 = 79 ,
MX35_PAD_DQM3 = 80 ,
MX35_PAD_EB0 = 81 ,
MX35_PAD_EB1 = 82 ,
MX35_PAD_OE = 83 ,
MX35_PAD_CS0 = 84 ,
MX35_PAD_CS1 = 85 ,
MX35_PAD_CS2 = 86 ,
MX35_PAD_CS3 = 87 ,
MX35_PAD_CS4 = 88 ,
MX35_PAD_CS5 = 89 ,
MX35_PAD_NF_CE0 = 90 ,
MX35_PAD_ECB = 91 ,
MX35_PAD_LBA = 92 ,
MX35_PAD_BCLK = 93 ,
MX35_PAD_RW = 94 ,
MX35_PAD_RAS = 95 ,
MX35_PAD_CAS = 96 ,
MX35_PAD_SDWE = 97 ,
MX35_PAD_SDCKE0 = 98 ,
MX35_PAD_SDCKE1 = 99 ,
MX35_PAD_SDCLK = 100 ,
MX35_PAD_SDQS0 = 101 ,
MX35_PAD_SDQS1 = 102 ,
MX35_PAD_SDQS2 = 103 ,
MX35_PAD_SDQS3 = 104 ,
MX35_PAD_NFWE_B = 105 ,
MX35_PAD_NFRE_B = 106 ,
MX35_PAD_NFALE = 107 ,
MX35_PAD_NFCLE = 108 ,
MX35_PAD_NFWP_B = 109 ,
MX35_PAD_NFRB = 110 ,
MX35_PAD_D15 = 111 ,
MX35_PAD_D14 = 112 ,
MX35_PAD_D13 = 113 ,
MX35_PAD_D12 = 114 ,
MX35_PAD_D11 = 115 ,
MX35_PAD_D10 = 116 ,
MX35_PAD_D9 = 117 ,
MX35_PAD_D8 = 118 ,
MX35_PAD_D7 = 119 ,
MX35_PAD_D6 = 120 ,
MX35_PAD_D5 = 121 ,
MX35_PAD_D4 = 122 ,
MX35_PAD_D3 = 123 ,
MX35_PAD_D2 = 124 ,
MX35_PAD_D1 = 125 ,
MX35_PAD_D0 = 126 ,
MX35_PAD_CSI_D8 = 127 ,
MX35_PAD_CSI_D9 = 128 ,
MX35_PAD_CSI_D10 = 129 ,
MX35_PAD_CSI_D11 = 130 ,
MX35_PAD_CSI_D12 = 131 ,
MX35_PAD_CSI_D13 = 132 ,
MX35_PAD_CSI_D14 = 133 ,
MX35_PAD_CSI_D15 = 134 ,
MX35_PAD_CSI_MCLK = 135 ,
MX35_PAD_CSI_VSYNC = 136 ,
MX35_PAD_CSI_HSYNC = 137 ,
MX35_PAD_CSI_PIXCLK = 138 ,
MX35_PAD_I2C1_CLK = 139 ,
MX35_PAD_I2C1_DAT = 140 ,
MX35_PAD_I2C2_CLK = 141 ,
MX35_PAD_I2C2_DAT = 142 ,
MX35_PAD_STXD4 = 143 ,
MX35_PAD_SRXD4 = 144 ,
MX35_PAD_SCK4 = 145 ,
MX35_PAD_STXFS4 = 146 ,
MX35_PAD_STXD5 = 147 ,
MX35_PAD_SRXD5 = 148 ,
MX35_PAD_SCK5 = 149 ,
MX35_PAD_STXFS5 = 150 ,
MX35_PAD_SCKR = 151 ,
MX35_PAD_FSR = 152 ,
MX35_PAD_HCKR = 153 ,
MX35_PAD_SCKT = 154 ,
MX35_PAD_FST = 155 ,
MX35_PAD_HCKT = 156 ,
MX35_PAD_TX5_RX0 = 157 ,
MX35_PAD_TX4_RX1 = 158 ,
MX35_PAD_TX3_RX2 = 159 ,
MX35_PAD_TX2_RX3 = 160 ,
MX35_PAD_TX1 = 161 ,
MX35_PAD_TX0 = 162 ,
MX35_PAD_CSPI1_MOSI = 163 ,
MX35_PAD_CSPI1_MISO = 164 ,
MX35_PAD_CSPI1_SS0 = 165 ,
MX35_PAD_CSPI1_SS1 = 166 ,
MX35_PAD_CSPI1_SCLK = 167 ,
MX35_PAD_CSPI1_SPI_RDY = 168 ,
MX35_PAD_RXD1 = 169 ,
MX35_PAD_TXD1 = 170 ,
MX35_PAD_RTS1 = 171 ,
MX35_PAD_CTS1 = 172 ,
MX35_PAD_RXD2 = 173 ,
MX35_PAD_TXD2 = 174 ,
MX35_PAD_RTS2 = 175 ,
MX35_PAD_CTS2 = 176 ,
MX35_PAD_RTCK = 177 ,
MX35_PAD_TCK = 178 ,
MX35_PAD_TMS = 179 ,
MX35_PAD_TDI = 180 ,
MX35_PAD_TDO = 181 ,
MX35_PAD_TRSTB = 182 ,
MX35_PAD_DE_B = 183 ,
MX35_PAD_SJC_MOD = 184 ,
MX35_PAD_USBOTG_PWR = 185 ,
MX35_PAD_USBOTG_OC = 186 ,
MX35_PAD_LD0 = 187 ,
MX35_PAD_LD1 = 188 ,
MX35_PAD_LD2 = 189 ,
MX35_PAD_LD3 = 190 ,
MX35_PAD_LD4 = 191 ,
MX35_PAD_LD5 = 192 ,
MX35_PAD_LD6 = 193 ,
MX35_PAD_LD7 = 194 ,
MX35_PAD_LD8 = 195 ,
MX35_PAD_LD9 = 196 ,
MX35_PAD_LD10 = 197 ,
MX35_PAD_LD11 = 198 ,
MX35_PAD_LD12 = 199 ,
MX35_PAD_LD13 = 200 ,
MX35_PAD_LD14 = 201 ,
MX35_PAD_LD15 = 202 ,
MX35_PAD_LD16 = 203 ,
MX35_PAD_LD17 = 204 ,
MX35_PAD_LD18 = 205 ,
MX35_PAD_LD19 = 206 ,
MX35_PAD_LD20 = 207 ,
MX35_PAD_LD21 = 208 ,
MX35_PAD_LD22 = 209 ,
MX35_PAD_LD23 = 210 ,
MX35_PAD_D3_HSYNC = 211 ,
MX35_PAD_D3_FPSHIFT = 212 ,
MX35_PAD_D3_DRDY = 213 ,
MX35_PAD_CONTRAST = 214 ,
MX35_PAD_D3_VSYNC = 215 ,
MX35_PAD_D3_REV = 216 ,
MX35_PAD_D3_CLS = 217 ,
MX35_PAD_D3_SPL = 218 ,
MX35_PAD_SD1_CMD = 219 ,
MX35_PAD_SD1_CLK = 220 ,
MX35_PAD_SD1_DATA0 = 221 ,
MX35_PAD_SD1_DATA1 = 222 ,
MX35_PAD_SD1_DATA2 = 223 ,
MX35_PAD_SD1_DATA3 = 224 ,
MX35_PAD_SD2_CMD = 225 ,
MX35_PAD_SD2_CLK = 226 ,
MX35_PAD_SD2_DATA0 = 227 ,
MX35_PAD_SD2_DATA1 = 228 ,
MX35_PAD_SD2_DATA2 = 229 ,
MX35_PAD_SD2_DATA3 = 230 ,
MX35_PAD_ATA_CS0 = 231 ,
MX35_PAD_ATA_CS1 = 232 ,
MX35_PAD_ATA_DIOR = 233 ,
MX35_PAD_ATA_DIOW = 234 ,
MX35_PAD_ATA_DMACK = 235 ,
MX35_PAD_ATA_RESET_B = 236 ,
MX35_PAD_ATA_IORDY = 237 ,
MX35_PAD_ATA_DATA0 = 238 ,
MX35_PAD_ATA_DATA1 = 239 ,
MX35_PAD_ATA_DATA2 = 240 ,
MX35_PAD_ATA_DATA3 = 241 ,
MX35_PAD_ATA_DATA4 = 242 ,
MX35_PAD_ATA_DATA5 = 243 ,
MX35_PAD_ATA_DATA6 = 244 ,
MX35_PAD_ATA_DATA7 = 245 ,
MX35_PAD_ATA_DATA8 = 246 ,
MX35_PAD_ATA_DATA9 = 247 ,
MX35_PAD_ATA_DATA10 = 248 ,
MX35_PAD_ATA_DATA11 = 249 ,
MX35_PAD_ATA_DATA12 = 250 ,
MX35_PAD_ATA_DATA13 = 251 ,
MX35_PAD_ATA_DATA14 = 252 ,
MX35_PAD_ATA_DATA15 = 253 ,
MX35_PAD_ATA_INTRQ = 254 ,
MX35_PAD_ATA_BUFF_EN = 255 ,
MX35_PAD_ATA_DMARQ = 256 ,
MX35_PAD_ATA_DA0 = 257 ,
MX35_PAD_ATA_DA1 = 258 ,
MX35_PAD_ATA_DA2 = 259 ,
MX35_PAD_MLB_CLK = 260 ,
MX35_PAD_MLB_DAT = 261 ,
MX35_PAD_MLB_SIG = 262 ,
MX35_PAD_FEC_TX_CLK = 263 ,
MX35_PAD_FEC_RX_CLK = 264 ,
MX35_PAD_FEC_RX_DV = 265 ,
MX35_PAD_FEC_COL = 266 ,
MX35_PAD_FEC_RDATA0 = 267 ,
MX35_PAD_FEC_TDATA0 = 268 ,
MX35_PAD_FEC_TX_EN = 269 ,
MX35_PAD_FEC_MDC = 270 ,
MX35_PAD_FEC_MDIO = 271 ,
MX35_PAD_FEC_TX_ERR = 272 ,
MX35_PAD_FEC_RX_ERR = 273 ,
MX35_PAD_FEC_CRS = 274 ,
MX35_PAD_FEC_RDATA1 = 275 ,
MX35_PAD_FEC_TDATA1 = 276 ,
MX35_PAD_FEC_RDATA2 = 277 ,
MX35_PAD_FEC_TDATA2 = 278 ,
MX35_PAD_FEC_RDATA3 = 279 ,
MX35_PAD_FEC_TDATA3 = 280 ,
MX35_PAD_EXT_ARMCLK = 281 ,
MX35_PAD_TEST_MODE = 282 ,
} ;
/* imx35 register maps */
static struct imx_pin_reg imx35_pin_regs [ ] = {
[ 0 ] = IMX_PIN_REG ( MX35_PAD_CAPTURE , 0x328 , 0x004 , 0 , 0x0 , 0 ) , /* MX35_PAD_CAPTURE__GPT_CAPIN1 */
[ 1 ] = IMX_PIN_REG ( MX35_PAD_CAPTURE , 0x328 , 0x004 , 1 , 0x0 , 0 ) , /* MX35_PAD_CAPTURE__GPT_CMPOUT2 */
[ 2 ] = IMX_PIN_REG ( MX35_PAD_CAPTURE , 0x328 , 0x004 , 2 , 0x7f4 , 0 ) , /* MX35_PAD_CAPTURE__CSPI2_SS1 */
[ 3 ] = IMX_PIN_REG ( MX35_PAD_CAPTURE , 0x328 , 0x004 , 3 , 0x0 , 0 ) , /* MX35_PAD_CAPTURE__EPIT1_EPITO */
[ 4 ] = IMX_PIN_REG ( MX35_PAD_CAPTURE , 0x328 , 0x004 , 4 , 0x7d0 , 0 ) , /* MX35_PAD_CAPTURE__CCM_CLK32K */
[ 5 ] = IMX_PIN_REG ( MX35_PAD_CAPTURE , 0x328 , 0x004 , 5 , 0x850 , 0 ) , /* MX35_PAD_CAPTURE__GPIO1_4 */
[ 6 ] = IMX_PIN_REG ( MX35_PAD_COMPARE , 0x32c , 0x008 , 0 , 0x0 , 0 ) , /* MX35_PAD_COMPARE__GPT_CMPOUT1 */
[ 7 ] = IMX_PIN_REG ( MX35_PAD_COMPARE , 0x32c , 0x008 , 1 , 0x0 , 0 ) , /* MX35_PAD_COMPARE__GPT_CAPIN2 */
[ 8 ] = IMX_PIN_REG ( MX35_PAD_COMPARE , 0x32c , 0x008 , 2 , 0x0 , 0 ) , /* MX35_PAD_COMPARE__GPT_CMPOUT3 */
[ 9 ] = IMX_PIN_REG ( MX35_PAD_COMPARE , 0x32c , 0x008 , 3 , 0x0 , 0 ) , /* MX35_PAD_COMPARE__EPIT2_EPITO */
[ 10 ] = IMX_PIN_REG ( MX35_PAD_COMPARE , 0x32c , 0x008 , 5 , 0x854 , 0 ) , /* MX35_PAD_COMPARE__GPIO1_5 */
[ 11 ] = IMX_PIN_REG ( MX35_PAD_COMPARE , 0x32c , 0x008 , 7 , 0x0 , 0 ) , /* MX35_PAD_COMPARE__SDMA_EXTDMA_2 */
[ 12 ] = IMX_PIN_REG ( MX35_PAD_WDOG_RST , 0x330 , 0x00c , 0 , 0x0 , 0 ) , /* MX35_PAD_WDOG_RST__WDOG_WDOG_B */
[ 13 ] = IMX_PIN_REG ( MX35_PAD_WDOG_RST , 0x330 , 0x00c , 3 , 0x0 , 0 ) , /* MX35_PAD_WDOG_RST__IPU_FLASH_STROBE */
[ 14 ] = IMX_PIN_REG ( MX35_PAD_WDOG_RST , 0x330 , 0x00c , 5 , 0x858 , 0 ) , /* MX35_PAD_WDOG_RST__GPIO1_6 */
[ 15 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_0 , 0x334 , 0x010 , 0 , 0x82c , 0 ) , /* MX35_PAD_GPIO1_0__GPIO1_0 */
[ 16 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_0 , 0x334 , 0x010 , 1 , 0x7d4 , 0 ) , /* MX35_PAD_GPIO1_0__CCM_PMIC_RDY */
[ 17 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_0 , 0x334 , 0x010 , 2 , 0x990 , 0 ) , /* MX35_PAD_GPIO1_0__OWIRE_LINE */
[ 18 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_0 , 0x334 , 0x010 , 7 , 0x0 , 0 ) , /* MX35_PAD_GPIO1_0__SDMA_EXTDMA_0 */
[ 19 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_1 , 0x338 , 0x014 , 0 , 0x838 , 0 ) , /* MX35_PAD_GPIO1_1__GPIO1_1 */
[ 20 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_1 , 0x338 , 0x014 , 2 , 0x0 , 0 ) , /* MX35_PAD_GPIO1_1__PWM_PWMO */
[ 21 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_1 , 0x338 , 0x014 , 3 , 0x7d8 , 0 ) , /* MX35_PAD_GPIO1_1__CSPI1_SS2 */
[ 22 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_1 , 0x338 , 0x014 , 6 , 0x0 , 0 ) , /* MX35_PAD_GPIO1_1__SCC_TAMPER_DETECT */
[ 23 ] = IMX_PIN_REG ( MX35_PAD_GPIO1_1 , 0x338 , 0x014 , 7 , 0x0 , 0 ) , /* MX35_PAD_GPIO1_1__SDMA_EXTDMA_1 */
[ 24 ] = IMX_PIN_REG ( MX35_PAD_GPIO2_0 , 0x33c , 0x018 , 0 , 0x868 , 0 ) , /* MX35_PAD_GPIO2_0__GPIO2_0 */
[ 25 ] = IMX_PIN_REG ( MX35_PAD_GPIO2_0 , 0x33c , 0x018 , 1 , 0x0 , 0 ) , /* MX35_PAD_GPIO2_0__USB_TOP_USBOTG_CLK */
[ 26 ] = IMX_PIN_REG ( MX35_PAD_GPIO3_0 , 0x340 , 0x01c , 0 , 0x8e8 , 0 ) , /* MX35_PAD_GPIO3_0__GPIO3_0 */
[ 27 ] = IMX_PIN_REG ( MX35_PAD_GPIO3_0 , 0x340 , 0x01c , 1 , 0x0 , 0 ) , /* MX35_PAD_GPIO3_0__USB_TOP_USBH2_CLK */
[ 28 ] = IMX_PIN_REG ( MX35_PAD_RESET_IN_B , 0x344 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_RESET_IN_B__CCM_RESET_IN_B */
[ 29 ] = IMX_PIN_REG ( MX35_PAD_POR_B , 0x348 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_POR_B__CCM_POR_B */
[ 30 ] = IMX_PIN_REG ( MX35_PAD_CLKO , 0x34c , 0x020 , 0 , 0x0 , 0 ) , /* MX35_PAD_CLKO__CCM_CLKO */
[ 31 ] = IMX_PIN_REG ( MX35_PAD_CLKO , 0x34c , 0x020 , 5 , 0x860 , 0 ) , /* MX35_PAD_CLKO__GPIO1_8 */
[ 32 ] = IMX_PIN_REG ( MX35_PAD_BOOT_MODE0 , 0x350 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_BOOT_MODE0__CCM_BOOT_MODE_0 */
[ 33 ] = IMX_PIN_REG ( MX35_PAD_BOOT_MODE1 , 0x354 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_BOOT_MODE1__CCM_BOOT_MODE_1 */
[ 34 ] = IMX_PIN_REG ( MX35_PAD_CLK_MODE0 , 0x358 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CLK_MODE0__CCM_CLK_MODE_0 */
[ 35 ] = IMX_PIN_REG ( MX35_PAD_CLK_MODE1 , 0x35c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CLK_MODE1__CCM_CLK_MODE_1 */
[ 36 ] = IMX_PIN_REG ( MX35_PAD_POWER_FAIL , 0x360 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_POWER_FAIL__CCM_DSM_WAKEUP_INT_26 */
[ 37 ] = IMX_PIN_REG ( MX35_PAD_VSTBY , 0x364 , 0x024 , 0 , 0x0 , 0 ) , /* MX35_PAD_VSTBY__CCM_VSTBY */
[ 38 ] = IMX_PIN_REG ( MX35_PAD_VSTBY , 0x364 , 0x024 , 5 , 0x85c , 0 ) , /* MX35_PAD_VSTBY__GPIO1_7 */
[ 39 ] = IMX_PIN_REG ( MX35_PAD_A0 , 0x368 , 0x028 , 0 , 0x0 , 0 ) , /* MX35_PAD_A0__EMI_EIM_DA_L_0 */
[ 40 ] = IMX_PIN_REG ( MX35_PAD_A1 , 0x36c , 0x02c , 0 , 0x0 , 0 ) , /* MX35_PAD_A1__EMI_EIM_DA_L_1 */
[ 41 ] = IMX_PIN_REG ( MX35_PAD_A2 , 0x370 , 0x030 , 0 , 0x0 , 0 ) , /* MX35_PAD_A2__EMI_EIM_DA_L_2 */
[ 42 ] = IMX_PIN_REG ( MX35_PAD_A3 , 0x374 , 0x034 , 0 , 0x0 , 0 ) , /* MX35_PAD_A3__EMI_EIM_DA_L_3 */
[ 43 ] = IMX_PIN_REG ( MX35_PAD_A4 , 0x378 , 0x038 , 0 , 0x0 , 0 ) , /* MX35_PAD_A4__EMI_EIM_DA_L_4 */
[ 44 ] = IMX_PIN_REG ( MX35_PAD_A5 , 0x37c , 0x03c , 0 , 0x0 , 0 ) , /* MX35_PAD_A5__EMI_EIM_DA_L_5 */
[ 45 ] = IMX_PIN_REG ( MX35_PAD_A6 , 0x380 , 0x040 , 0 , 0x0 , 0 ) , /* MX35_PAD_A6__EMI_EIM_DA_L_6 */
[ 46 ] = IMX_PIN_REG ( MX35_PAD_A7 , 0x384 , 0x044 , 0 , 0x0 , 0 ) , /* MX35_PAD_A7__EMI_EIM_DA_L_7 */
[ 47 ] = IMX_PIN_REG ( MX35_PAD_A8 , 0x388 , 0x048 , 0 , 0x0 , 0 ) , /* MX35_PAD_A8__EMI_EIM_DA_H_8 */
[ 48 ] = IMX_PIN_REG ( MX35_PAD_A9 , 0x38c , 0x04c , 0 , 0x0 , 0 ) , /* MX35_PAD_A9__EMI_EIM_DA_H_9 */
[ 49 ] = IMX_PIN_REG ( MX35_PAD_A10 , 0x390 , 0x050 , 0 , 0x0 , 0 ) , /* MX35_PAD_A10__EMI_EIM_DA_H_10 */
[ 50 ] = IMX_PIN_REG ( MX35_PAD_MA10 , 0x394 , 0x054 , 0 , 0x0 , 0 ) , /* MX35_PAD_MA10__EMI_MA10 */
[ 51 ] = IMX_PIN_REG ( MX35_PAD_A11 , 0x398 , 0x058 , 0 , 0x0 , 0 ) , /* MX35_PAD_A11__EMI_EIM_DA_H_11 */
[ 52 ] = IMX_PIN_REG ( MX35_PAD_A12 , 0x39c , 0x05c , 0 , 0x0 , 0 ) , /* MX35_PAD_A12__EMI_EIM_DA_H_12 */
[ 53 ] = IMX_PIN_REG ( MX35_PAD_A13 , 0x3a0 , 0x060 , 0 , 0x0 , 0 ) , /* MX35_PAD_A13__EMI_EIM_DA_H_13 */
[ 54 ] = IMX_PIN_REG ( MX35_PAD_A14 , 0x3a4 , 0x064 , 0 , 0x0 , 0 ) , /* MX35_PAD_A14__EMI_EIM_DA_H2_14 */
[ 55 ] = IMX_PIN_REG ( MX35_PAD_A15 , 0x3a8 , 0x068 , 0 , 0x0 , 0 ) , /* MX35_PAD_A15__EMI_EIM_DA_H2_15 */
[ 56 ] = IMX_PIN_REG ( MX35_PAD_A16 , 0x3ac , 0x06c , 0 , 0x0 , 0 ) , /* MX35_PAD_A16__EMI_EIM_A_16 */
[ 57 ] = IMX_PIN_REG ( MX35_PAD_A17 , 0x3b0 , 0x070 , 0 , 0x0 , 0 ) , /* MX35_PAD_A17__EMI_EIM_A_17 */
[ 58 ] = IMX_PIN_REG ( MX35_PAD_A18 , 0x3b4 , 0x074 , 0 , 0x0 , 0 ) , /* MX35_PAD_A18__EMI_EIM_A_18 */
[ 59 ] = IMX_PIN_REG ( MX35_PAD_A19 , 0x3b8 , 0x078 , 0 , 0x0 , 0 ) , /* MX35_PAD_A19__EMI_EIM_A_19 */
[ 60 ] = IMX_PIN_REG ( MX35_PAD_A20 , 0x3bc , 0x07c , 0 , 0x0 , 0 ) , /* MX35_PAD_A20__EMI_EIM_A_20 */
[ 61 ] = IMX_PIN_REG ( MX35_PAD_A21 , 0x3c0 , 0x080 , 0 , 0x0 , 0 ) , /* MX35_PAD_A21__EMI_EIM_A_21 */
[ 62 ] = IMX_PIN_REG ( MX35_PAD_A22 , 0x3c4 , 0x084 , 0 , 0x0 , 0 ) , /* MX35_PAD_A22__EMI_EIM_A_22 */
[ 63 ] = IMX_PIN_REG ( MX35_PAD_A23 , 0x3c8 , 0x088 , 0 , 0x0 , 0 ) , /* MX35_PAD_A23__EMI_EIM_A_23 */
[ 64 ] = IMX_PIN_REG ( MX35_PAD_A24 , 0x3cc , 0x08c , 0 , 0x0 , 0 ) , /* MX35_PAD_A24__EMI_EIM_A_24 */
[ 65 ] = IMX_PIN_REG ( MX35_PAD_A25 , 0x3d0 , 0x090 , 0 , 0x0 , 0 ) , /* MX35_PAD_A25__EMI_EIM_A_25 */
[ 66 ] = IMX_PIN_REG ( MX35_PAD_SDBA1 , 0x3d4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDBA1__EMI_EIM_SDBA1 */
[ 67 ] = IMX_PIN_REG ( MX35_PAD_SDBA0 , 0x3d8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDBA0__EMI_EIM_SDBA0 */
[ 68 ] = IMX_PIN_REG ( MX35_PAD_SD0 , 0x3dc , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD0__EMI_DRAM_D_0 */
[ 69 ] = IMX_PIN_REG ( MX35_PAD_SD1 , 0x3e0 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1__EMI_DRAM_D_1 */
[ 70 ] = IMX_PIN_REG ( MX35_PAD_SD2 , 0x3e4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2__EMI_DRAM_D_2 */
[ 71 ] = IMX_PIN_REG ( MX35_PAD_SD3 , 0x3e8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD3__EMI_DRAM_D_3 */
[ 72 ] = IMX_PIN_REG ( MX35_PAD_SD4 , 0x3ec , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD4__EMI_DRAM_D_4 */
[ 73 ] = IMX_PIN_REG ( MX35_PAD_SD5 , 0x3f0 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD5__EMI_DRAM_D_5 */
[ 74 ] = IMX_PIN_REG ( MX35_PAD_SD6 , 0x3f4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD6__EMI_DRAM_D_6 */
[ 75 ] = IMX_PIN_REG ( MX35_PAD_SD7 , 0x3f8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD7__EMI_DRAM_D_7 */
[ 76 ] = IMX_PIN_REG ( MX35_PAD_SD8 , 0x3fc , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD8__EMI_DRAM_D_8 */
[ 77 ] = IMX_PIN_REG ( MX35_PAD_SD9 , 0x400 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD9__EMI_DRAM_D_9 */
[ 78 ] = IMX_PIN_REG ( MX35_PAD_SD10 , 0x404 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD10__EMI_DRAM_D_10 */
[ 79 ] = IMX_PIN_REG ( MX35_PAD_SD11 , 0x408 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD11__EMI_DRAM_D_11 */
[ 80 ] = IMX_PIN_REG ( MX35_PAD_SD12 , 0x40c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD12__EMI_DRAM_D_12 */
[ 81 ] = IMX_PIN_REG ( MX35_PAD_SD13 , 0x410 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD13__EMI_DRAM_D_13 */
[ 82 ] = IMX_PIN_REG ( MX35_PAD_SD14 , 0x414 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD14__EMI_DRAM_D_14 */
[ 83 ] = IMX_PIN_REG ( MX35_PAD_SD15 , 0x418 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD15__EMI_DRAM_D_15 */
[ 84 ] = IMX_PIN_REG ( MX35_PAD_SD16 , 0x41c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD16__EMI_DRAM_D_16 */
[ 85 ] = IMX_PIN_REG ( MX35_PAD_SD17 , 0x420 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD17__EMI_DRAM_D_17 */
[ 86 ] = IMX_PIN_REG ( MX35_PAD_SD18 , 0x424 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD18__EMI_DRAM_D_18 */
[ 87 ] = IMX_PIN_REG ( MX35_PAD_SD19 , 0x428 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD19__EMI_DRAM_D_19 */
[ 88 ] = IMX_PIN_REG ( MX35_PAD_SD20 , 0x42c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD20__EMI_DRAM_D_20 */
[ 89 ] = IMX_PIN_REG ( MX35_PAD_SD21 , 0x430 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD21__EMI_DRAM_D_21 */
[ 90 ] = IMX_PIN_REG ( MX35_PAD_SD22 , 0x434 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD22__EMI_DRAM_D_22 */
[ 91 ] = IMX_PIN_REG ( MX35_PAD_SD23 , 0x438 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD23__EMI_DRAM_D_23 */
[ 92 ] = IMX_PIN_REG ( MX35_PAD_SD24 , 0x43c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD24__EMI_DRAM_D_24 */
[ 93 ] = IMX_PIN_REG ( MX35_PAD_SD25 , 0x440 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD25__EMI_DRAM_D_25 */
[ 94 ] = IMX_PIN_REG ( MX35_PAD_SD26 , 0x444 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD26__EMI_DRAM_D_26 */
[ 95 ] = IMX_PIN_REG ( MX35_PAD_SD27 , 0x448 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD27__EMI_DRAM_D_27 */
[ 96 ] = IMX_PIN_REG ( MX35_PAD_SD28 , 0x44c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD28__EMI_DRAM_D_28 */
[ 97 ] = IMX_PIN_REG ( MX35_PAD_SD29 , 0x450 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD29__EMI_DRAM_D_29 */
[ 98 ] = IMX_PIN_REG ( MX35_PAD_SD30 , 0x454 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD30__EMI_DRAM_D_30 */
[ 99 ] = IMX_PIN_REG ( MX35_PAD_SD31 , 0x458 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD31__EMI_DRAM_D_31 */
[ 100 ] = IMX_PIN_REG ( MX35_PAD_DQM0 , 0x45c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_DQM0__EMI_DRAM_DQM_0 */
[ 101 ] = IMX_PIN_REG ( MX35_PAD_DQM1 , 0x460 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_DQM1__EMI_DRAM_DQM_1 */
[ 102 ] = IMX_PIN_REG ( MX35_PAD_DQM2 , 0x464 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_DQM2__EMI_DRAM_DQM_2 */
[ 103 ] = IMX_PIN_REG ( MX35_PAD_DQM3 , 0x468 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_DQM3__EMI_DRAM_DQM_3 */
[ 104 ] = IMX_PIN_REG ( MX35_PAD_EB0 , 0x46c , 0x094 , 0 , 0x0 , 0 ) , /* MX35_PAD_EB0__EMI_EIM_EB0_B */
[ 105 ] = IMX_PIN_REG ( MX35_PAD_EB1 , 0x470 , 0x098 , 0 , 0x0 , 0 ) , /* MX35_PAD_EB1__EMI_EIM_EB1_B */
[ 106 ] = IMX_PIN_REG ( MX35_PAD_OE , 0x474 , 0x09c , 0 , 0x0 , 0 ) , /* MX35_PAD_OE__EMI_EIM_OE */
[ 107 ] = IMX_PIN_REG ( MX35_PAD_CS0 , 0x478 , 0x0a0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CS0__EMI_EIM_CS0 */
[ 108 ] = IMX_PIN_REG ( MX35_PAD_CS1 , 0x47c , 0x0a4 , 0 , 0x0 , 0 ) , /* MX35_PAD_CS1__EMI_EIM_CS1 */
[ 109 ] = IMX_PIN_REG ( MX35_PAD_CS1 , 0x47c , 0x0a4 , 3 , 0x0 , 0 ) , /* MX35_PAD_CS1__EMI_NANDF_CE3 */
[ 110 ] = IMX_PIN_REG ( MX35_PAD_CS2 , 0x480 , 0x0a8 , 0 , 0x0 , 0 ) , /* MX35_PAD_CS2__EMI_EIM_CS2 */
[ 111 ] = IMX_PIN_REG ( MX35_PAD_CS3 , 0x484 , 0x0ac , 0 , 0x0 , 0 ) , /* MX35_PAD_CS3__EMI_EIM_CS3 */
[ 112 ] = IMX_PIN_REG ( MX35_PAD_CS4 , 0x488 , 0x0b0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CS4__EMI_EIM_CS4 */
[ 113 ] = IMX_PIN_REG ( MX35_PAD_CS4 , 0x488 , 0x0b0 , 1 , 0x800 , 0 ) , /* MX35_PAD_CS4__EMI_DTACK_B */
[ 114 ] = IMX_PIN_REG ( MX35_PAD_CS4 , 0x488 , 0x0b0 , 3 , 0x0 , 0 ) , /* MX35_PAD_CS4__EMI_NANDF_CE1 */
[ 115 ] = IMX_PIN_REG ( MX35_PAD_CS4 , 0x488 , 0x0b0 , 5 , 0x83c , 0 ) , /* MX35_PAD_CS4__GPIO1_20 */
[ 116 ] = IMX_PIN_REG ( MX35_PAD_CS5 , 0x48c , 0x0b4 , 0 , 0x0 , 0 ) , /* MX35_PAD_CS5__EMI_EIM_CS5 */
[ 117 ] = IMX_PIN_REG ( MX35_PAD_CS5 , 0x48c , 0x0b4 , 1 , 0x7f8 , 0 ) , /* MX35_PAD_CS5__CSPI2_SS2 */
[ 118 ] = IMX_PIN_REG ( MX35_PAD_CS5 , 0x48c , 0x0b4 , 2 , 0x7d8 , 1 ) , /* MX35_PAD_CS5__CSPI1_SS2 */
[ 119 ] = IMX_PIN_REG ( MX35_PAD_CS5 , 0x48c , 0x0b4 , 3 , 0x0 , 0 ) , /* MX35_PAD_CS5__EMI_NANDF_CE2 */
[ 120 ] = IMX_PIN_REG ( MX35_PAD_CS5 , 0x48c , 0x0b4 , 5 , 0x840 , 0 ) , /* MX35_PAD_CS5__GPIO1_21 */
[ 121 ] = IMX_PIN_REG ( MX35_PAD_NF_CE0 , 0x490 , 0x0b8 , 0 , 0x0 , 0 ) , /* MX35_PAD_NF_CE0__EMI_NANDF_CE0 */
[ 122 ] = IMX_PIN_REG ( MX35_PAD_NF_CE0 , 0x490 , 0x0b8 , 5 , 0x844 , 0 ) , /* MX35_PAD_NF_CE0__GPIO1_22 */
[ 123 ] = IMX_PIN_REG ( MX35_PAD_ECB , 0x494 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_ECB__EMI_EIM_ECB */
[ 124 ] = IMX_PIN_REG ( MX35_PAD_LBA , 0x498 , 0x0bc , 0 , 0x0 , 0 ) , /* MX35_PAD_LBA__EMI_EIM_LBA */
[ 125 ] = IMX_PIN_REG ( MX35_PAD_BCLK , 0x49c , 0x0c0 , 0 , 0x0 , 0 ) , /* MX35_PAD_BCLK__EMI_EIM_BCLK */
[ 126 ] = IMX_PIN_REG ( MX35_PAD_RW , 0x4a0 , 0x0c4 , 0 , 0x0 , 0 ) , /* MX35_PAD_RW__EMI_EIM_RW */
[ 127 ] = IMX_PIN_REG ( MX35_PAD_RAS , 0x4a4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_RAS__EMI_DRAM_RAS */
[ 128 ] = IMX_PIN_REG ( MX35_PAD_CAS , 0x4a8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CAS__EMI_DRAM_CAS */
[ 129 ] = IMX_PIN_REG ( MX35_PAD_SDWE , 0x4ac , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDWE__EMI_DRAM_SDWE */
[ 130 ] = IMX_PIN_REG ( MX35_PAD_SDCKE0 , 0x4b0 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDCKE0__EMI_DRAM_SDCKE_0 */
[ 131 ] = IMX_PIN_REG ( MX35_PAD_SDCKE1 , 0x4b4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDCKE1__EMI_DRAM_SDCKE_1 */
[ 132 ] = IMX_PIN_REG ( MX35_PAD_SDCLK , 0x4b8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDCLK__EMI_DRAM_SDCLK */
[ 133 ] = IMX_PIN_REG ( MX35_PAD_SDQS0 , 0x4bc , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDQS0__EMI_DRAM_SDQS_0 */
[ 134 ] = IMX_PIN_REG ( MX35_PAD_SDQS1 , 0x4c0 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDQS1__EMI_DRAM_SDQS_1 */
[ 135 ] = IMX_PIN_REG ( MX35_PAD_SDQS2 , 0x4c4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDQS2__EMI_DRAM_SDQS_2 */
[ 136 ] = IMX_PIN_REG ( MX35_PAD_SDQS3 , 0x4c8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SDQS3__EMI_DRAM_SDQS_3 */
[ 137 ] = IMX_PIN_REG ( MX35_PAD_NFWE_B , 0x4cc , 0x0c8 , 0 , 0x0 , 0 ) , /* MX35_PAD_NFWE_B__EMI_NANDF_WE_B */
[ 138 ] = IMX_PIN_REG ( MX35_PAD_NFWE_B , 0x4cc , 0x0c8 , 1 , 0x9d8 , 0 ) , /* MX35_PAD_NFWE_B__USB_TOP_USBH2_DATA_3 */
[ 139 ] = IMX_PIN_REG ( MX35_PAD_NFWE_B , 0x4cc , 0x0c8 , 2 , 0x924 , 0 ) , /* MX35_PAD_NFWE_B__IPU_DISPB_D0_VSYNC */
[ 140 ] = IMX_PIN_REG ( MX35_PAD_NFWE_B , 0x4cc , 0x0c8 , 5 , 0x88c , 0 ) , /* MX35_PAD_NFWE_B__GPIO2_18 */
[ 141 ] = IMX_PIN_REG ( MX35_PAD_NFWE_B , 0x4cc , 0x0c8 , 7 , 0x0 , 0 ) , /* MX35_PAD_NFWE_B__ARM11P_TOP_TRACE_0 */
[ 142 ] = IMX_PIN_REG ( MX35_PAD_NFRE_B , 0x4d0 , 0x0cc , 0 , 0x0 , 0 ) , /* MX35_PAD_NFRE_B__EMI_NANDF_RE_B */
[ 143 ] = IMX_PIN_REG ( MX35_PAD_NFRE_B , 0x4d0 , 0x0cc , 1 , 0x9ec , 0 ) , /* MX35_PAD_NFRE_B__USB_TOP_USBH2_DIR */
[ 144 ] = IMX_PIN_REG ( MX35_PAD_NFRE_B , 0x4d0 , 0x0cc , 2 , 0x0 , 0 ) , /* MX35_PAD_NFRE_B__IPU_DISPB_BCLK */
[ 145 ] = IMX_PIN_REG ( MX35_PAD_NFRE_B , 0x4d0 , 0x0cc , 5 , 0x890 , 0 ) , /* MX35_PAD_NFRE_B__GPIO2_19 */
[ 146 ] = IMX_PIN_REG ( MX35_PAD_NFRE_B , 0x4d0 , 0x0cc , 7 , 0x0 , 0 ) , /* MX35_PAD_NFRE_B__ARM11P_TOP_TRACE_1 */
[ 147 ] = IMX_PIN_REG ( MX35_PAD_NFALE , 0x4d4 , 0x0d0 , 0 , 0x0 , 0 ) , /* MX35_PAD_NFALE__EMI_NANDF_ALE */
[ 148 ] = IMX_PIN_REG ( MX35_PAD_NFALE , 0x4d4 , 0x0d0 , 1 , 0x0 , 0 ) , /* MX35_PAD_NFALE__USB_TOP_USBH2_STP */
[ 149 ] = IMX_PIN_REG ( MX35_PAD_NFALE , 0x4d4 , 0x0d0 , 2 , 0x0 , 0 ) , /* MX35_PAD_NFALE__IPU_DISPB_CS0 */
[ 150 ] = IMX_PIN_REG ( MX35_PAD_NFALE , 0x4d4 , 0x0d0 , 5 , 0x898 , 0 ) , /* MX35_PAD_NFALE__GPIO2_20 */
[ 151 ] = IMX_PIN_REG ( MX35_PAD_NFALE , 0x4d4 , 0x0d0 , 7 , 0x0 , 0 ) , /* MX35_PAD_NFALE__ARM11P_TOP_TRACE_2 */
[ 152 ] = IMX_PIN_REG ( MX35_PAD_NFCLE , 0x4d8 , 0x0d4 , 0 , 0x0 , 0 ) , /* MX35_PAD_NFCLE__EMI_NANDF_CLE */
[ 153 ] = IMX_PIN_REG ( MX35_PAD_NFCLE , 0x4d8 , 0x0d4 , 1 , 0x9f0 , 0 ) , /* MX35_PAD_NFCLE__USB_TOP_USBH2_NXT */
[ 154 ] = IMX_PIN_REG ( MX35_PAD_NFCLE , 0x4d8 , 0x0d4 , 2 , 0x0 , 0 ) , /* MX35_PAD_NFCLE__IPU_DISPB_PAR_RS */
[ 155 ] = IMX_PIN_REG ( MX35_PAD_NFCLE , 0x4d8 , 0x0d4 , 5 , 0x89c , 0 ) , /* MX35_PAD_NFCLE__GPIO2_21 */
[ 156 ] = IMX_PIN_REG ( MX35_PAD_NFCLE , 0x4d8 , 0x0d4 , 7 , 0x0 , 0 ) , /* MX35_PAD_NFCLE__ARM11P_TOP_TRACE_3 */
[ 157 ] = IMX_PIN_REG ( MX35_PAD_NFWP_B , 0x4dc , 0x0d8 , 0 , 0x0 , 0 ) , /* MX35_PAD_NFWP_B__EMI_NANDF_WP_B */
[ 158 ] = IMX_PIN_REG ( MX35_PAD_NFWP_B , 0x4dc , 0x0d8 , 1 , 0x9e8 , 0 ) , /* MX35_PAD_NFWP_B__USB_TOP_USBH2_DATA_7 */
[ 159 ] = IMX_PIN_REG ( MX35_PAD_NFWP_B , 0x4dc , 0x0d8 , 2 , 0x0 , 0 ) , /* MX35_PAD_NFWP_B__IPU_DISPB_WR */
[ 160 ] = IMX_PIN_REG ( MX35_PAD_NFWP_B , 0x4dc , 0x0d8 , 5 , 0x8a0 , 0 ) , /* MX35_PAD_NFWP_B__GPIO2_22 */
[ 161 ] = IMX_PIN_REG ( MX35_PAD_NFWP_B , 0x4dc , 0x0d8 , 7 , 0x0 , 0 ) , /* MX35_PAD_NFWP_B__ARM11P_TOP_TRCTL */
[ 162 ] = IMX_PIN_REG ( MX35_PAD_NFRB , 0x4e0 , 0x0dc , 0 , 0x0 , 0 ) , /* MX35_PAD_NFRB__EMI_NANDF_RB */
[ 163 ] = IMX_PIN_REG ( MX35_PAD_NFRB , 0x4e0 , 0x0dc , 2 , 0x0 , 0 ) , /* MX35_PAD_NFRB__IPU_DISPB_RD */
[ 164 ] = IMX_PIN_REG ( MX35_PAD_NFRB , 0x4e0 , 0x0dc , 5 , 0x8a4 , 0 ) , /* MX35_PAD_NFRB__GPIO2_23 */
[ 165 ] = IMX_PIN_REG ( MX35_PAD_NFRB , 0x4e0 , 0x0dc , 7 , 0x0 , 0 ) , /* MX35_PAD_NFRB__ARM11P_TOP_TRCLK */
[ 166 ] = IMX_PIN_REG ( MX35_PAD_D15 , 0x4e4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D15__EMI_EIM_D_15 */
[ 167 ] = IMX_PIN_REG ( MX35_PAD_D14 , 0x4e8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D14__EMI_EIM_D_14 */
[ 168 ] = IMX_PIN_REG ( MX35_PAD_D13 , 0x4ec , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D13__EMI_EIM_D_13 */
[ 169 ] = IMX_PIN_REG ( MX35_PAD_D12 , 0x4f0 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D12__EMI_EIM_D_12 */
[ 170 ] = IMX_PIN_REG ( MX35_PAD_D11 , 0x4f4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D11__EMI_EIM_D_11 */
[ 171 ] = IMX_PIN_REG ( MX35_PAD_D10 , 0x4f8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D10__EMI_EIM_D_10 */
[ 172 ] = IMX_PIN_REG ( MX35_PAD_D9 , 0x4fc , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D9__EMI_EIM_D_9 */
[ 173 ] = IMX_PIN_REG ( MX35_PAD_D8 , 0x500 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D8__EMI_EIM_D_8 */
[ 174 ] = IMX_PIN_REG ( MX35_PAD_D7 , 0x504 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D7__EMI_EIM_D_7 */
[ 175 ] = IMX_PIN_REG ( MX35_PAD_D6 , 0x508 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D6__EMI_EIM_D_6 */
[ 176 ] = IMX_PIN_REG ( MX35_PAD_D5 , 0x50c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D5__EMI_EIM_D_5 */
[ 177 ] = IMX_PIN_REG ( MX35_PAD_D4 , 0x510 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D4__EMI_EIM_D_4 */
[ 178 ] = IMX_PIN_REG ( MX35_PAD_D3 , 0x514 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3__EMI_EIM_D_3 */
[ 179 ] = IMX_PIN_REG ( MX35_PAD_D2 , 0x518 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D2__EMI_EIM_D_2 */
[ 180 ] = IMX_PIN_REG ( MX35_PAD_D1 , 0x51c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D1__EMI_EIM_D_1 */
[ 181 ] = IMX_PIN_REG ( MX35_PAD_D0 , 0x520 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_D0__EMI_EIM_D_0 */
[ 182 ] = IMX_PIN_REG ( MX35_PAD_CSI_D8 , 0x524 , 0x0e0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D8__IPU_CSI_D_8 */
[ 183 ] = IMX_PIN_REG ( MX35_PAD_CSI_D8 , 0x524 , 0x0e0 , 1 , 0x950 , 0 ) , /* MX35_PAD_CSI_D8__KPP_COL_0 */
[ 184 ] = IMX_PIN_REG ( MX35_PAD_CSI_D8 , 0x524 , 0x0e0 , 5 , 0x83c , 1 ) , /* MX35_PAD_CSI_D8__GPIO1_20 */
[ 185 ] = IMX_PIN_REG ( MX35_PAD_CSI_D8 , 0x524 , 0x0e0 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSI_D8__ARM11P_TOP_EVNTBUS_13 */
[ 186 ] = IMX_PIN_REG ( MX35_PAD_CSI_D9 , 0x528 , 0x0e4 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D9__IPU_CSI_D_9 */
[ 187 ] = IMX_PIN_REG ( MX35_PAD_CSI_D9 , 0x528 , 0x0e4 , 1 , 0x954 , 0 ) , /* MX35_PAD_CSI_D9__KPP_COL_1 */
[ 188 ] = IMX_PIN_REG ( MX35_PAD_CSI_D9 , 0x528 , 0x0e4 , 5 , 0x840 , 1 ) , /* MX35_PAD_CSI_D9__GPIO1_21 */
[ 189 ] = IMX_PIN_REG ( MX35_PAD_CSI_D9 , 0x528 , 0x0e4 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSI_D9__ARM11P_TOP_EVNTBUS_14 */
[ 190 ] = IMX_PIN_REG ( MX35_PAD_CSI_D10 , 0x52c , 0x0e8 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D10__IPU_CSI_D_10 */
[ 191 ] = IMX_PIN_REG ( MX35_PAD_CSI_D10 , 0x52c , 0x0e8 , 1 , 0x958 , 0 ) , /* MX35_PAD_CSI_D10__KPP_COL_2 */
[ 192 ] = IMX_PIN_REG ( MX35_PAD_CSI_D10 , 0x52c , 0x0e8 , 5 , 0x844 , 1 ) , /* MX35_PAD_CSI_D10__GPIO1_22 */
[ 193 ] = IMX_PIN_REG ( MX35_PAD_CSI_D10 , 0x52c , 0x0e8 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSI_D10__ARM11P_TOP_EVNTBUS_15 */
[ 194 ] = IMX_PIN_REG ( MX35_PAD_CSI_D11 , 0x530 , 0x0ec , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D11__IPU_CSI_D_11 */
[ 195 ] = IMX_PIN_REG ( MX35_PAD_CSI_D11 , 0x530 , 0x0ec , 1 , 0x95c , 0 ) , /* MX35_PAD_CSI_D11__KPP_COL_3 */
[ 196 ] = IMX_PIN_REG ( MX35_PAD_CSI_D11 , 0x530 , 0x0ec , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_D11__GPIO1_23 */
[ 197 ] = IMX_PIN_REG ( MX35_PAD_CSI_D12 , 0x534 , 0x0f0 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D12__IPU_CSI_D_12 */
[ 198 ] = IMX_PIN_REG ( MX35_PAD_CSI_D12 , 0x534 , 0x0f0 , 1 , 0x970 , 0 ) , /* MX35_PAD_CSI_D12__KPP_ROW_0 */
[ 199 ] = IMX_PIN_REG ( MX35_PAD_CSI_D12 , 0x534 , 0x0f0 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_D12__GPIO1_24 */
[ 200 ] = IMX_PIN_REG ( MX35_PAD_CSI_D13 , 0x538 , 0x0f4 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D13__IPU_CSI_D_13 */
[ 201 ] = IMX_PIN_REG ( MX35_PAD_CSI_D13 , 0x538 , 0x0f4 , 1 , 0x974 , 0 ) , /* MX35_PAD_CSI_D13__KPP_ROW_1 */
[ 202 ] = IMX_PIN_REG ( MX35_PAD_CSI_D13 , 0x538 , 0x0f4 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_D13__GPIO1_25 */
[ 203 ] = IMX_PIN_REG ( MX35_PAD_CSI_D14 , 0x53c , 0x0f8 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_D14__IPU_CSI_D_14 */
[ 204 ] = IMX_PIN_REG ( MX35_PAD_CSI_D14 , 0x53c , 0x0f8 , 1 , 0x978 , 0 ) , /* MX35_PAD_CSI_D14__KPP_ROW_2 */
[ 205 ] = IMX_PIN_REG ( MX35_PAD_CSI_D14 , 0x53c , 0x0f8 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_D14__GPIO1_26 */
[ 206 ] = IMX_PIN_REG ( MX35_PAD_CSI_D15 , 0x540 , 0x0fc , 0 , 0x97c , 0 ) , /* MX35_PAD_CSI_D15__IPU_CSI_D_15 */
[ 207 ] = IMX_PIN_REG ( MX35_PAD_CSI_D15 , 0x540 , 0x0fc , 1 , 0x0 , 0 ) , /* MX35_PAD_CSI_D15__KPP_ROW_3 */
[ 208 ] = IMX_PIN_REG ( MX35_PAD_CSI_D15 , 0x540 , 0x0fc , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_D15__GPIO1_27 */
[ 209 ] = IMX_PIN_REG ( MX35_PAD_CSI_MCLK , 0x544 , 0x100 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_MCLK__IPU_CSI_MCLK */
[ 210 ] = IMX_PIN_REG ( MX35_PAD_CSI_MCLK , 0x544 , 0x100 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_MCLK__GPIO1_28 */
[ 211 ] = IMX_PIN_REG ( MX35_PAD_CSI_VSYNC , 0x548 , 0x104 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC */
[ 212 ] = IMX_PIN_REG ( MX35_PAD_CSI_VSYNC , 0x548 , 0x104 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_VSYNC__GPIO1_29 */
[ 213 ] = IMX_PIN_REG ( MX35_PAD_CSI_HSYNC , 0x54c , 0x108 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC */
[ 214 ] = IMX_PIN_REG ( MX35_PAD_CSI_HSYNC , 0x54c , 0x108 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_HSYNC__GPIO1_30 */
[ 215 ] = IMX_PIN_REG ( MX35_PAD_CSI_PIXCLK , 0x550 , 0x10c , 0 , 0x0 , 0 ) , /* MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK */
[ 216 ] = IMX_PIN_REG ( MX35_PAD_CSI_PIXCLK , 0x550 , 0x10c , 5 , 0x0 , 0 ) , /* MX35_PAD_CSI_PIXCLK__GPIO1_31 */
[ 217 ] = IMX_PIN_REG ( MX35_PAD_I2C1_CLK , 0x554 , 0x110 , 0 , 0x0 , 0 ) , /* MX35_PAD_I2C1_CLK__I2C1_SCL */
[ 218 ] = IMX_PIN_REG ( MX35_PAD_I2C1_CLK , 0x554 , 0x110 , 5 , 0x8a8 , 0 ) , /* MX35_PAD_I2C1_CLK__GPIO2_24 */
[ 219 ] = IMX_PIN_REG ( MX35_PAD_I2C1_CLK , 0x554 , 0x110 , 6 , 0x0 , 0 ) , /* MX35_PAD_I2C1_CLK__CCM_USB_BYP_CLK */
[ 220 ] = IMX_PIN_REG ( MX35_PAD_I2C1_DAT , 0x558 , 0x114 , 0 , 0x0 , 0 ) , /* MX35_PAD_I2C1_DAT__I2C1_SDA */
[ 221 ] = IMX_PIN_REG ( MX35_PAD_I2C1_DAT , 0x558 , 0x114 , 5 , 0x8ac , 0 ) , /* MX35_PAD_I2C1_DAT__GPIO2_25 */
[ 222 ] = IMX_PIN_REG ( MX35_PAD_I2C2_CLK , 0x55c , 0x118 , 0 , 0x0 , 0 ) , /* MX35_PAD_I2C2_CLK__I2C2_SCL */
[ 223 ] = IMX_PIN_REG ( MX35_PAD_I2C2_CLK , 0x55c , 0x118 , 1 , 0x0 , 0 ) , /* MX35_PAD_I2C2_CLK__CAN1_TXCAN */
[ 224 ] = IMX_PIN_REG ( MX35_PAD_I2C2_CLK , 0x55c , 0x118 , 2 , 0x0 , 0 ) , /* MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR */
[ 225 ] = IMX_PIN_REG ( MX35_PAD_I2C2_CLK , 0x55c , 0x118 , 5 , 0x8b0 , 0 ) , /* MX35_PAD_I2C2_CLK__GPIO2_26 */
[ 226 ] = IMX_PIN_REG ( MX35_PAD_I2C2_CLK , 0x55c , 0x118 , 6 , 0x0 , 0 ) , /* MX35_PAD_I2C2_CLK__SDMA_DEBUG_BUS_DEVICE_2 */
[ 227 ] = IMX_PIN_REG ( MX35_PAD_I2C2_DAT , 0x560 , 0x11c , 0 , 0x0 , 0 ) , /* MX35_PAD_I2C2_DAT__I2C2_SDA */
[ 228 ] = IMX_PIN_REG ( MX35_PAD_I2C2_DAT , 0x560 , 0x11c , 1 , 0x7c8 , 0 ) , /* MX35_PAD_I2C2_DAT__CAN1_RXCAN */
[ 229 ] = IMX_PIN_REG ( MX35_PAD_I2C2_DAT , 0x560 , 0x11c , 2 , 0x9f4 , 0 ) , /* MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC */
[ 230 ] = IMX_PIN_REG ( MX35_PAD_I2C2_DAT , 0x560 , 0x11c , 5 , 0x8b4 , 0 ) , /* MX35_PAD_I2C2_DAT__GPIO2_27 */
[ 231 ] = IMX_PIN_REG ( MX35_PAD_I2C2_DAT , 0x560 , 0x11c , 6 , 0x0 , 0 ) , /* MX35_PAD_I2C2_DAT__SDMA_DEBUG_BUS_DEVICE_3 */
[ 232 ] = IMX_PIN_REG ( MX35_PAD_STXD4 , 0x564 , 0x120 , 0 , 0x0 , 0 ) , /* MX35_PAD_STXD4__AUDMUX_AUD4_TXD */
[ 233 ] = IMX_PIN_REG ( MX35_PAD_STXD4 , 0x564 , 0x120 , 5 , 0x8b8 , 0 ) , /* MX35_PAD_STXD4__GPIO2_28 */
[ 234 ] = IMX_PIN_REG ( MX35_PAD_STXD4 , 0x564 , 0x120 , 7 , 0x0 , 0 ) , /* MX35_PAD_STXD4__ARM11P_TOP_ARM_COREASID0 */
[ 235 ] = IMX_PIN_REG ( MX35_PAD_SRXD4 , 0x568 , 0x124 , 0 , 0x0 , 0 ) , /* MX35_PAD_SRXD4__AUDMUX_AUD4_RXD */
[ 236 ] = IMX_PIN_REG ( MX35_PAD_SRXD4 , 0x568 , 0x124 , 5 , 0x8bc , 0 ) , /* MX35_PAD_SRXD4__GPIO2_29 */
[ 237 ] = IMX_PIN_REG ( MX35_PAD_SRXD4 , 0x568 , 0x124 , 7 , 0x0 , 0 ) , /* MX35_PAD_SRXD4__ARM11P_TOP_ARM_COREASID1 */
[ 238 ] = IMX_PIN_REG ( MX35_PAD_SCK4 , 0x56c , 0x128 , 0 , 0x0 , 0 ) , /* MX35_PAD_SCK4__AUDMUX_AUD4_TXC */
[ 239 ] = IMX_PIN_REG ( MX35_PAD_SCK4 , 0x56c , 0x128 , 5 , 0x8c4 , 0 ) , /* MX35_PAD_SCK4__GPIO2_30 */
[ 240 ] = IMX_PIN_REG ( MX35_PAD_SCK4 , 0x56c , 0x128 , 7 , 0x0 , 0 ) , /* MX35_PAD_SCK4__ARM11P_TOP_ARM_COREASID2 */
[ 241 ] = IMX_PIN_REG ( MX35_PAD_STXFS4 , 0x570 , 0x12c , 0 , 0x0 , 0 ) , /* MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS */
[ 242 ] = IMX_PIN_REG ( MX35_PAD_STXFS4 , 0x570 , 0x12c , 5 , 0x8c8 , 0 ) , /* MX35_PAD_STXFS4__GPIO2_31 */
[ 243 ] = IMX_PIN_REG ( MX35_PAD_STXFS4 , 0x570 , 0x12c , 7 , 0x0 , 0 ) , /* MX35_PAD_STXFS4__ARM11P_TOP_ARM_COREASID3 */
[ 244 ] = IMX_PIN_REG ( MX35_PAD_STXD5 , 0x574 , 0x130 , 0 , 0x0 , 0 ) , /* MX35_PAD_STXD5__AUDMUX_AUD5_TXD */
[ 245 ] = IMX_PIN_REG ( MX35_PAD_STXD5 , 0x574 , 0x130 , 1 , 0x0 , 0 ) , /* MX35_PAD_STXD5__SPDIF_SPDIF_OUT1 */
[ 246 ] = IMX_PIN_REG ( MX35_PAD_STXD5 , 0x574 , 0x130 , 2 , 0x7ec , 0 ) , /* MX35_PAD_STXD5__CSPI2_MOSI */
[ 247 ] = IMX_PIN_REG ( MX35_PAD_STXD5 , 0x574 , 0x130 , 5 , 0x82c , 1 ) , /* MX35_PAD_STXD5__GPIO1_0 */
[ 248 ] = IMX_PIN_REG ( MX35_PAD_STXD5 , 0x574 , 0x130 , 7 , 0x0 , 0 ) , /* MX35_PAD_STXD5__ARM11P_TOP_ARM_COREASID4 */
[ 249 ] = IMX_PIN_REG ( MX35_PAD_SRXD5 , 0x578 , 0x134 , 0 , 0x0 , 0 ) , /* MX35_PAD_SRXD5__AUDMUX_AUD5_RXD */
[ 250 ] = IMX_PIN_REG ( MX35_PAD_SRXD5 , 0x578 , 0x134 , 1 , 0x998 , 0 ) , /* MX35_PAD_SRXD5__SPDIF_SPDIF_IN1 */
[ 251 ] = IMX_PIN_REG ( MX35_PAD_SRXD5 , 0x578 , 0x134 , 2 , 0x7e8 , 0 ) , /* MX35_PAD_SRXD5__CSPI2_MISO */
[ 252 ] = IMX_PIN_REG ( MX35_PAD_SRXD5 , 0x578 , 0x134 , 5 , 0x838 , 1 ) , /* MX35_PAD_SRXD5__GPIO1_1 */
[ 253 ] = IMX_PIN_REG ( MX35_PAD_SRXD5 , 0x578 , 0x134 , 7 , 0x0 , 0 ) , /* MX35_PAD_SRXD5__ARM11P_TOP_ARM_COREASID5 */
[ 254 ] = IMX_PIN_REG ( MX35_PAD_SCK5 , 0x57c , 0x138 , 0 , 0x0 , 0 ) , /* MX35_PAD_SCK5__AUDMUX_AUD5_TXC */
[ 255 ] = IMX_PIN_REG ( MX35_PAD_SCK5 , 0x57c , 0x138 , 1 , 0x994 , 0 ) , /* MX35_PAD_SCK5__SPDIF_SPDIF_EXTCLK */
[ 256 ] = IMX_PIN_REG ( MX35_PAD_SCK5 , 0x57c , 0x138 , 2 , 0x7e0 , 0 ) , /* MX35_PAD_SCK5__CSPI2_SCLK */
[ 257 ] = IMX_PIN_REG ( MX35_PAD_SCK5 , 0x57c , 0x138 , 5 , 0x848 , 0 ) , /* MX35_PAD_SCK5__GPIO1_2 */
[ 258 ] = IMX_PIN_REG ( MX35_PAD_SCK5 , 0x57c , 0x138 , 7 , 0x0 , 0 ) , /* MX35_PAD_SCK5__ARM11P_TOP_ARM_COREASID6 */
[ 259 ] = IMX_PIN_REG ( MX35_PAD_STXFS5 , 0x580 , 0x13c , 0 , 0x0 , 0 ) , /* MX35_PAD_STXFS5__AUDMUX_AUD5_TXFS */
[ 260 ] = IMX_PIN_REG ( MX35_PAD_STXFS5 , 0x580 , 0x13c , 2 , 0x7e4 , 0 ) , /* MX35_PAD_STXFS5__CSPI2_RDY */
[ 261 ] = IMX_PIN_REG ( MX35_PAD_STXFS5 , 0x580 , 0x13c , 5 , 0x84c , 0 ) , /* MX35_PAD_STXFS5__GPIO1_3 */
[ 262 ] = IMX_PIN_REG ( MX35_PAD_STXFS5 , 0x580 , 0x13c , 7 , 0x0 , 0 ) , /* MX35_PAD_STXFS5__ARM11P_TOP_ARM_COREASID7 */
[ 263 ] = IMX_PIN_REG ( MX35_PAD_SCKR , 0x584 , 0x140 , 0 , 0x0 , 0 ) , /* MX35_PAD_SCKR__ESAI_SCKR */
[ 264 ] = IMX_PIN_REG ( MX35_PAD_SCKR , 0x584 , 0x140 , 5 , 0x850 , 1 ) , /* MX35_PAD_SCKR__GPIO1_4 */
[ 265 ] = IMX_PIN_REG ( MX35_PAD_SCKR , 0x584 , 0x140 , 7 , 0x0 , 0 ) , /* MX35_PAD_SCKR__ARM11P_TOP_EVNTBUS_10 */
[ 266 ] = IMX_PIN_REG ( MX35_PAD_FSR , 0x588 , 0x144 , 0 , 0x0 , 0 ) , /* MX35_PAD_FSR__ESAI_FSR */
[ 267 ] = IMX_PIN_REG ( MX35_PAD_FSR , 0x588 , 0x144 , 5 , 0x854 , 1 ) , /* MX35_PAD_FSR__GPIO1_5 */
[ 268 ] = IMX_PIN_REG ( MX35_PAD_FSR , 0x588 , 0x144 , 7 , 0x0 , 0 ) , /* MX35_PAD_FSR__ARM11P_TOP_EVNTBUS_11 */
[ 269 ] = IMX_PIN_REG ( MX35_PAD_HCKR , 0x58c , 0x148 , 0 , 0x0 , 0 ) , /* MX35_PAD_HCKR__ESAI_HCKR */
[ 270 ] = IMX_PIN_REG ( MX35_PAD_HCKR , 0x58c , 0x148 , 1 , 0x0 , 0 ) , /* MX35_PAD_HCKR__AUDMUX_AUD5_RXFS */
[ 271 ] = IMX_PIN_REG ( MX35_PAD_HCKR , 0x58c , 0x148 , 2 , 0x7f0 , 0 ) , /* MX35_PAD_HCKR__CSPI2_SS0 */
[ 272 ] = IMX_PIN_REG ( MX35_PAD_HCKR , 0x58c , 0x148 , 3 , 0x0 , 0 ) , /* MX35_PAD_HCKR__IPU_FLASH_STROBE */
[ 273 ] = IMX_PIN_REG ( MX35_PAD_HCKR , 0x58c , 0x148 , 5 , 0x858 , 1 ) , /* MX35_PAD_HCKR__GPIO1_6 */
[ 274 ] = IMX_PIN_REG ( MX35_PAD_HCKR , 0x58c , 0x148 , 7 , 0x0 , 0 ) , /* MX35_PAD_HCKR__ARM11P_TOP_EVNTBUS_12 */
[ 275 ] = IMX_PIN_REG ( MX35_PAD_SCKT , 0x590 , 0x14c , 0 , 0x0 , 0 ) , /* MX35_PAD_SCKT__ESAI_SCKT */
[ 276 ] = IMX_PIN_REG ( MX35_PAD_SCKT , 0x590 , 0x14c , 5 , 0x85c , 1 ) , /* MX35_PAD_SCKT__GPIO1_7 */
[ 277 ] = IMX_PIN_REG ( MX35_PAD_SCKT , 0x590 , 0x14c , 6 , 0x930 , 0 ) , /* MX35_PAD_SCKT__IPU_CSI_D_0 */
[ 278 ] = IMX_PIN_REG ( MX35_PAD_SCKT , 0x590 , 0x14c , 7 , 0x978 , 1 ) , /* MX35_PAD_SCKT__KPP_ROW_2 */
[ 279 ] = IMX_PIN_REG ( MX35_PAD_FST , 0x594 , 0x150 , 0 , 0x0 , 0 ) , /* MX35_PAD_FST__ESAI_FST */
[ 280 ] = IMX_PIN_REG ( MX35_PAD_FST , 0x594 , 0x150 , 5 , 0x860 , 1 ) , /* MX35_PAD_FST__GPIO1_8 */
[ 281 ] = IMX_PIN_REG ( MX35_PAD_FST , 0x594 , 0x150 , 6 , 0x934 , 0 ) , /* MX35_PAD_FST__IPU_CSI_D_1 */
[ 282 ] = IMX_PIN_REG ( MX35_PAD_FST , 0x594 , 0x150 , 7 , 0x97c , 1 ) , /* MX35_PAD_FST__KPP_ROW_3 */
[ 283 ] = IMX_PIN_REG ( MX35_PAD_HCKT , 0x598 , 0x154 , 0 , 0x0 , 0 ) , /* MX35_PAD_HCKT__ESAI_HCKT */
[ 284 ] = IMX_PIN_REG ( MX35_PAD_HCKT , 0x598 , 0x154 , 1 , 0x7a8 , 0 ) , /* MX35_PAD_HCKT__AUDMUX_AUD5_RXC */
[ 285 ] = IMX_PIN_REG ( MX35_PAD_HCKT , 0x598 , 0x154 , 5 , 0x864 , 0 ) , /* MX35_PAD_HCKT__GPIO1_9 */
[ 286 ] = IMX_PIN_REG ( MX35_PAD_HCKT , 0x598 , 0x154 , 6 , 0x938 , 0 ) , /* MX35_PAD_HCKT__IPU_CSI_D_2 */
[ 287 ] = IMX_PIN_REG ( MX35_PAD_HCKT , 0x598 , 0x154 , 7 , 0x95c , 1 ) , /* MX35_PAD_HCKT__KPP_COL_3 */
[ 288 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 0 , 0x0 , 0 ) , /* MX35_PAD_TX5_RX0__ESAI_TX5_RX0 */
[ 289 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 1 , 0x0 , 0 ) , /* MX35_PAD_TX5_RX0__AUDMUX_AUD4_RXC */
[ 290 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 2 , 0x7f8 , 1 ) , /* MX35_PAD_TX5_RX0__CSPI2_SS2 */
[ 291 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 3 , 0x0 , 0 ) , /* MX35_PAD_TX5_RX0__CAN2_TXCAN */
[ 292 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 4 , 0x0 , 0 ) , /* MX35_PAD_TX5_RX0__UART2_DTR */
[ 293 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 5 , 0x830 , 0 ) , /* MX35_PAD_TX5_RX0__GPIO1_10 */
[ 294 ] = IMX_PIN_REG ( MX35_PAD_TX5_RX0 , 0x59c , 0x158 , 7 , 0x0 , 0 ) , /* MX35_PAD_TX5_RX0__EMI_M3IF_CHOSEN_MASTER_0 */
[ 295 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 0 , 0x0 , 0 ) , /* MX35_PAD_TX4_RX1__ESAI_TX4_RX1 */
[ 296 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 1 , 0x0 , 0 ) , /* MX35_PAD_TX4_RX1__AUDMUX_AUD4_RXFS */
[ 297 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 2 , 0x7fc , 0 ) , /* MX35_PAD_TX4_RX1__CSPI2_SS3 */
[ 298 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 3 , 0x7cc , 0 ) , /* MX35_PAD_TX4_RX1__CAN2_RXCAN */
[ 299 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 4 , 0x0 , 0 ) , /* MX35_PAD_TX4_RX1__UART2_DSR */
[ 300 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 5 , 0x834 , 0 ) , /* MX35_PAD_TX4_RX1__GPIO1_11 */
[ 301 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 6 , 0x93c , 0 ) , /* MX35_PAD_TX4_RX1__IPU_CSI_D_3 */
[ 302 ] = IMX_PIN_REG ( MX35_PAD_TX4_RX1 , 0x5a0 , 0x15c , 7 , 0x970 , 1 ) , /* MX35_PAD_TX4_RX1__KPP_ROW_0 */
[ 303 ] = IMX_PIN_REG ( MX35_PAD_TX3_RX2 , 0x5a4 , 0x160 , 0 , 0x0 , 0 ) , /* MX35_PAD_TX3_RX2__ESAI_TX3_RX2 */
[ 304 ] = IMX_PIN_REG ( MX35_PAD_TX3_RX2 , 0x5a4 , 0x160 , 1 , 0x91c , 0 ) , /* MX35_PAD_TX3_RX2__I2C3_SCL */
[ 305 ] = IMX_PIN_REG ( MX35_PAD_TX3_RX2 , 0x5a4 , 0x160 , 3 , 0x0 , 0 ) , /* MX35_PAD_TX3_RX2__EMI_NANDF_CE1 */
[ 306 ] = IMX_PIN_REG ( MX35_PAD_TX3_RX2 , 0x5a4 , 0x160 , 5 , 0x0 , 0 ) , /* MX35_PAD_TX3_RX2__GPIO1_12 */
[ 307 ] = IMX_PIN_REG ( MX35_PAD_TX3_RX2 , 0x5a4 , 0x160 , 6 , 0x940 , 0 ) , /* MX35_PAD_TX3_RX2__IPU_CSI_D_4 */
[ 308 ] = IMX_PIN_REG ( MX35_PAD_TX3_RX2 , 0x5a4 , 0x160 , 7 , 0x974 , 1 ) , /* MX35_PAD_TX3_RX2__KPP_ROW_1 */
[ 309 ] = IMX_PIN_REG ( MX35_PAD_TX2_RX3 , 0x5a8 , 0x164 , 0 , 0x0 , 0 ) , /* MX35_PAD_TX2_RX3__ESAI_TX2_RX3 */
[ 310 ] = IMX_PIN_REG ( MX35_PAD_TX2_RX3 , 0x5a8 , 0x164 , 1 , 0x920 , 0 ) , /* MX35_PAD_TX2_RX3__I2C3_SDA */
[ 311 ] = IMX_PIN_REG ( MX35_PAD_TX2_RX3 , 0x5a8 , 0x164 , 3 , 0x0 , 0 ) , /* MX35_PAD_TX2_RX3__EMI_NANDF_CE2 */
[ 312 ] = IMX_PIN_REG ( MX35_PAD_TX2_RX3 , 0x5a8 , 0x164 , 5 , 0x0 , 0 ) , /* MX35_PAD_TX2_RX3__GPIO1_13 */
[ 313 ] = IMX_PIN_REG ( MX35_PAD_TX2_RX3 , 0x5a8 , 0x164 , 6 , 0x944 , 0 ) , /* MX35_PAD_TX2_RX3__IPU_CSI_D_5 */
[ 314 ] = IMX_PIN_REG ( MX35_PAD_TX2_RX3 , 0x5a8 , 0x164 , 7 , 0x950 , 1 ) , /* MX35_PAD_TX2_RX3__KPP_COL_0 */
[ 315 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 0 , 0x0 , 0 ) , /* MX35_PAD_TX1__ESAI_TX1 */
[ 316 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 1 , 0x7d4 , 1 ) , /* MX35_PAD_TX1__CCM_PMIC_RDY */
[ 317 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 2 , 0x7d8 , 2 ) , /* MX35_PAD_TX1__CSPI1_SS2 */
[ 318 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 3 , 0x0 , 0 ) , /* MX35_PAD_TX1__EMI_NANDF_CE3 */
[ 319 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 4 , 0x0 , 0 ) , /* MX35_PAD_TX1__UART2_RI */
[ 320 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 5 , 0x0 , 0 ) , /* MX35_PAD_TX1__GPIO1_14 */
[ 321 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 6 , 0x948 , 0 ) , /* MX35_PAD_TX1__IPU_CSI_D_6 */
[ 322 ] = IMX_PIN_REG ( MX35_PAD_TX1 , 0x5ac , 0x168 , 7 , 0x954 , 1 ) , /* MX35_PAD_TX1__KPP_COL_1 */
[ 323 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 0 , 0x0 , 0 ) , /* MX35_PAD_TX0__ESAI_TX0 */
[ 324 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 1 , 0x994 , 1 ) , /* MX35_PAD_TX0__SPDIF_SPDIF_EXTCLK */
[ 325 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 2 , 0x7dc , 0 ) , /* MX35_PAD_TX0__CSPI1_SS3 */
[ 326 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 3 , 0x800 , 1 ) , /* MX35_PAD_TX0__EMI_DTACK_B */
[ 327 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 4 , 0x0 , 0 ) , /* MX35_PAD_TX0__UART2_DCD */
[ 328 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 5 , 0x0 , 0 ) , /* MX35_PAD_TX0__GPIO1_15 */
[ 329 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 6 , 0x94c , 0 ) , /* MX35_PAD_TX0__IPU_CSI_D_7 */
[ 330 ] = IMX_PIN_REG ( MX35_PAD_TX0 , 0x5b0 , 0x16c , 7 , 0x958 , 1 ) , /* MX35_PAD_TX0__KPP_COL_2 */
[ 331 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_MOSI , 0x5b4 , 0x170 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_MOSI__CSPI1_MOSI */
[ 332 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_MOSI , 0x5b4 , 0x170 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_MOSI__GPIO1_16 */
[ 333 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_MOSI , 0x5b4 , 0x170 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_MOSI__ECT_CTI_TRIG_OUT1_2 */
[ 334 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_MISO , 0x5b8 , 0x174 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_MISO__CSPI1_MISO */
[ 335 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_MISO , 0x5b8 , 0x174 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_MISO__GPIO1_17 */
[ 336 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_MISO , 0x5b8 , 0x174 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_MISO__ECT_CTI_TRIG_OUT1_3 */
[ 337 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS0 , 0x5bc , 0x178 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS0__CSPI1_SS0 */
[ 338 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS0 , 0x5bc , 0x178 , 1 , 0x990 , 1 ) , /* MX35_PAD_CSPI1_SS0__OWIRE_LINE */
[ 339 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS0 , 0x5bc , 0x178 , 2 , 0x7fc , 1 ) , /* MX35_PAD_CSPI1_SS0__CSPI2_SS3 */
[ 340 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS0 , 0x5bc , 0x178 , 5 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS0__GPIO1_18 */
[ 341 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS0 , 0x5bc , 0x178 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS0__ECT_CTI_TRIG_OUT1_4 */
[ 342 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS1 , 0x5c0 , 0x17c , 0 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS1__CSPI1_SS1 */
[ 343 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS1 , 0x5c0 , 0x17c , 1 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS1__PWM_PWMO */
[ 344 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS1 , 0x5c0 , 0x17c , 2 , 0x7d0 , 1 ) , /* MX35_PAD_CSPI1_SS1__CCM_CLK32K */
[ 345 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS1 , 0x5c0 , 0x17c , 5 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS1__GPIO1_19 */
[ 346 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS1 , 0x5c0 , 0x17c , 6 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS1__IPU_DIAGB_29 */
[ 347 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SS1 , 0x5c0 , 0x17c , 7 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SS1__ECT_CTI_TRIG_OUT1_5 */
[ 348 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SCLK , 0x5c4 , 0x180 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SCLK__CSPI1_SCLK */
[ 349 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SCLK , 0x5c4 , 0x180 , 5 , 0x904 , 0 ) , /* MX35_PAD_CSPI1_SCLK__GPIO3_4 */
[ 350 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SCLK , 0x5c4 , 0x180 , 6 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SCLK__IPU_DIAGB_30 */
[ 351 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SCLK , 0x5c4 , 0x180 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SCLK__EMI_M3IF_CHOSEN_MASTER_1 */
[ 352 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SPI_RDY , 0x5c8 , 0x184 , 0 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY */
[ 353 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SPI_RDY , 0x5c8 , 0x184 , 5 , 0x908 , 0 ) , /* MX35_PAD_CSPI1_SPI_RDY__GPIO3_5 */
[ 354 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SPI_RDY , 0x5c8 , 0x184 , 6 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SPI_RDY__IPU_DIAGB_31 */
[ 355 ] = IMX_PIN_REG ( MX35_PAD_CSPI1_SPI_RDY , 0x5c8 , 0x184 , 7 , 0x0 , 0 ) , /* MX35_PAD_CSPI1_SPI_RDY__EMI_M3IF_CHOSEN_MASTER_2 */
[ 356 ] = IMX_PIN_REG ( MX35_PAD_RXD1 , 0x5cc , 0x188 , 0 , 0x0 , 0 ) , /* MX35_PAD_RXD1__UART1_RXD_MUX */
[ 357 ] = IMX_PIN_REG ( MX35_PAD_RXD1 , 0x5cc , 0x188 , 1 , 0x7ec , 1 ) , /* MX35_PAD_RXD1__CSPI2_MOSI */
[ 358 ] = IMX_PIN_REG ( MX35_PAD_RXD1 , 0x5cc , 0x188 , 4 , 0x960 , 0 ) , /* MX35_PAD_RXD1__KPP_COL_4 */
[ 359 ] = IMX_PIN_REG ( MX35_PAD_RXD1 , 0x5cc , 0x188 , 5 , 0x90c , 0 ) , /* MX35_PAD_RXD1__GPIO3_6 */
[ 360 ] = IMX_PIN_REG ( MX35_PAD_RXD1 , 0x5cc , 0x188 , 7 , 0x0 , 0 ) , /* MX35_PAD_RXD1__ARM11P_TOP_EVNTBUS_16 */
[ 361 ] = IMX_PIN_REG ( MX35_PAD_TXD1 , 0x5d0 , 0x18c , 0 , 0x0 , 0 ) , /* MX35_PAD_TXD1__UART1_TXD_MUX */
[ 362 ] = IMX_PIN_REG ( MX35_PAD_TXD1 , 0x5d0 , 0x18c , 1 , 0x7e8 , 1 ) , /* MX35_PAD_TXD1__CSPI2_MISO */
[ 363 ] = IMX_PIN_REG ( MX35_PAD_TXD1 , 0x5d0 , 0x18c , 4 , 0x964 , 0 ) , /* MX35_PAD_TXD1__KPP_COL_5 */
[ 364 ] = IMX_PIN_REG ( MX35_PAD_TXD1 , 0x5d0 , 0x18c , 5 , 0x910 , 0 ) , /* MX35_PAD_TXD1__GPIO3_7 */
[ 365 ] = IMX_PIN_REG ( MX35_PAD_TXD1 , 0x5d0 , 0x18c , 7 , 0x0 , 0 ) , /* MX35_PAD_TXD1__ARM11P_TOP_EVNTBUS_17 */
[ 366 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 0 , 0x0 , 0 ) , /* MX35_PAD_RTS1__UART1_RTS */
[ 367 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 1 , 0x7e0 , 1 ) , /* MX35_PAD_RTS1__CSPI2_SCLK */
[ 368 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 2 , 0x91c , 1 ) , /* MX35_PAD_RTS1__I2C3_SCL */
[ 369 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 3 , 0x930 , 1 ) , /* MX35_PAD_RTS1__IPU_CSI_D_0 */
[ 370 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 4 , 0x968 , 0 ) , /* MX35_PAD_RTS1__KPP_COL_6 */
[ 371 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 5 , 0x914 , 0 ) , /* MX35_PAD_RTS1__GPIO3_8 */
[ 372 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 6 , 0x0 , 0 ) , /* MX35_PAD_RTS1__EMI_NANDF_CE1 */
[ 373 ] = IMX_PIN_REG ( MX35_PAD_RTS1 , 0x5d4 , 0x190 , 7 , 0x0 , 0 ) , /* MX35_PAD_RTS1__ARM11P_TOP_EVNTBUS_18 */
[ 374 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 0 , 0x0 , 0 ) , /* MX35_PAD_CTS1__UART1_CTS */
[ 375 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 1 , 0x7e4 , 1 ) , /* MX35_PAD_CTS1__CSPI2_RDY */
[ 376 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 2 , 0x920 , 1 ) , /* MX35_PAD_CTS1__I2C3_SDA */
[ 377 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 3 , 0x934 , 1 ) , /* MX35_PAD_CTS1__IPU_CSI_D_1 */
[ 378 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 4 , 0x96c , 0 ) , /* MX35_PAD_CTS1__KPP_COL_7 */
[ 379 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 5 , 0x918 , 0 ) , /* MX35_PAD_CTS1__GPIO3_9 */
[ 380 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 6 , 0x0 , 0 ) , /* MX35_PAD_CTS1__EMI_NANDF_CE2 */
[ 381 ] = IMX_PIN_REG ( MX35_PAD_CTS1 , 0x5d8 , 0x194 , 7 , 0x0 , 0 ) , /* MX35_PAD_CTS1__ARM11P_TOP_EVNTBUS_19 */
[ 382 ] = IMX_PIN_REG ( MX35_PAD_RXD2 , 0x5dc , 0x198 , 0 , 0x0 , 0 ) , /* MX35_PAD_RXD2__UART2_RXD_MUX */
[ 383 ] = IMX_PIN_REG ( MX35_PAD_RXD2 , 0x5dc , 0x198 , 4 , 0x980 , 0 ) , /* MX35_PAD_RXD2__KPP_ROW_4 */
[ 384 ] = IMX_PIN_REG ( MX35_PAD_RXD2 , 0x5dc , 0x198 , 5 , 0x8ec , 0 ) , /* MX35_PAD_RXD2__GPIO3_10 */
[ 385 ] = IMX_PIN_REG ( MX35_PAD_TXD2 , 0x5e0 , 0x19c , 0 , 0x0 , 0 ) , /* MX35_PAD_TXD2__UART2_TXD_MUX */
[ 386 ] = IMX_PIN_REG ( MX35_PAD_TXD2 , 0x5e0 , 0x19c , 1 , 0x994 , 2 ) , /* MX35_PAD_TXD2__SPDIF_SPDIF_EXTCLK */
[ 387 ] = IMX_PIN_REG ( MX35_PAD_TXD2 , 0x5e0 , 0x19c , 4 , 0x984 , 0 ) , /* MX35_PAD_TXD2__KPP_ROW_5 */
[ 388 ] = IMX_PIN_REG ( MX35_PAD_TXD2 , 0x5e0 , 0x19c , 5 , 0x8f0 , 0 ) , /* MX35_PAD_TXD2__GPIO3_11 */
[ 389 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 0 , 0x0 , 0 ) , /* MX35_PAD_RTS2__UART2_RTS */
[ 390 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 1 , 0x998 , 1 ) , /* MX35_PAD_RTS2__SPDIF_SPDIF_IN1 */
[ 391 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 2 , 0x7cc , 1 ) , /* MX35_PAD_RTS2__CAN2_RXCAN */
[ 392 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 3 , 0x938 , 1 ) , /* MX35_PAD_RTS2__IPU_CSI_D_2 */
[ 393 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 4 , 0x988 , 0 ) , /* MX35_PAD_RTS2__KPP_ROW_6 */
[ 394 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 5 , 0x8f4 , 0 ) , /* MX35_PAD_RTS2__GPIO3_12 */
[ 395 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 6 , 0x0 , 0 ) , /* MX35_PAD_RTS2__AUDMUX_AUD5_RXC */
[ 396 ] = IMX_PIN_REG ( MX35_PAD_RTS2 , 0x5e4 , 0x1a0 , 7 , 0x9a0 , 0 ) , /* MX35_PAD_RTS2__UART3_RXD_MUX */
[ 397 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 0 , 0x0 , 0 ) , /* MX35_PAD_CTS2__UART2_CTS */
[ 398 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 1 , 0x0 , 0 ) , /* MX35_PAD_CTS2__SPDIF_SPDIF_OUT1 */
[ 399 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 2 , 0x0 , 0 ) , /* MX35_PAD_CTS2__CAN2_TXCAN */
[ 400 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 3 , 0x93c , 1 ) , /* MX35_PAD_CTS2__IPU_CSI_D_3 */
[ 401 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 4 , 0x98c , 0 ) , /* MX35_PAD_CTS2__KPP_ROW_7 */
[ 402 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 5 , 0x8f8 , 0 ) , /* MX35_PAD_CTS2__GPIO3_13 */
[ 403 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 6 , 0x0 , 0 ) , /* MX35_PAD_CTS2__AUDMUX_AUD5_RXFS */
[ 404 ] = IMX_PIN_REG ( MX35_PAD_CTS2 , 0x5e8 , 0x1a4 , 7 , 0x0 , 0 ) , /* MX35_PAD_CTS2__UART3_TXD_MUX */
[ 405 ] = IMX_PIN_REG ( MX35_PAD_RTCK , 0x5ec , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_RTCK__ARM11P_TOP_RTCK */
[ 406 ] = IMX_PIN_REG ( MX35_PAD_TCK , 0x5f0 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_TCK__SJC_TCK */
[ 407 ] = IMX_PIN_REG ( MX35_PAD_TMS , 0x5f4 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_TMS__SJC_TMS */
[ 408 ] = IMX_PIN_REG ( MX35_PAD_TDI , 0x5f8 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_TDI__SJC_TDI */
[ 409 ] = IMX_PIN_REG ( MX35_PAD_TDO , 0x5fc , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_TDO__SJC_TDO */
[ 410 ] = IMX_PIN_REG ( MX35_PAD_TRSTB , 0x600 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_TRSTB__SJC_TRSTB */
[ 411 ] = IMX_PIN_REG ( MX35_PAD_DE_B , 0x604 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_DE_B__SJC_DE_B */
[ 412 ] = IMX_PIN_REG ( MX35_PAD_SJC_MOD , 0x608 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_SJC_MOD__SJC_MOD */
[ 413 ] = IMX_PIN_REG ( MX35_PAD_USBOTG_PWR , 0x60c , 0x1a8 , 0 , 0x0 , 0 ) , /* MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR */
[ 414 ] = IMX_PIN_REG ( MX35_PAD_USBOTG_PWR , 0x60c , 0x1a8 , 1 , 0x0 , 0 ) , /* MX35_PAD_USBOTG_PWR__USB_TOP_USBH2_PWR */
[ 415 ] = IMX_PIN_REG ( MX35_PAD_USBOTG_PWR , 0x60c , 0x1a8 , 5 , 0x8fc , 0 ) , /* MX35_PAD_USBOTG_PWR__GPIO3_14 */
[ 416 ] = IMX_PIN_REG ( MX35_PAD_USBOTG_OC , 0x610 , 0x1ac , 0 , 0x0 , 0 ) , /* MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC */
[ 417 ] = IMX_PIN_REG ( MX35_PAD_USBOTG_OC , 0x610 , 0x1ac , 1 , 0x9f4 , 1 ) , /* MX35_PAD_USBOTG_OC__USB_TOP_USBH2_OC */
[ 418 ] = IMX_PIN_REG ( MX35_PAD_USBOTG_OC , 0x610 , 0x1ac , 5 , 0x900 , 0 ) , /* MX35_PAD_USBOTG_OC__GPIO3_15 */
[ 419 ] = IMX_PIN_REG ( MX35_PAD_LD0 , 0x614 , 0x1b0 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD0__IPU_DISPB_DAT_0 */
[ 420 ] = IMX_PIN_REG ( MX35_PAD_LD0 , 0x614 , 0x1b0 , 5 , 0x868 , 1 ) , /* MX35_PAD_LD0__GPIO2_0 */
[ 421 ] = IMX_PIN_REG ( MX35_PAD_LD0 , 0x614 , 0x1b0 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD0__SDMA_SDMA_DEBUG_PC_0 */
[ 422 ] = IMX_PIN_REG ( MX35_PAD_LD1 , 0x618 , 0x1b4 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD1__IPU_DISPB_DAT_1 */
[ 423 ] = IMX_PIN_REG ( MX35_PAD_LD1 , 0x618 , 0x1b4 , 5 , 0x894 , 0 ) , /* MX35_PAD_LD1__GPIO2_1 */
[ 424 ] = IMX_PIN_REG ( MX35_PAD_LD1 , 0x618 , 0x1b4 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD1__SDMA_SDMA_DEBUG_PC_1 */
[ 425 ] = IMX_PIN_REG ( MX35_PAD_LD2 , 0x61c , 0x1b8 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD2__IPU_DISPB_DAT_2 */
[ 426 ] = IMX_PIN_REG ( MX35_PAD_LD2 , 0x61c , 0x1b8 , 5 , 0x8c0 , 0 ) , /* MX35_PAD_LD2__GPIO2_2 */
[ 427 ] = IMX_PIN_REG ( MX35_PAD_LD2 , 0x61c , 0x1b8 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD2__SDMA_SDMA_DEBUG_PC_2 */
[ 428 ] = IMX_PIN_REG ( MX35_PAD_LD3 , 0x620 , 0x1bc , 0 , 0x0 , 0 ) , /* MX35_PAD_LD3__IPU_DISPB_DAT_3 */
[ 429 ] = IMX_PIN_REG ( MX35_PAD_LD3 , 0x620 , 0x1bc , 5 , 0x8cc , 0 ) , /* MX35_PAD_LD3__GPIO2_3 */
[ 430 ] = IMX_PIN_REG ( MX35_PAD_LD3 , 0x620 , 0x1bc , 6 , 0x0 , 0 ) , /* MX35_PAD_LD3__SDMA_SDMA_DEBUG_PC_3 */
[ 431 ] = IMX_PIN_REG ( MX35_PAD_LD4 , 0x624 , 0x1c0 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD4__IPU_DISPB_DAT_4 */
[ 432 ] = IMX_PIN_REG ( MX35_PAD_LD4 , 0x624 , 0x1c0 , 5 , 0x8d0 , 0 ) , /* MX35_PAD_LD4__GPIO2_4 */
[ 433 ] = IMX_PIN_REG ( MX35_PAD_LD4 , 0x624 , 0x1c0 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD4__SDMA_SDMA_DEBUG_PC_4 */
[ 434 ] = IMX_PIN_REG ( MX35_PAD_LD5 , 0x628 , 0x1c4 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD5__IPU_DISPB_DAT_5 */
[ 435 ] = IMX_PIN_REG ( MX35_PAD_LD5 , 0x628 , 0x1c4 , 5 , 0x8d4 , 0 ) , /* MX35_PAD_LD5__GPIO2_5 */
[ 436 ] = IMX_PIN_REG ( MX35_PAD_LD5 , 0x628 , 0x1c4 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD5__SDMA_SDMA_DEBUG_PC_5 */
[ 437 ] = IMX_PIN_REG ( MX35_PAD_LD6 , 0x62c , 0x1c8 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD6__IPU_DISPB_DAT_6 */
[ 438 ] = IMX_PIN_REG ( MX35_PAD_LD6 , 0x62c , 0x1c8 , 5 , 0x8d8 , 0 ) , /* MX35_PAD_LD6__GPIO2_6 */
[ 439 ] = IMX_PIN_REG ( MX35_PAD_LD6 , 0x62c , 0x1c8 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD6__SDMA_SDMA_DEBUG_PC_6 */
[ 440 ] = IMX_PIN_REG ( MX35_PAD_LD7 , 0x630 , 0x1cc , 0 , 0x0 , 0 ) , /* MX35_PAD_LD7__IPU_DISPB_DAT_7 */
[ 441 ] = IMX_PIN_REG ( MX35_PAD_LD7 , 0x630 , 0x1cc , 5 , 0x8dc , 0 ) , /* MX35_PAD_LD7__GPIO2_7 */
[ 442 ] = IMX_PIN_REG ( MX35_PAD_LD7 , 0x630 , 0x1cc , 6 , 0x0 , 0 ) , /* MX35_PAD_LD7__SDMA_SDMA_DEBUG_PC_7 */
[ 443 ] = IMX_PIN_REG ( MX35_PAD_LD8 , 0x634 , 0x1d0 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD8__IPU_DISPB_DAT_8 */
[ 444 ] = IMX_PIN_REG ( MX35_PAD_LD8 , 0x634 , 0x1d0 , 5 , 0x8e0 , 0 ) , /* MX35_PAD_LD8__GPIO2_8 */
[ 445 ] = IMX_PIN_REG ( MX35_PAD_LD8 , 0x634 , 0x1d0 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 */
[ 446 ] = IMX_PIN_REG ( MX35_PAD_LD9 , 0x638 , 0x1d4 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD9__IPU_DISPB_DAT_9 */
[ 447 ] = IMX_PIN_REG ( MX35_PAD_LD9 , 0x638 , 0x1d4 , 5 , 0x8e4 , 0 ) , /* MX35_PAD_LD9__GPIO2_9 */
[ 448 ] = IMX_PIN_REG ( MX35_PAD_LD9 , 0x638 , 0x1d4 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 */
[ 449 ] = IMX_PIN_REG ( MX35_PAD_LD10 , 0x63c , 0x1d8 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD10__IPU_DISPB_DAT_10 */
[ 450 ] = IMX_PIN_REG ( MX35_PAD_LD10 , 0x63c , 0x1d8 , 5 , 0x86c , 0 ) , /* MX35_PAD_LD10__GPIO2_10 */
[ 451 ] = IMX_PIN_REG ( MX35_PAD_LD10 , 0x63c , 0x1d8 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD10__SDMA_SDMA_DEBUG_PC_10 */
[ 452 ] = IMX_PIN_REG ( MX35_PAD_LD11 , 0x640 , 0x1dc , 0 , 0x0 , 0 ) , /* MX35_PAD_LD11__IPU_DISPB_DAT_11 */
[ 453 ] = IMX_PIN_REG ( MX35_PAD_LD11 , 0x640 , 0x1dc , 5 , 0x870 , 0 ) , /* MX35_PAD_LD11__GPIO2_11 */
[ 454 ] = IMX_PIN_REG ( MX35_PAD_LD11 , 0x640 , 0x1dc , 6 , 0x0 , 0 ) , /* MX35_PAD_LD11__SDMA_SDMA_DEBUG_PC_11 */
[ 455 ] = IMX_PIN_REG ( MX35_PAD_LD11 , 0x640 , 0x1dc , 7 , 0x0 , 0 ) , /* MX35_PAD_LD11__ARM11P_TOP_TRACE_4 */
[ 456 ] = IMX_PIN_REG ( MX35_PAD_LD12 , 0x644 , 0x1e0 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD12__IPU_DISPB_DAT_12 */
[ 457 ] = IMX_PIN_REG ( MX35_PAD_LD12 , 0x644 , 0x1e0 , 5 , 0x874 , 0 ) , /* MX35_PAD_LD12__GPIO2_12 */
[ 458 ] = IMX_PIN_REG ( MX35_PAD_LD12 , 0x644 , 0x1e0 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD12__SDMA_SDMA_DEBUG_PC_12 */
[ 459 ] = IMX_PIN_REG ( MX35_PAD_LD12 , 0x644 , 0x1e0 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD12__ARM11P_TOP_TRACE_5 */
[ 460 ] = IMX_PIN_REG ( MX35_PAD_LD13 , 0x648 , 0x1e4 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD13__IPU_DISPB_DAT_13 */
[ 461 ] = IMX_PIN_REG ( MX35_PAD_LD13 , 0x648 , 0x1e4 , 5 , 0x878 , 0 ) , /* MX35_PAD_LD13__GPIO2_13 */
[ 462 ] = IMX_PIN_REG ( MX35_PAD_LD13 , 0x648 , 0x1e4 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD13__SDMA_SDMA_DEBUG_PC_13 */
[ 463 ] = IMX_PIN_REG ( MX35_PAD_LD13 , 0x648 , 0x1e4 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD13__ARM11P_TOP_TRACE_6 */
[ 464 ] = IMX_PIN_REG ( MX35_PAD_LD14 , 0x64c , 0x1e8 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD14__IPU_DISPB_DAT_14 */
[ 465 ] = IMX_PIN_REG ( MX35_PAD_LD14 , 0x64c , 0x1e8 , 5 , 0x87c , 0 ) , /* MX35_PAD_LD14__GPIO2_14 */
[ 466 ] = IMX_PIN_REG ( MX35_PAD_LD14 , 0x64c , 0x1e8 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD14__SDMA_SDMA_DEBUG_EVENT_CHANNEL_0 */
[ 467 ] = IMX_PIN_REG ( MX35_PAD_LD14 , 0x64c , 0x1e8 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD14__ARM11P_TOP_TRACE_7 */
[ 468 ] = IMX_PIN_REG ( MX35_PAD_LD15 , 0x650 , 0x1ec , 0 , 0x0 , 0 ) , /* MX35_PAD_LD15__IPU_DISPB_DAT_15 */
[ 469 ] = IMX_PIN_REG ( MX35_PAD_LD15 , 0x650 , 0x1ec , 5 , 0x880 , 0 ) , /* MX35_PAD_LD15__GPIO2_15 */
[ 470 ] = IMX_PIN_REG ( MX35_PAD_LD15 , 0x650 , 0x1ec , 6 , 0x0 , 0 ) , /* MX35_PAD_LD15__SDMA_SDMA_DEBUG_EVENT_CHANNEL_1 */
[ 471 ] = IMX_PIN_REG ( MX35_PAD_LD15 , 0x650 , 0x1ec , 7 , 0x0 , 0 ) , /* MX35_PAD_LD15__ARM11P_TOP_TRACE_8 */
[ 472 ] = IMX_PIN_REG ( MX35_PAD_LD16 , 0x654 , 0x1f0 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD16__IPU_DISPB_DAT_16 */
[ 473 ] = IMX_PIN_REG ( MX35_PAD_LD16 , 0x654 , 0x1f0 , 2 , 0x928 , 0 ) , /* MX35_PAD_LD16__IPU_DISPB_D12_VSYNC */
[ 474 ] = IMX_PIN_REG ( MX35_PAD_LD16 , 0x654 , 0x1f0 , 5 , 0x884 , 0 ) , /* MX35_PAD_LD16__GPIO2_16 */
[ 475 ] = IMX_PIN_REG ( MX35_PAD_LD16 , 0x654 , 0x1f0 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD16__SDMA_SDMA_DEBUG_EVENT_CHANNEL_2 */
[ 476 ] = IMX_PIN_REG ( MX35_PAD_LD16 , 0x654 , 0x1f0 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD16__ARM11P_TOP_TRACE_9 */
[ 477 ] = IMX_PIN_REG ( MX35_PAD_LD17 , 0x658 , 0x1f4 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD17__IPU_DISPB_DAT_17 */
[ 478 ] = IMX_PIN_REG ( MX35_PAD_LD17 , 0x658 , 0x1f4 , 2 , 0x0 , 0 ) , /* MX35_PAD_LD17__IPU_DISPB_CS2 */
[ 479 ] = IMX_PIN_REG ( MX35_PAD_LD17 , 0x658 , 0x1f4 , 5 , 0x888 , 0 ) , /* MX35_PAD_LD17__GPIO2_17 */
[ 480 ] = IMX_PIN_REG ( MX35_PAD_LD17 , 0x658 , 0x1f4 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD17__SDMA_SDMA_DEBUG_EVENT_CHANNEL_3 */
[ 481 ] = IMX_PIN_REG ( MX35_PAD_LD17 , 0x658 , 0x1f4 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD17__ARM11P_TOP_TRACE_10 */
[ 482 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD18__IPU_DISPB_DAT_18 */
[ 483 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 1 , 0x924 , 1 ) , /* MX35_PAD_LD18__IPU_DISPB_D0_VSYNC */
[ 484 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 2 , 0x928 , 1 ) , /* MX35_PAD_LD18__IPU_DISPB_D12_VSYNC */
[ 485 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 3 , 0x818 , 0 ) , /* MX35_PAD_LD18__ESDHC3_CMD */
[ 486 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 4 , 0x9b0 , 0 ) , /* MX35_PAD_LD18__USB_TOP_USBOTG_DATA_3 */
[ 487 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 5 , 0x0 , 0 ) , /* MX35_PAD_LD18__GPIO3_24 */
[ 488 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD18__SDMA_SDMA_DEBUG_EVENT_CHANNEL_4 */
[ 489 ] = IMX_PIN_REG ( MX35_PAD_LD18 , 0x65c , 0x1f8 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD18__ARM11P_TOP_TRACE_11 */
[ 490 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 0 , 0x0 , 0 ) , /* MX35_PAD_LD19__IPU_DISPB_DAT_19 */
[ 491 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 1 , 0x0 , 0 ) , /* MX35_PAD_LD19__IPU_DISPB_BCLK */
[ 492 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 2 , 0x0 , 0 ) , /* MX35_PAD_LD19__IPU_DISPB_CS1 */
[ 493 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 3 , 0x814 , 0 ) , /* MX35_PAD_LD19__ESDHC3_CLK */
[ 494 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 4 , 0x9c4 , 0 ) , /* MX35_PAD_LD19__USB_TOP_USBOTG_DIR */
[ 495 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 5 , 0x0 , 0 ) , /* MX35_PAD_LD19__GPIO3_25 */
[ 496 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 6 , 0x0 , 0 ) , /* MX35_PAD_LD19__SDMA_SDMA_DEBUG_EVENT_CHANNEL_5 */
[ 497 ] = IMX_PIN_REG ( MX35_PAD_LD19 , 0x660 , 0x1fc , 7 , 0x0 , 0 ) , /* MX35_PAD_LD19__ARM11P_TOP_TRACE_12 */
[ 498 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD20__IPU_DISPB_DAT_20 */
[ 499 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 1 , 0x0 , 0 ) , /* MX35_PAD_LD20__IPU_DISPB_CS0 */
[ 500 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 2 , 0x0 , 0 ) , /* MX35_PAD_LD20__IPU_DISPB_SD_CLK */
[ 501 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 3 , 0x81c , 0 ) , /* MX35_PAD_LD20__ESDHC3_DAT0 */
[ 502 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 5 , 0x0 , 0 ) , /* MX35_PAD_LD20__GPIO3_26 */
[ 503 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD20__SDMA_SDMA_DEBUG_CORE_STATUS_3 */
[ 504 ] = IMX_PIN_REG ( MX35_PAD_LD20 , 0x664 , 0x200 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD20__ARM11P_TOP_TRACE_13 */
[ 505 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD21__IPU_DISPB_DAT_21 */
[ 506 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 1 , 0x0 , 0 ) , /* MX35_PAD_LD21__IPU_DISPB_PAR_RS */
[ 507 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 2 , 0x0 , 0 ) , /* MX35_PAD_LD21__IPU_DISPB_SER_RS */
[ 508 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 3 , 0x820 , 0 ) , /* MX35_PAD_LD21__ESDHC3_DAT1 */
[ 509 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 4 , 0x0 , 0 ) , /* MX35_PAD_LD21__USB_TOP_USBOTG_STP */
[ 510 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 5 , 0x0 , 0 ) , /* MX35_PAD_LD21__GPIO3_27 */
[ 511 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD21__SDMA_DEBUG_EVENT_CHANNEL_SEL */
[ 512 ] = IMX_PIN_REG ( MX35_PAD_LD21 , 0x668 , 0x204 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD21__ARM11P_TOP_TRACE_14 */
[ 513 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 0 , 0x0 , 0 ) , /* MX35_PAD_LD22__IPU_DISPB_DAT_22 */
[ 514 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 1 , 0x0 , 0 ) , /* MX35_PAD_LD22__IPU_DISPB_WR */
[ 515 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 2 , 0x92c , 0 ) , /* MX35_PAD_LD22__IPU_DISPB_SD_D_I */
[ 516 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 3 , 0x824 , 0 ) , /* MX35_PAD_LD22__ESDHC3_DAT2 */
[ 517 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 4 , 0x9c8 , 0 ) , /* MX35_PAD_LD22__USB_TOP_USBOTG_NXT */
[ 518 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 5 , 0x0 , 0 ) , /* MX35_PAD_LD22__GPIO3_28 */
[ 519 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 6 , 0x0 , 0 ) , /* MX35_PAD_LD22__SDMA_DEBUG_BUS_ERROR */
[ 520 ] = IMX_PIN_REG ( MX35_PAD_LD22 , 0x66c , 0x208 , 7 , 0x0 , 0 ) , /* MX35_PAD_LD22__ARM11P_TOP_TRCTL */
[ 521 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 0 , 0x0 , 0 ) , /* MX35_PAD_LD23__IPU_DISPB_DAT_23 */
[ 522 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 1 , 0x0 , 0 ) , /* MX35_PAD_LD23__IPU_DISPB_RD */
[ 523 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 2 , 0x92c , 1 ) , /* MX35_PAD_LD23__IPU_DISPB_SD_D_IO */
[ 524 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 3 , 0x828 , 0 ) , /* MX35_PAD_LD23__ESDHC3_DAT3 */
[ 525 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 4 , 0x9c0 , 0 ) , /* MX35_PAD_LD23__USB_TOP_USBOTG_DATA_7 */
[ 526 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 5 , 0x0 , 0 ) , /* MX35_PAD_LD23__GPIO3_29 */
[ 527 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 6 , 0x0 , 0 ) , /* MX35_PAD_LD23__SDMA_DEBUG_MATCHED_DMBUS */
[ 528 ] = IMX_PIN_REG ( MX35_PAD_LD23 , 0x670 , 0x20c , 7 , 0x0 , 0 ) , /* MX35_PAD_LD23__ARM11P_TOP_TRCLK */
[ 529 ] = IMX_PIN_REG ( MX35_PAD_D3_HSYNC , 0x674 , 0x210 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC */
[ 530 ] = IMX_PIN_REG ( MX35_PAD_D3_HSYNC , 0x674 , 0x210 , 2 , 0x92c , 2 ) , /* MX35_PAD_D3_HSYNC__IPU_DISPB_SD_D_IO */
[ 531 ] = IMX_PIN_REG ( MX35_PAD_D3_HSYNC , 0x674 , 0x210 , 5 , 0x0 , 0 ) , /* MX35_PAD_D3_HSYNC__GPIO3_30 */
[ 532 ] = IMX_PIN_REG ( MX35_PAD_D3_HSYNC , 0x674 , 0x210 , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_HSYNC__SDMA_DEBUG_RTBUFFER_WRITE */
[ 533 ] = IMX_PIN_REG ( MX35_PAD_D3_HSYNC , 0x674 , 0x210 , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_HSYNC__ARM11P_TOP_TRACE_15 */
[ 534 ] = IMX_PIN_REG ( MX35_PAD_D3_FPSHIFT , 0x678 , 0x214 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK */
[ 535 ] = IMX_PIN_REG ( MX35_PAD_D3_FPSHIFT , 0x678 , 0x214 , 2 , 0x0 , 0 ) , /* MX35_PAD_D3_FPSHIFT__IPU_DISPB_SD_CLK */
[ 536 ] = IMX_PIN_REG ( MX35_PAD_D3_FPSHIFT , 0x678 , 0x214 , 5 , 0x0 , 0 ) , /* MX35_PAD_D3_FPSHIFT__GPIO3_31 */
[ 537 ] = IMX_PIN_REG ( MX35_PAD_D3_FPSHIFT , 0x678 , 0x214 , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_FPSHIFT__SDMA_SDMA_DEBUG_CORE_STATUS_0 */
[ 538 ] = IMX_PIN_REG ( MX35_PAD_D3_FPSHIFT , 0x678 , 0x214 , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_FPSHIFT__ARM11P_TOP_TRACE_16 */
[ 539 ] = IMX_PIN_REG ( MX35_PAD_D3_DRDY , 0x67c , 0x218 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY */
[ 540 ] = IMX_PIN_REG ( MX35_PAD_D3_DRDY , 0x67c , 0x218 , 2 , 0x0 , 0 ) , /* MX35_PAD_D3_DRDY__IPU_DISPB_SD_D_O */
[ 541 ] = IMX_PIN_REG ( MX35_PAD_D3_DRDY , 0x67c , 0x218 , 5 , 0x82c , 2 ) , /* MX35_PAD_D3_DRDY__GPIO1_0 */
[ 542 ] = IMX_PIN_REG ( MX35_PAD_D3_DRDY , 0x67c , 0x218 , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_DRDY__SDMA_SDMA_DEBUG_CORE_STATUS_1 */
[ 543 ] = IMX_PIN_REG ( MX35_PAD_D3_DRDY , 0x67c , 0x218 , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_DRDY__ARM11P_TOP_TRACE_17 */
[ 544 ] = IMX_PIN_REG ( MX35_PAD_CONTRAST , 0x680 , 0x21c , 0 , 0x0 , 0 ) , /* MX35_PAD_CONTRAST__IPU_DISPB_CONTR */
[ 545 ] = IMX_PIN_REG ( MX35_PAD_CONTRAST , 0x680 , 0x21c , 5 , 0x838 , 2 ) , /* MX35_PAD_CONTRAST__GPIO1_1 */
[ 546 ] = IMX_PIN_REG ( MX35_PAD_CONTRAST , 0x680 , 0x21c , 6 , 0x0 , 0 ) , /* MX35_PAD_CONTRAST__SDMA_SDMA_DEBUG_CORE_STATUS_2 */
[ 547 ] = IMX_PIN_REG ( MX35_PAD_CONTRAST , 0x680 , 0x21c , 7 , 0x0 , 0 ) , /* MX35_PAD_CONTRAST__ARM11P_TOP_TRACE_18 */
[ 548 ] = IMX_PIN_REG ( MX35_PAD_D3_VSYNC , 0x684 , 0x220 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC */
[ 549 ] = IMX_PIN_REG ( MX35_PAD_D3_VSYNC , 0x684 , 0x220 , 2 , 0x0 , 0 ) , /* MX35_PAD_D3_VSYNC__IPU_DISPB_CS1 */
[ 550 ] = IMX_PIN_REG ( MX35_PAD_D3_VSYNC , 0x684 , 0x220 , 5 , 0x848 , 1 ) , /* MX35_PAD_D3_VSYNC__GPIO1_2 */
[ 551 ] = IMX_PIN_REG ( MX35_PAD_D3_VSYNC , 0x684 , 0x220 , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_VSYNC__SDMA_DEBUG_YIELD */
[ 552 ] = IMX_PIN_REG ( MX35_PAD_D3_VSYNC , 0x684 , 0x220 , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_VSYNC__ARM11P_TOP_TRACE_19 */
[ 553 ] = IMX_PIN_REG ( MX35_PAD_D3_REV , 0x688 , 0x224 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_REV__IPU_DISPB_D3_REV */
[ 554 ] = IMX_PIN_REG ( MX35_PAD_D3_REV , 0x688 , 0x224 , 2 , 0x0 , 0 ) , /* MX35_PAD_D3_REV__IPU_DISPB_SER_RS */
[ 555 ] = IMX_PIN_REG ( MX35_PAD_D3_REV , 0x688 , 0x224 , 5 , 0x84c , 1 ) , /* MX35_PAD_D3_REV__GPIO1_3 */
[ 556 ] = IMX_PIN_REG ( MX35_PAD_D3_REV , 0x688 , 0x224 , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_REV__SDMA_DEBUG_BUS_RWB */
[ 557 ] = IMX_PIN_REG ( MX35_PAD_D3_REV , 0x688 , 0x224 , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_REV__ARM11P_TOP_TRACE_20 */
[ 558 ] = IMX_PIN_REG ( MX35_PAD_D3_CLS , 0x68c , 0x228 , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS */
[ 559 ] = IMX_PIN_REG ( MX35_PAD_D3_CLS , 0x68c , 0x228 , 2 , 0x0 , 0 ) , /* MX35_PAD_D3_CLS__IPU_DISPB_CS2 */
[ 560 ] = IMX_PIN_REG ( MX35_PAD_D3_CLS , 0x68c , 0x228 , 5 , 0x850 , 2 ) , /* MX35_PAD_D3_CLS__GPIO1_4 */
[ 561 ] = IMX_PIN_REG ( MX35_PAD_D3_CLS , 0x68c , 0x228 , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_CLS__SDMA_DEBUG_BUS_DEVICE_0 */
[ 562 ] = IMX_PIN_REG ( MX35_PAD_D3_CLS , 0x68c , 0x228 , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_CLS__ARM11P_TOP_TRACE_21 */
[ 563 ] = IMX_PIN_REG ( MX35_PAD_D3_SPL , 0x690 , 0x22c , 0 , 0x0 , 0 ) , /* MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL */
[ 564 ] = IMX_PIN_REG ( MX35_PAD_D3_SPL , 0x690 , 0x22c , 2 , 0x928 , 2 ) , /* MX35_PAD_D3_SPL__IPU_DISPB_D12_VSYNC */
[ 565 ] = IMX_PIN_REG ( MX35_PAD_D3_SPL , 0x690 , 0x22c , 5 , 0x854 , 2 ) , /* MX35_PAD_D3_SPL__GPIO1_5 */
[ 566 ] = IMX_PIN_REG ( MX35_PAD_D3_SPL , 0x690 , 0x22c , 6 , 0x0 , 0 ) , /* MX35_PAD_D3_SPL__SDMA_DEBUG_BUS_DEVICE_1 */
[ 567 ] = IMX_PIN_REG ( MX35_PAD_D3_SPL , 0x690 , 0x22c , 7 , 0x0 , 0 ) , /* MX35_PAD_D3_SPL__ARM11P_TOP_TRACE_22 */
[ 568 ] = IMX_PIN_REG ( MX35_PAD_SD1_CMD , 0x694 , 0x230 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1_CMD__ESDHC1_CMD */
[ 569 ] = IMX_PIN_REG ( MX35_PAD_SD1_CMD , 0x694 , 0x230 , 1 , 0x0 , 0 ) , /* MX35_PAD_SD1_CMD__MSHC_SCLK */
[ 570 ] = IMX_PIN_REG ( MX35_PAD_SD1_CMD , 0x694 , 0x230 , 3 , 0x924 , 2 ) , /* MX35_PAD_SD1_CMD__IPU_DISPB_D0_VSYNC */
[ 571 ] = IMX_PIN_REG ( MX35_PAD_SD1_CMD , 0x694 , 0x230 , 4 , 0x9b4 , 0 ) , /* MX35_PAD_SD1_CMD__USB_TOP_USBOTG_DATA_4 */
[ 572 ] = IMX_PIN_REG ( MX35_PAD_SD1_CMD , 0x694 , 0x230 , 5 , 0x858 , 2 ) , /* MX35_PAD_SD1_CMD__GPIO1_6 */
[ 573 ] = IMX_PIN_REG ( MX35_PAD_SD1_CMD , 0x694 , 0x230 , 7 , 0x0 , 0 ) , /* MX35_PAD_SD1_CMD__ARM11P_TOP_TRCTL */
[ 574 ] = IMX_PIN_REG ( MX35_PAD_SD1_CLK , 0x698 , 0x234 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1_CLK__ESDHC1_CLK */
[ 575 ] = IMX_PIN_REG ( MX35_PAD_SD1_CLK , 0x698 , 0x234 , 1 , 0x0 , 0 ) , /* MX35_PAD_SD1_CLK__MSHC_BS */
[ 576 ] = IMX_PIN_REG ( MX35_PAD_SD1_CLK , 0x698 , 0x234 , 3 , 0x0 , 0 ) , /* MX35_PAD_SD1_CLK__IPU_DISPB_BCLK */
[ 577 ] = IMX_PIN_REG ( MX35_PAD_SD1_CLK , 0x698 , 0x234 , 4 , 0x9b8 , 0 ) , /* MX35_PAD_SD1_CLK__USB_TOP_USBOTG_DATA_5 */
[ 578 ] = IMX_PIN_REG ( MX35_PAD_SD1_CLK , 0x698 , 0x234 , 5 , 0x85c , 2 ) , /* MX35_PAD_SD1_CLK__GPIO1_7 */
[ 579 ] = IMX_PIN_REG ( MX35_PAD_SD1_CLK , 0x698 , 0x234 , 7 , 0x0 , 0 ) , /* MX35_PAD_SD1_CLK__ARM11P_TOP_TRCLK */
[ 580 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA0 , 0x69c , 0x238 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA0__ESDHC1_DAT0 */
[ 581 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA0 , 0x69c , 0x238 , 1 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA0__MSHC_DATA_0 */
[ 582 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA0 , 0x69c , 0x238 , 3 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA0__IPU_DISPB_CS0 */
[ 583 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA0 , 0x69c , 0x238 , 4 , 0x9bc , 0 ) , /* MX35_PAD_SD1_DATA0__USB_TOP_USBOTG_DATA_6 */
[ 584 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA0 , 0x69c , 0x238 , 5 , 0x860 , 2 ) , /* MX35_PAD_SD1_DATA0__GPIO1_8 */
[ 585 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA0 , 0x69c , 0x238 , 7 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA0__ARM11P_TOP_TRACE_23 */
[ 586 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA1 , 0x6a0 , 0x23c , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA1__ESDHC1_DAT1 */
[ 587 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA1 , 0x6a0 , 0x23c , 1 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA1__MSHC_DATA_1 */
[ 588 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA1 , 0x6a0 , 0x23c , 3 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA1__IPU_DISPB_PAR_RS */
[ 589 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA1 , 0x6a0 , 0x23c , 4 , 0x9a4 , 0 ) , /* MX35_PAD_SD1_DATA1__USB_TOP_USBOTG_DATA_0 */
[ 590 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA1 , 0x6a0 , 0x23c , 5 , 0x864 , 1 ) , /* MX35_PAD_SD1_DATA1__GPIO1_9 */
[ 591 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA1 , 0x6a0 , 0x23c , 7 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA1__ARM11P_TOP_TRACE_24 */
[ 592 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA2 , 0x6a4 , 0x240 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA2__ESDHC1_DAT2 */
[ 593 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA2 , 0x6a4 , 0x240 , 1 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA2__MSHC_DATA_2 */
[ 594 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA2 , 0x6a4 , 0x240 , 3 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA2__IPU_DISPB_WR */
[ 595 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA2 , 0x6a4 , 0x240 , 4 , 0x9a8 , 0 ) , /* MX35_PAD_SD1_DATA2__USB_TOP_USBOTG_DATA_1 */
[ 596 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA2 , 0x6a4 , 0x240 , 5 , 0x830 , 1 ) , /* MX35_PAD_SD1_DATA2__GPIO1_10 */
[ 597 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA2 , 0x6a4 , 0x240 , 7 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA2__ARM11P_TOP_TRACE_25 */
[ 598 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA3 , 0x6a8 , 0x244 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA3__ESDHC1_DAT3 */
[ 599 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA3 , 0x6a8 , 0x244 , 1 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA3__MSHC_DATA_3 */
[ 600 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA3 , 0x6a8 , 0x244 , 3 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA3__IPU_DISPB_RD */
[ 601 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA3 , 0x6a8 , 0x244 , 4 , 0x9ac , 0 ) , /* MX35_PAD_SD1_DATA3__USB_TOP_USBOTG_DATA_2 */
[ 602 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA3 , 0x6a8 , 0x244 , 5 , 0x834 , 1 ) , /* MX35_PAD_SD1_DATA3__GPIO1_11 */
[ 603 ] = IMX_PIN_REG ( MX35_PAD_SD1_DATA3 , 0x6a8 , 0x244 , 7 , 0x0 , 0 ) , /* MX35_PAD_SD1_DATA3__ARM11P_TOP_TRACE_26 */
[ 604 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2_CMD__ESDHC2_CMD */
[ 605 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 1 , 0x91c , 2 ) , /* MX35_PAD_SD2_CMD__I2C3_SCL */
[ 606 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 2 , 0x804 , 0 ) , /* MX35_PAD_SD2_CMD__ESDHC1_DAT4 */
[ 607 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 3 , 0x938 , 2 ) , /* MX35_PAD_SD2_CMD__IPU_CSI_D_2 */
[ 608 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 4 , 0x9dc , 0 ) , /* MX35_PAD_SD2_CMD__USB_TOP_USBH2_DATA_4 */
[ 609 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 5 , 0x868 , 2 ) , /* MX35_PAD_SD2_CMD__GPIO2_0 */
[ 610 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 6 , 0x0 , 0 ) , /* MX35_PAD_SD2_CMD__SPDIF_SPDIF_OUT1 */
[ 611 ] = IMX_PIN_REG ( MX35_PAD_SD2_CMD , 0x6ac , 0x248 , 7 , 0x928 , 3 ) , /* MX35_PAD_SD2_CMD__IPU_DISPB_D12_VSYNC */
[ 612 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2_CLK__ESDHC2_CLK */
[ 613 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 1 , 0x920 , 2 ) , /* MX35_PAD_SD2_CLK__I2C3_SDA */
[ 614 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 2 , 0x808 , 0 ) , /* MX35_PAD_SD2_CLK__ESDHC1_DAT5 */
[ 615 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 3 , 0x93c , 2 ) , /* MX35_PAD_SD2_CLK__IPU_CSI_D_3 */
[ 616 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 4 , 0x9e0 , 0 ) , /* MX35_PAD_SD2_CLK__USB_TOP_USBH2_DATA_5 */
[ 617 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 5 , 0x894 , 1 ) , /* MX35_PAD_SD2_CLK__GPIO2_1 */
[ 618 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 6 , 0x998 , 2 ) , /* MX35_PAD_SD2_CLK__SPDIF_SPDIF_IN1 */
[ 619 ] = IMX_PIN_REG ( MX35_PAD_SD2_CLK , 0x6b0 , 0x24c , 7 , 0x0 , 0 ) , /* MX35_PAD_SD2_CLK__IPU_DISPB_CS2 */
[ 620 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA0__ESDHC2_DAT0 */
[ 621 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 1 , 0x9a0 , 1 ) , /* MX35_PAD_SD2_DATA0__UART3_RXD_MUX */
[ 622 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 2 , 0x80c , 0 ) , /* MX35_PAD_SD2_DATA0__ESDHC1_DAT6 */
[ 623 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 3 , 0x940 , 1 ) , /* MX35_PAD_SD2_DATA0__IPU_CSI_D_4 */
[ 624 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 4 , 0x9e4 , 0 ) , /* MX35_PAD_SD2_DATA0__USB_TOP_USBH2_DATA_6 */
[ 625 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 5 , 0x8c0 , 1 ) , /* MX35_PAD_SD2_DATA0__GPIO2_2 */
[ 626 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA0 , 0x6b4 , 0x250 , 6 , 0x994 , 3 ) , /* MX35_PAD_SD2_DATA0__SPDIF_SPDIF_EXTCLK */
[ 627 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA1 , 0x6b8 , 0x254 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA1__ESDHC2_DAT1 */
[ 628 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA1 , 0x6b8 , 0x254 , 1 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA1__UART3_TXD_MUX */
[ 629 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA1 , 0x6b8 , 0x254 , 2 , 0x810 , 0 ) , /* MX35_PAD_SD2_DATA1__ESDHC1_DAT7 */
[ 630 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA1 , 0x6b8 , 0x254 , 3 , 0x944 , 1 ) , /* MX35_PAD_SD2_DATA1__IPU_CSI_D_5 */
[ 631 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA1 , 0x6b8 , 0x254 , 4 , 0x9cc , 0 ) , /* MX35_PAD_SD2_DATA1__USB_TOP_USBH2_DATA_0 */
[ 632 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA1 , 0x6b8 , 0x254 , 5 , 0x8cc , 1 ) , /* MX35_PAD_SD2_DATA1__GPIO2_3 */
[ 633 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA2 , 0x6bc , 0x258 , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA2__ESDHC2_DAT2 */
[ 634 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA2 , 0x6bc , 0x258 , 1 , 0x99c , 0 ) , /* MX35_PAD_SD2_DATA2__UART3_RTS */
[ 635 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA2 , 0x6bc , 0x258 , 2 , 0x7c8 , 1 ) , /* MX35_PAD_SD2_DATA2__CAN1_RXCAN */
[ 636 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA2 , 0x6bc , 0x258 , 3 , 0x948 , 1 ) , /* MX35_PAD_SD2_DATA2__IPU_CSI_D_6 */
[ 637 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA2 , 0x6bc , 0x258 , 4 , 0x9d0 , 0 ) , /* MX35_PAD_SD2_DATA2__USB_TOP_USBH2_DATA_1 */
[ 638 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA2 , 0x6bc , 0x258 , 5 , 0x8d0 , 1 ) , /* MX35_PAD_SD2_DATA2__GPIO2_4 */
[ 639 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA3 , 0x6c0 , 0x25c , 0 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA3__ESDHC2_DAT3 */
[ 640 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA3 , 0x6c0 , 0x25c , 1 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA3__UART3_CTS */
[ 641 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA3 , 0x6c0 , 0x25c , 2 , 0x0 , 0 ) , /* MX35_PAD_SD2_DATA3__CAN1_TXCAN */
[ 642 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA3 , 0x6c0 , 0x25c , 3 , 0x94c , 1 ) , /* MX35_PAD_SD2_DATA3__IPU_CSI_D_7 */
[ 643 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA3 , 0x6c0 , 0x25c , 4 , 0x9d4 , 0 ) , /* MX35_PAD_SD2_DATA3__USB_TOP_USBH2_DATA_2 */
[ 644 ] = IMX_PIN_REG ( MX35_PAD_SD2_DATA3 , 0x6c0 , 0x25c , 5 , 0x8d4 , 1 ) , /* MX35_PAD_SD2_DATA3__GPIO2_5 */
[ 645 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS0 , 0x6c4 , 0x260 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS0__ATA_CS0 */
[ 646 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS0 , 0x6c4 , 0x260 , 1 , 0x7dc , 1 ) , /* MX35_PAD_ATA_CS0__CSPI1_SS3 */
[ 647 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS0 , 0x6c4 , 0x260 , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS0__IPU_DISPB_CS1 */
[ 648 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS0 , 0x6c4 , 0x260 , 5 , 0x8d8 , 1 ) , /* MX35_PAD_ATA_CS0__GPIO2_6 */
[ 649 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS0 , 0x6c4 , 0x260 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS0__IPU_DIAGB_0 */
[ 650 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS0 , 0x6c4 , 0x260 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS0__ARM11P_TOP_MAX1_HMASTER_0 */
[ 651 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS1 , 0x6c8 , 0x264 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS1__ATA_CS1 */
[ 652 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS1 , 0x6c8 , 0x264 , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS1__IPU_DISPB_CS2 */
[ 653 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS1 , 0x6c8 , 0x264 , 4 , 0x7f0 , 1 ) , /* MX35_PAD_ATA_CS1__CSPI2_SS0 */
[ 654 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS1 , 0x6c8 , 0x264 , 5 , 0x8dc , 1 ) , /* MX35_PAD_ATA_CS1__GPIO2_7 */
[ 655 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS1 , 0x6c8 , 0x264 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS1__IPU_DIAGB_1 */
[ 656 ] = IMX_PIN_REG ( MX35_PAD_ATA_CS1 , 0x6c8 , 0x264 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_CS1__ARM11P_TOP_MAX1_HMASTER_1 */
[ 657 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOR__ATA_DIOR */
[ 658 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 1 , 0x81c , 1 ) , /* MX35_PAD_ATA_DIOR__ESDHC3_DAT0 */
[ 659 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 2 , 0x9c4 , 1 ) , /* MX35_PAD_ATA_DIOR__USB_TOP_USBOTG_DIR */
[ 660 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOR__IPU_DISPB_BE0 */
[ 661 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 4 , 0x7f4 , 1 ) , /* MX35_PAD_ATA_DIOR__CSPI2_SS1 */
[ 662 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 5 , 0x8e0 , 1 ) , /* MX35_PAD_ATA_DIOR__GPIO2_8 */
[ 663 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOR__IPU_DIAGB_2 */
[ 664 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOR , 0x6cc , 0x268 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOR__ARM11P_TOP_MAX1_HMASTER_2 */
[ 665 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOW__ATA_DIOW */
[ 666 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 1 , 0x820 , 1 ) , /* MX35_PAD_ATA_DIOW__ESDHC3_DAT1 */
[ 667 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 2 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOW__USB_TOP_USBOTG_STP */
[ 668 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOW__IPU_DISPB_BE1 */
[ 669 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 4 , 0x7ec , 2 ) , /* MX35_PAD_ATA_DIOW__CSPI2_MOSI */
[ 670 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 5 , 0x8e4 , 1 ) , /* MX35_PAD_ATA_DIOW__GPIO2_9 */
[ 671 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOW__IPU_DIAGB_3 */
[ 672 ] = IMX_PIN_REG ( MX35_PAD_ATA_DIOW , 0x6d0 , 0x26c , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DIOW__ARM11P_TOP_MAX1_HMASTER_3 */
[ 673 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DMACK__ATA_DMACK */
[ 674 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 1 , 0x824 , 1 ) , /* MX35_PAD_ATA_DMACK__ESDHC3_DAT2 */
[ 675 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 2 , 0x9c8 , 1 ) , /* MX35_PAD_ATA_DMACK__USB_TOP_USBOTG_NXT */
[ 676 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 4 , 0x7e8 , 2 ) , /* MX35_PAD_ATA_DMACK__CSPI2_MISO */
[ 677 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 5 , 0x86c , 1 ) , /* MX35_PAD_ATA_DMACK__GPIO2_10 */
[ 678 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DMACK__IPU_DIAGB_4 */
[ 679 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMACK , 0x6d4 , 0x270 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DMACK__ARM11P_TOP_MAX0_HMASTER_0 */
[ 680 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_RESET_B__ATA_RESET_B */
[ 681 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 1 , 0x828 , 1 ) , /* MX35_PAD_ATA_RESET_B__ESDHC3_DAT3 */
[ 682 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 2 , 0x9a4 , 1 ) , /* MX35_PAD_ATA_RESET_B__USB_TOP_USBOTG_DATA_0 */
[ 683 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_RESET_B__IPU_DISPB_SD_D_O */
[ 684 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 4 , 0x7e4 , 2 ) , /* MX35_PAD_ATA_RESET_B__CSPI2_RDY */
[ 685 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 5 , 0x870 , 1 ) , /* MX35_PAD_ATA_RESET_B__GPIO2_11 */
[ 686 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_RESET_B__IPU_DIAGB_5 */
[ 687 ] = IMX_PIN_REG ( MX35_PAD_ATA_RESET_B , 0x6d8 , 0x274 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_RESET_B__ARM11P_TOP_MAX0_HMASTER_1 */
[ 688 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_IORDY__ATA_IORDY */
[ 689 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_IORDY__ESDHC3_DAT4 */
[ 690 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 2 , 0x9a8 , 1 ) , /* MX35_PAD_ATA_IORDY__USB_TOP_USBOTG_DATA_1 */
[ 691 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 3 , 0x92c , 3 ) , /* MX35_PAD_ATA_IORDY__IPU_DISPB_SD_D_IO */
[ 692 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 4 , 0x0 , 0 ) , /* MX35_PAD_ATA_IORDY__ESDHC2_DAT4 */
[ 693 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 5 , 0x874 , 1 ) , /* MX35_PAD_ATA_IORDY__GPIO2_12 */
[ 694 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_IORDY__IPU_DIAGB_6 */
[ 695 ] = IMX_PIN_REG ( MX35_PAD_ATA_IORDY , 0x6dc , 0x278 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_IORDY__ARM11P_TOP_MAX0_HMASTER_2 */
[ 696 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA0__ATA_DATA_0 */
[ 697 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA0__ESDHC3_DAT5 */
[ 698 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 2 , 0x9ac , 1 ) , /* MX35_PAD_ATA_DATA0__USB_TOP_USBOTG_DATA_2 */
[ 699 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 3 , 0x928 , 4 ) , /* MX35_PAD_ATA_DATA0__IPU_DISPB_D12_VSYNC */
[ 700 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 4 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA0__ESDHC2_DAT5 */
[ 701 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 5 , 0x878 , 1 ) , /* MX35_PAD_ATA_DATA0__GPIO2_13 */
[ 702 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA0__IPU_DIAGB_7 */
[ 703 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA0 , 0x6e0 , 0x27c , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA0__ARM11P_TOP_MAX0_HMASTER_3 */
[ 704 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA1__ATA_DATA_1 */
[ 705 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA1__ESDHC3_DAT6 */
[ 706 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 2 , 0x9b0 , 1 ) , /* MX35_PAD_ATA_DATA1__USB_TOP_USBOTG_DATA_3 */
[ 707 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA1__IPU_DISPB_SD_CLK */
[ 708 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 4 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA1__ESDHC2_DAT6 */
[ 709 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 5 , 0x87c , 1 ) , /* MX35_PAD_ATA_DATA1__GPIO2_14 */
[ 710 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA1__IPU_DIAGB_8 */
[ 711 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA1 , 0x6e4 , 0x280 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA1__ARM11P_TOP_TRACE_27 */
[ 712 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA2__ATA_DATA_2 */
[ 713 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA2__ESDHC3_DAT7 */
[ 714 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 2 , 0x9b4 , 1 ) , /* MX35_PAD_ATA_DATA2__USB_TOP_USBOTG_DATA_4 */
[ 715 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 3 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA2__IPU_DISPB_SER_RS */
[ 716 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 4 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA2__ESDHC2_DAT7 */
[ 717 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 5 , 0x880 , 1 ) , /* MX35_PAD_ATA_DATA2__GPIO2_15 */
[ 718 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA2__IPU_DIAGB_9 */
[ 719 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA2 , 0x6e8 , 0x284 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA2__ARM11P_TOP_TRACE_28 */
[ 720 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA3__ATA_DATA_3 */
[ 721 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 1 , 0x814 , 1 ) , /* MX35_PAD_ATA_DATA3__ESDHC3_CLK */
[ 722 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 2 , 0x9b8 , 1 ) , /* MX35_PAD_ATA_DATA3__USB_TOP_USBOTG_DATA_5 */
[ 723 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 4 , 0x7e0 , 2 ) , /* MX35_PAD_ATA_DATA3__CSPI2_SCLK */
[ 724 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 5 , 0x884 , 1 ) , /* MX35_PAD_ATA_DATA3__GPIO2_16 */
[ 725 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA3__IPU_DIAGB_10 */
[ 726 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA3 , 0x6ec , 0x288 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA3__ARM11P_TOP_TRACE_29 */
[ 727 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA4 , 0x6f0 , 0x28c , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA4__ATA_DATA_4 */
[ 728 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA4 , 0x6f0 , 0x28c , 1 , 0x818 , 1 ) , /* MX35_PAD_ATA_DATA4__ESDHC3_CMD */
[ 729 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA4 , 0x6f0 , 0x28c , 2 , 0x9bc , 1 ) , /* MX35_PAD_ATA_DATA4__USB_TOP_USBOTG_DATA_6 */
[ 730 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA4 , 0x6f0 , 0x28c , 5 , 0x888 , 1 ) , /* MX35_PAD_ATA_DATA4__GPIO2_17 */
[ 731 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA4 , 0x6f0 , 0x28c , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA4__IPU_DIAGB_11 */
[ 732 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA4 , 0x6f0 , 0x28c , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA4__ARM11P_TOP_TRACE_30 */
[ 733 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA5 , 0x6f4 , 0x290 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA5__ATA_DATA_5 */
[ 734 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA5 , 0x6f4 , 0x290 , 2 , 0x9c0 , 1 ) , /* MX35_PAD_ATA_DATA5__USB_TOP_USBOTG_DATA_7 */
[ 735 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA5 , 0x6f4 , 0x290 , 5 , 0x88c , 1 ) , /* MX35_PAD_ATA_DATA5__GPIO2_18 */
[ 736 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA5 , 0x6f4 , 0x290 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA5__IPU_DIAGB_12 */
[ 737 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA5 , 0x6f4 , 0x290 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA5__ARM11P_TOP_TRACE_31 */
[ 738 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA6 , 0x6f8 , 0x294 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA6__ATA_DATA_6 */
[ 739 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA6 , 0x6f8 , 0x294 , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA6__CAN1_TXCAN */
[ 740 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA6 , 0x6f8 , 0x294 , 2 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA6__UART1_DTR */
[ 741 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA6 , 0x6f8 , 0x294 , 3 , 0x7b4 , 0 ) , /* MX35_PAD_ATA_DATA6__AUDMUX_AUD6_TXD */
[ 742 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA6 , 0x6f8 , 0x294 , 5 , 0x890 , 1 ) , /* MX35_PAD_ATA_DATA6__GPIO2_19 */
[ 743 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA6 , 0x6f8 , 0x294 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA6__IPU_DIAGB_13 */
[ 744 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA7 , 0x6fc , 0x298 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA7__ATA_DATA_7 */
[ 745 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA7 , 0x6fc , 0x298 , 1 , 0x7c8 , 2 ) , /* MX35_PAD_ATA_DATA7__CAN1_RXCAN */
[ 746 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA7 , 0x6fc , 0x298 , 2 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA7__UART1_DSR */
[ 747 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA7 , 0x6fc , 0x298 , 3 , 0x7b0 , 0 ) , /* MX35_PAD_ATA_DATA7__AUDMUX_AUD6_RXD */
[ 748 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA7 , 0x6fc , 0x298 , 5 , 0x898 , 1 ) , /* MX35_PAD_ATA_DATA7__GPIO2_20 */
[ 749 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA7 , 0x6fc , 0x298 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA7__IPU_DIAGB_14 */
[ 750 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA8 , 0x700 , 0x29c , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA8__ATA_DATA_8 */
[ 751 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA8 , 0x700 , 0x29c , 1 , 0x99c , 1 ) , /* MX35_PAD_ATA_DATA8__UART3_RTS */
[ 752 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA8 , 0x700 , 0x29c , 2 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA8__UART1_RI */
[ 753 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA8 , 0x700 , 0x29c , 3 , 0x7c0 , 0 ) , /* MX35_PAD_ATA_DATA8__AUDMUX_AUD6_TXC */
[ 754 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA8 , 0x700 , 0x29c , 5 , 0x89c , 1 ) , /* MX35_PAD_ATA_DATA8__GPIO2_21 */
[ 755 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA8 , 0x700 , 0x29c , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA8__IPU_DIAGB_15 */
[ 756 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA9 , 0x704 , 0x2a0 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA9__ATA_DATA_9 */
[ 757 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA9 , 0x704 , 0x2a0 , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA9__UART3_CTS */
[ 758 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA9 , 0x704 , 0x2a0 , 2 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA9__UART1_DCD */
[ 759 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA9 , 0x704 , 0x2a0 , 3 , 0x7c4 , 0 ) , /* MX35_PAD_ATA_DATA9__AUDMUX_AUD6_TXFS */
[ 760 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA9 , 0x704 , 0x2a0 , 5 , 0x8a0 , 1 ) , /* MX35_PAD_ATA_DATA9__GPIO2_22 */
[ 761 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA9 , 0x704 , 0x2a0 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA9__IPU_DIAGB_16 */
[ 762 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA10 , 0x708 , 0x2a4 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA10__ATA_DATA_10 */
[ 763 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA10 , 0x708 , 0x2a4 , 1 , 0x9a0 , 2 ) , /* MX35_PAD_ATA_DATA10__UART3_RXD_MUX */
[ 764 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA10 , 0x708 , 0x2a4 , 3 , 0x7b8 , 0 ) , /* MX35_PAD_ATA_DATA10__AUDMUX_AUD6_RXC */
[ 765 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA10 , 0x708 , 0x2a4 , 5 , 0x8a4 , 1 ) , /* MX35_PAD_ATA_DATA10__GPIO2_23 */
[ 766 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA10 , 0x708 , 0x2a4 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA10__IPU_DIAGB_17 */
[ 767 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA11 , 0x70c , 0x2a8 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA11__ATA_DATA_11 */
[ 768 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA11 , 0x70c , 0x2a8 , 1 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA11__UART3_TXD_MUX */
[ 769 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA11 , 0x70c , 0x2a8 , 3 , 0x7bc , 0 ) , /* MX35_PAD_ATA_DATA11__AUDMUX_AUD6_RXFS */
[ 770 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA11 , 0x70c , 0x2a8 , 5 , 0x8a8 , 1 ) , /* MX35_PAD_ATA_DATA11__GPIO2_24 */
[ 771 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA11 , 0x70c , 0x2a8 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA11__IPU_DIAGB_18 */
[ 772 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA12 , 0x710 , 0x2ac , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA12__ATA_DATA_12 */
[ 773 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA12 , 0x710 , 0x2ac , 1 , 0x91c , 3 ) , /* MX35_PAD_ATA_DATA12__I2C3_SCL */
[ 774 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA12 , 0x710 , 0x2ac , 5 , 0x8ac , 1 ) , /* MX35_PAD_ATA_DATA12__GPIO2_25 */
[ 775 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA12 , 0x710 , 0x2ac , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA12__IPU_DIAGB_19 */
[ 776 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA13 , 0x714 , 0x2b0 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA13__ATA_DATA_13 */
[ 777 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA13 , 0x714 , 0x2b0 , 1 , 0x920 , 3 ) , /* MX35_PAD_ATA_DATA13__I2C3_SDA */
[ 778 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA13 , 0x714 , 0x2b0 , 5 , 0x8b0 , 1 ) , /* MX35_PAD_ATA_DATA13__GPIO2_26 */
[ 779 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA13 , 0x714 , 0x2b0 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA13__IPU_DIAGB_20 */
[ 780 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA14 , 0x718 , 0x2b4 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA14__ATA_DATA_14 */
[ 781 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA14 , 0x718 , 0x2b4 , 1 , 0x930 , 2 ) , /* MX35_PAD_ATA_DATA14__IPU_CSI_D_0 */
[ 782 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA14 , 0x718 , 0x2b4 , 3 , 0x970 , 2 ) , /* MX35_PAD_ATA_DATA14__KPP_ROW_0 */
[ 783 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA14 , 0x718 , 0x2b4 , 5 , 0x8b4 , 1 ) , /* MX35_PAD_ATA_DATA14__GPIO2_27 */
[ 784 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA14 , 0x718 , 0x2b4 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA14__IPU_DIAGB_21 */
[ 785 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA15 , 0x71c , 0x2b8 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA15__ATA_DATA_15 */
[ 786 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA15 , 0x71c , 0x2b8 , 1 , 0x934 , 2 ) , /* MX35_PAD_ATA_DATA15__IPU_CSI_D_1 */
[ 787 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA15 , 0x71c , 0x2b8 , 3 , 0x974 , 2 ) , /* MX35_PAD_ATA_DATA15__KPP_ROW_1 */
[ 788 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA15 , 0x71c , 0x2b8 , 5 , 0x8b8 , 1 ) , /* MX35_PAD_ATA_DATA15__GPIO2_28 */
[ 789 ] = IMX_PIN_REG ( MX35_PAD_ATA_DATA15 , 0x71c , 0x2b8 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DATA15__IPU_DIAGB_22 */
[ 790 ] = IMX_PIN_REG ( MX35_PAD_ATA_INTRQ , 0x720 , 0x2bc , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_INTRQ__ATA_INTRQ */
[ 791 ] = IMX_PIN_REG ( MX35_PAD_ATA_INTRQ , 0x720 , 0x2bc , 1 , 0x938 , 3 ) , /* MX35_PAD_ATA_INTRQ__IPU_CSI_D_2 */
[ 792 ] = IMX_PIN_REG ( MX35_PAD_ATA_INTRQ , 0x720 , 0x2bc , 3 , 0x978 , 2 ) , /* MX35_PAD_ATA_INTRQ__KPP_ROW_2 */
[ 793 ] = IMX_PIN_REG ( MX35_PAD_ATA_INTRQ , 0x720 , 0x2bc , 5 , 0x8bc , 1 ) , /* MX35_PAD_ATA_INTRQ__GPIO2_29 */
[ 794 ] = IMX_PIN_REG ( MX35_PAD_ATA_INTRQ , 0x720 , 0x2bc , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_INTRQ__IPU_DIAGB_23 */
[ 795 ] = IMX_PIN_REG ( MX35_PAD_ATA_BUFF_EN , 0x724 , 0x2c0 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_BUFF_EN__ATA_BUFFER_EN */
[ 796 ] = IMX_PIN_REG ( MX35_PAD_ATA_BUFF_EN , 0x724 , 0x2c0 , 1 , 0x93c , 3 ) , /* MX35_PAD_ATA_BUFF_EN__IPU_CSI_D_3 */
[ 797 ] = IMX_PIN_REG ( MX35_PAD_ATA_BUFF_EN , 0x724 , 0x2c0 , 3 , 0x97c , 2 ) , /* MX35_PAD_ATA_BUFF_EN__KPP_ROW_3 */
[ 798 ] = IMX_PIN_REG ( MX35_PAD_ATA_BUFF_EN , 0x724 , 0x2c0 , 5 , 0x8c4 , 1 ) , /* MX35_PAD_ATA_BUFF_EN__GPIO2_30 */
[ 799 ] = IMX_PIN_REG ( MX35_PAD_ATA_BUFF_EN , 0x724 , 0x2c0 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_BUFF_EN__IPU_DIAGB_24 */
[ 800 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMARQ , 0x728 , 0x2c4 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DMARQ__ATA_DMARQ */
[ 801 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMARQ , 0x728 , 0x2c4 , 1 , 0x940 , 2 ) , /* MX35_PAD_ATA_DMARQ__IPU_CSI_D_4 */
[ 802 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMARQ , 0x728 , 0x2c4 , 3 , 0x950 , 2 ) , /* MX35_PAD_ATA_DMARQ__KPP_COL_0 */
[ 803 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMARQ , 0x728 , 0x2c4 , 5 , 0x8c8 , 1 ) , /* MX35_PAD_ATA_DMARQ__GPIO2_31 */
[ 804 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMARQ , 0x728 , 0x2c4 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DMARQ__IPU_DIAGB_25 */
[ 805 ] = IMX_PIN_REG ( MX35_PAD_ATA_DMARQ , 0x728 , 0x2c4 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DMARQ__ECT_CTI_TRIG_IN1_4 */
[ 806 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA0 , 0x72c , 0x2c8 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA0__ATA_DA_0 */
[ 807 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA0 , 0x72c , 0x2c8 , 1 , 0x944 , 2 ) , /* MX35_PAD_ATA_DA0__IPU_CSI_D_5 */
[ 808 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA0 , 0x72c , 0x2c8 , 3 , 0x954 , 2 ) , /* MX35_PAD_ATA_DA0__KPP_COL_1 */
[ 809 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA0 , 0x72c , 0x2c8 , 5 , 0x8e8 , 1 ) , /* MX35_PAD_ATA_DA0__GPIO3_0 */
[ 810 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA0 , 0x72c , 0x2c8 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA0__IPU_DIAGB_26 */
[ 811 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA0 , 0x72c , 0x2c8 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA0__ECT_CTI_TRIG_IN1_5 */
[ 812 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA1 , 0x730 , 0x2cc , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA1__ATA_DA_1 */
[ 813 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA1 , 0x730 , 0x2cc , 1 , 0x948 , 2 ) , /* MX35_PAD_ATA_DA1__IPU_CSI_D_6 */
[ 814 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA1 , 0x730 , 0x2cc , 3 , 0x958 , 2 ) , /* MX35_PAD_ATA_DA1__KPP_COL_2 */
[ 815 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA1 , 0x730 , 0x2cc , 5 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA1__GPIO3_1 */
[ 816 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA1 , 0x730 , 0x2cc , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA1__IPU_DIAGB_27 */
[ 817 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA1 , 0x730 , 0x2cc , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA1__ECT_CTI_TRIG_IN1_6 */
[ 818 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA2 , 0x734 , 0x2d0 , 0 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA2__ATA_DA_2 */
[ 819 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA2 , 0x734 , 0x2d0 , 1 , 0x94c , 2 ) , /* MX35_PAD_ATA_DA2__IPU_CSI_D_7 */
[ 820 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA2 , 0x734 , 0x2d0 , 3 , 0x95c , 2 ) , /* MX35_PAD_ATA_DA2__KPP_COL_3 */
[ 821 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA2 , 0x734 , 0x2d0 , 5 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA2__GPIO3_2 */
[ 822 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA2 , 0x734 , 0x2d0 , 6 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA2__IPU_DIAGB_28 */
[ 823 ] = IMX_PIN_REG ( MX35_PAD_ATA_DA2 , 0x734 , 0x2d0 , 7 , 0x0 , 0 ) , /* MX35_PAD_ATA_DA2__ECT_CTI_TRIG_IN1_7 */
[ 824 ] = IMX_PIN_REG ( MX35_PAD_MLB_CLK , 0x738 , 0x2d4 , 0 , 0x0 , 0 ) , /* MX35_PAD_MLB_CLK__MLB_MLBCLK */
[ 825 ] = IMX_PIN_REG ( MX35_PAD_MLB_CLK , 0x738 , 0x2d4 , 5 , 0x0 , 0 ) , /* MX35_PAD_MLB_CLK__GPIO3_3 */
[ 826 ] = IMX_PIN_REG ( MX35_PAD_MLB_DAT , 0x73c , 0x2d8 , 0 , 0x0 , 0 ) , /* MX35_PAD_MLB_DAT__MLB_MLBDAT */
[ 827 ] = IMX_PIN_REG ( MX35_PAD_MLB_DAT , 0x73c , 0x2d8 , 5 , 0x904 , 1 ) , /* MX35_PAD_MLB_DAT__GPIO3_4 */
[ 828 ] = IMX_PIN_REG ( MX35_PAD_MLB_SIG , 0x740 , 0x2dc , 0 , 0x0 , 0 ) , /* MX35_PAD_MLB_SIG__MLB_MLBSIG */
[ 829 ] = IMX_PIN_REG ( MX35_PAD_MLB_SIG , 0x740 , 0x2dc , 5 , 0x908 , 1 ) , /* MX35_PAD_MLB_SIG__GPIO3_5 */
[ 830 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_CLK__FEC_TX_CLK */
[ 831 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 1 , 0x804 , 1 ) , /* MX35_PAD_FEC_TX_CLK__ESDHC1_DAT4 */
[ 832 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 2 , 0x9a0 , 3 ) , /* MX35_PAD_FEC_TX_CLK__UART3_RXD_MUX */
[ 833 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 3 , 0x9ec , 1 ) , /* MX35_PAD_FEC_TX_CLK__USB_TOP_USBH2_DIR */
[ 834 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 4 , 0x7ec , 3 ) , /* MX35_PAD_FEC_TX_CLK__CSPI2_MOSI */
[ 835 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 5 , 0x90c , 1 ) , /* MX35_PAD_FEC_TX_CLK__GPIO3_6 */
[ 836 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 6 , 0x928 , 5 ) , /* MX35_PAD_FEC_TX_CLK__IPU_DISPB_D12_VSYNC */
[ 837 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_CLK , 0x744 , 0x2e0 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_CLK__ARM11P_TOP_EVNTBUS_0 */
[ 838 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_CLK__FEC_RX_CLK */
[ 839 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 1 , 0x808 , 1 ) , /* MX35_PAD_FEC_RX_CLK__ESDHC1_DAT5 */
[ 840 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_CLK__UART3_TXD_MUX */
[ 841 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 3 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_CLK__USB_TOP_USBH2_STP */
[ 842 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 4 , 0x7e8 , 3 ) , /* MX35_PAD_FEC_RX_CLK__CSPI2_MISO */
[ 843 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 5 , 0x910 , 1 ) , /* MX35_PAD_FEC_RX_CLK__GPIO3_7 */
[ 844 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 6 , 0x92c , 4 ) , /* MX35_PAD_FEC_RX_CLK__IPU_DISPB_SD_D_I */
[ 845 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_CLK , 0x748 , 0x2e4 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_CLK__ARM11P_TOP_EVNTBUS_1 */
[ 846 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_DV__FEC_RX_DV */
[ 847 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 1 , 0x80c , 1 ) , /* MX35_PAD_FEC_RX_DV__ESDHC1_DAT6 */
[ 848 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 2 , 0x99c , 2 ) , /* MX35_PAD_FEC_RX_DV__UART3_RTS */
[ 849 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 3 , 0x9f0 , 1 ) , /* MX35_PAD_FEC_RX_DV__USB_TOP_USBH2_NXT */
[ 850 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 4 , 0x7e0 , 3 ) , /* MX35_PAD_FEC_RX_DV__CSPI2_SCLK */
[ 851 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 5 , 0x914 , 1 ) , /* MX35_PAD_FEC_RX_DV__GPIO3_8 */
[ 852 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_DV__IPU_DISPB_SD_CLK */
[ 853 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_DV , 0x74c , 0x2e8 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_DV__ARM11P_TOP_EVNTBUS_2 */
[ 854 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_COL__FEC_COL */
[ 855 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 1 , 0x810 , 1 ) , /* MX35_PAD_FEC_COL__ESDHC1_DAT7 */
[ 856 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_COL__UART3_CTS */
[ 857 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 3 , 0x9cc , 1 ) , /* MX35_PAD_FEC_COL__USB_TOP_USBH2_DATA_0 */
[ 858 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 4 , 0x7e4 , 3 ) , /* MX35_PAD_FEC_COL__CSPI2_RDY */
[ 859 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 5 , 0x918 , 1 ) , /* MX35_PAD_FEC_COL__GPIO3_9 */
[ 860 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_COL__IPU_DISPB_SER_RS */
[ 861 ] = IMX_PIN_REG ( MX35_PAD_FEC_COL , 0x750 , 0x2ec , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_COL__ARM11P_TOP_EVNTBUS_3 */
[ 862 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA0__FEC_RDATA_0 */
[ 863 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 1 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA0__PWM_PWMO */
[ 864 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA0__UART3_DTR */
[ 865 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 3 , 0x9d0 , 1 ) , /* MX35_PAD_FEC_RDATA0__USB_TOP_USBH2_DATA_1 */
[ 866 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 4 , 0x7f0 , 2 ) , /* MX35_PAD_FEC_RDATA0__CSPI2_SS0 */
[ 867 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 5 , 0x8ec , 1 ) , /* MX35_PAD_FEC_RDATA0__GPIO3_10 */
[ 868 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA0__IPU_DISPB_CS1 */
[ 869 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA0 , 0x754 , 0x2f0 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA0__ARM11P_TOP_EVNTBUS_4 */
[ 870 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA0__FEC_TDATA_0 */
[ 871 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 1 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA0__SPDIF_SPDIF_OUT1 */
[ 872 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA0__UART3_DSR */
[ 873 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 3 , 0x9d4 , 1 ) , /* MX35_PAD_FEC_TDATA0__USB_TOP_USBH2_DATA_2 */
[ 874 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 4 , 0x7f4 , 2 ) , /* MX35_PAD_FEC_TDATA0__CSPI2_SS1 */
[ 875 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 5 , 0x8f0 , 1 ) , /* MX35_PAD_FEC_TDATA0__GPIO3_11 */
[ 876 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA0__IPU_DISPB_CS0 */
[ 877 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA0 , 0x758 , 0x2f4 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA0__ARM11P_TOP_EVNTBUS_5 */
[ 878 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_EN__FEC_TX_EN */
[ 879 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 1 , 0x998 , 3 ) , /* MX35_PAD_FEC_TX_EN__SPDIF_SPDIF_IN1 */
[ 880 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_EN__UART3_RI */
[ 881 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 3 , 0x9d8 , 1 ) , /* MX35_PAD_FEC_TX_EN__USB_TOP_USBH2_DATA_3 */
[ 882 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 5 , 0x8f4 , 1 ) , /* MX35_PAD_FEC_TX_EN__GPIO3_12 */
[ 883 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_EN__IPU_DISPB_PAR_RS */
[ 884 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_EN , 0x75c , 0x2f8 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_EN__ARM11P_TOP_EVNTBUS_6 */
[ 885 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDC__FEC_MDC */
[ 886 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 1 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDC__CAN2_TXCAN */
[ 887 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDC__UART3_DCD */
[ 888 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 3 , 0x9dc , 1 ) , /* MX35_PAD_FEC_MDC__USB_TOP_USBH2_DATA_4 */
[ 889 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 5 , 0x8f8 , 1 ) , /* MX35_PAD_FEC_MDC__GPIO3_13 */
[ 890 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDC__IPU_DISPB_WR */
[ 891 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDC , 0x760 , 0x2fc , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDC__ARM11P_TOP_EVNTBUS_7 */
[ 892 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDIO , 0x764 , 0x300 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDIO__FEC_MDIO */
[ 893 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDIO , 0x764 , 0x300 , 1 , 0x7cc , 2 ) , /* MX35_PAD_FEC_MDIO__CAN2_RXCAN */
[ 894 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDIO , 0x764 , 0x300 , 3 , 0x9e0 , 1 ) , /* MX35_PAD_FEC_MDIO__USB_TOP_USBH2_DATA_5 */
[ 895 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDIO , 0x764 , 0x300 , 5 , 0x8fc , 1 ) , /* MX35_PAD_FEC_MDIO__GPIO3_14 */
[ 896 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDIO , 0x764 , 0x300 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDIO__IPU_DISPB_RD */
[ 897 ] = IMX_PIN_REG ( MX35_PAD_FEC_MDIO , 0x764 , 0x300 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_MDIO__ARM11P_TOP_EVNTBUS_8 */
[ 898 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_ERR__FEC_TX_ERR */
[ 899 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 1 , 0x990 , 2 ) , /* MX35_PAD_FEC_TX_ERR__OWIRE_LINE */
[ 900 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 2 , 0x994 , 4 ) , /* MX35_PAD_FEC_TX_ERR__SPDIF_SPDIF_EXTCLK */
[ 901 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 3 , 0x9e4 , 1 ) , /* MX35_PAD_FEC_TX_ERR__USB_TOP_USBH2_DATA_6 */
[ 902 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 5 , 0x900 , 1 ) , /* MX35_PAD_FEC_TX_ERR__GPIO3_15 */
[ 903 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 6 , 0x924 , 3 ) , /* MX35_PAD_FEC_TX_ERR__IPU_DISPB_D0_VSYNC */
[ 904 ] = IMX_PIN_REG ( MX35_PAD_FEC_TX_ERR , 0x768 , 0x304 , 7 , 0x0 , 0 ) , /* MX35_PAD_FEC_TX_ERR__ARM11P_TOP_EVNTBUS_9 */
[ 905 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_ERR , 0x76c , 0x308 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_ERR__FEC_RX_ERR */
[ 906 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_ERR , 0x76c , 0x308 , 1 , 0x930 , 3 ) , /* MX35_PAD_FEC_RX_ERR__IPU_CSI_D_0 */
[ 907 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_ERR , 0x76c , 0x308 , 3 , 0x9e8 , 1 ) , /* MX35_PAD_FEC_RX_ERR__USB_TOP_USBH2_DATA_7 */
[ 908 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_ERR , 0x76c , 0x308 , 4 , 0x960 , 1 ) , /* MX35_PAD_FEC_RX_ERR__KPP_COL_4 */
[ 909 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_ERR , 0x76c , 0x308 , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_RX_ERR__GPIO3_16 */
[ 910 ] = IMX_PIN_REG ( MX35_PAD_FEC_RX_ERR , 0x76c , 0x308 , 6 , 0x92c , 5 ) , /* MX35_PAD_FEC_RX_ERR__IPU_DISPB_SD_D_IO */
[ 911 ] = IMX_PIN_REG ( MX35_PAD_FEC_CRS , 0x770 , 0x30c , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_CRS__FEC_CRS */
[ 912 ] = IMX_PIN_REG ( MX35_PAD_FEC_CRS , 0x770 , 0x30c , 1 , 0x934 , 3 ) , /* MX35_PAD_FEC_CRS__IPU_CSI_D_1 */
[ 913 ] = IMX_PIN_REG ( MX35_PAD_FEC_CRS , 0x770 , 0x30c , 3 , 0x0 , 0 ) , /* MX35_PAD_FEC_CRS__USB_TOP_USBH2_PWR */
[ 914 ] = IMX_PIN_REG ( MX35_PAD_FEC_CRS , 0x770 , 0x30c , 4 , 0x964 , 1 ) , /* MX35_PAD_FEC_CRS__KPP_COL_5 */
[ 915 ] = IMX_PIN_REG ( MX35_PAD_FEC_CRS , 0x770 , 0x30c , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_CRS__GPIO3_17 */
[ 916 ] = IMX_PIN_REG ( MX35_PAD_FEC_CRS , 0x770 , 0x30c , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_CRS__IPU_FLASH_STROBE */
[ 917 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA1__FEC_RDATA_1 */
[ 918 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 1 , 0x938 , 4 ) , /* MX35_PAD_FEC_RDATA1__IPU_CSI_D_2 */
[ 919 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 2 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA1__AUDMUX_AUD6_RXC */
[ 920 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 3 , 0x9f4 , 2 ) , /* MX35_PAD_FEC_RDATA1__USB_TOP_USBH2_OC */
[ 921 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 4 , 0x968 , 1 ) , /* MX35_PAD_FEC_RDATA1__KPP_COL_6 */
[ 922 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA1__GPIO3_18 */
[ 923 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA1 , 0x774 , 0x310 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA1__IPU_DISPB_BE0 */
[ 924 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA1 , 0x778 , 0x314 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA1__FEC_TDATA_1 */
[ 925 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA1 , 0x778 , 0x314 , 1 , 0x93c , 4 ) , /* MX35_PAD_FEC_TDATA1__IPU_CSI_D_3 */
[ 926 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA1 , 0x778 , 0x314 , 2 , 0x7bc , 1 ) , /* MX35_PAD_FEC_TDATA1__AUDMUX_AUD6_RXFS */
[ 927 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA1 , 0x778 , 0x314 , 4 , 0x96c , 1 ) , /* MX35_PAD_FEC_TDATA1__KPP_COL_7 */
[ 928 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA1 , 0x778 , 0x314 , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA1__GPIO3_19 */
[ 929 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA1 , 0x778 , 0x314 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA1__IPU_DISPB_BE1 */
[ 930 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA2 , 0x77c , 0x318 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA2__FEC_RDATA_2 */
[ 931 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA2 , 0x77c , 0x318 , 1 , 0x940 , 3 ) , /* MX35_PAD_FEC_RDATA2__IPU_CSI_D_4 */
[ 932 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA2 , 0x77c , 0x318 , 2 , 0x7b4 , 1 ) , /* MX35_PAD_FEC_RDATA2__AUDMUX_AUD6_TXD */
[ 933 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA2 , 0x77c , 0x318 , 4 , 0x980 , 1 ) , /* MX35_PAD_FEC_RDATA2__KPP_ROW_4 */
[ 934 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA2 , 0x77c , 0x318 , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA2__GPIO3_20 */
[ 935 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA2 , 0x780 , 0x31c , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA2__FEC_TDATA_2 */
[ 936 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA2 , 0x780 , 0x31c , 1 , 0x944 , 3 ) , /* MX35_PAD_FEC_TDATA2__IPU_CSI_D_5 */
[ 937 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA2 , 0x780 , 0x31c , 2 , 0x7b0 , 1 ) , /* MX35_PAD_FEC_TDATA2__AUDMUX_AUD6_RXD */
[ 938 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA2 , 0x780 , 0x31c , 4 , 0x984 , 1 ) , /* MX35_PAD_FEC_TDATA2__KPP_ROW_5 */
[ 939 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA2 , 0x780 , 0x31c , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA2__GPIO3_21 */
[ 940 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA3 , 0x784 , 0x320 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA3__FEC_RDATA_3 */
[ 941 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA3 , 0x784 , 0x320 , 1 , 0x948 , 3 ) , /* MX35_PAD_FEC_RDATA3__IPU_CSI_D_6 */
[ 942 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA3 , 0x784 , 0x320 , 2 , 0x7c0 , 1 ) , /* MX35_PAD_FEC_RDATA3__AUDMUX_AUD6_TXC */
[ 943 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA3 , 0x784 , 0x320 , 4 , 0x988 , 1 ) , /* MX35_PAD_FEC_RDATA3__KPP_ROW_6 */
[ 944 ] = IMX_PIN_REG ( MX35_PAD_FEC_RDATA3 , 0x784 , 0x320 , 6 , 0x0 , 0 ) , /* MX35_PAD_FEC_RDATA3__GPIO3_22 */
[ 945 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA3 , 0x788 , 0x324 , 0 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA3__FEC_TDATA_3 */
[ 946 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA3 , 0x788 , 0x324 , 1 , 0x94c , 3 ) , /* MX35_PAD_FEC_TDATA3__IPU_CSI_D_7 */
[ 947 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA3 , 0x788 , 0x324 , 2 , 0x7c4 , 1 ) , /* MX35_PAD_FEC_TDATA3__AUDMUX_AUD6_TXFS */
[ 948 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA3 , 0x788 , 0x324 , 4 , 0x98c , 1 ) , /* MX35_PAD_FEC_TDATA3__KPP_ROW_7 */
[ 949 ] = IMX_PIN_REG ( MX35_PAD_FEC_TDATA3 , 0x788 , 0x324 , 5 , 0x0 , 0 ) , /* MX35_PAD_FEC_TDATA3__GPIO3_23 */
[ 950 ] = IMX_PIN_REG ( MX35_PAD_EXT_ARMCLK , 0x78c , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_EXT_ARMCLK__CCM_EXT_ARMCLK */
[ 951 ] = IMX_PIN_REG ( MX35_PAD_TEST_MODE , 0x790 , 0x0 , 0 , 0x0 , 0 ) , /* MX35_PAD_TEST_MODE__TCU_TEST_MODE */
} ;
/* Pad names for the pinmux subsystem */
static const struct pinctrl_pin_desc imx35_pinctrl_pads [ ] = {
IMX_PINCTRL_PIN ( MX35_PAD_CAPTURE ) ,
IMX_PINCTRL_PIN ( MX35_PAD_COMPARE ) ,
IMX_PINCTRL_PIN ( MX35_PAD_WDOG_RST ) ,
IMX_PINCTRL_PIN ( MX35_PAD_GPIO1_0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_GPIO1_1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_GPIO2_0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_GPIO3_0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RESET_IN_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_POR_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CLKO ) ,
IMX_PINCTRL_PIN ( MX35_PAD_BOOT_MODE0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_BOOT_MODE1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CLK_MODE0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CLK_MODE1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_POWER_FAIL ) ,
IMX_PINCTRL_PIN ( MX35_PAD_VSTBY ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A6 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A7 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A8 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A9 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_MA10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A11 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A12 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A13 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A14 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A15 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A16 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A17 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A18 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A19 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A20 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A21 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A22 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A23 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A24 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_A25 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDBA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDBA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD6 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD7 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD8 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD9 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD11 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD12 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD13 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD14 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD15 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD16 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD17 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD18 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD19 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD20 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD21 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD22 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD23 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD24 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD25 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD26 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD27 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD28 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD29 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD30 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD31 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_DQM0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_DQM1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_DQM2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_DQM3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_EB0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_EB1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_OE ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CS0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CS1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CS2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CS3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CS4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CS5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NF_CE0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ECB ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LBA ) ,
IMX_PINCTRL_PIN ( MX35_PAD_BCLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RW ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RAS ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CAS ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDWE ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDCKE0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDCKE1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDCLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDQS0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDQS1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDQS2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SDQS3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NFWE_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NFRE_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NFALE ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NFCLE ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NFWP_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_NFRB ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D15 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D14 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D13 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D12 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D11 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D9 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D8 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D7 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D6 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D8 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D9 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D11 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D12 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D13 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D14 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_D15 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_MCLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_VSYNC ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_HSYNC ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSI_PIXCLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_I2C1_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_I2C1_DAT ) ,
IMX_PINCTRL_PIN ( MX35_PAD_I2C2_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_I2C2_DAT ) ,
IMX_PINCTRL_PIN ( MX35_PAD_STXD4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SRXD4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SCK4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_STXFS4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_STXD5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SRXD5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SCK5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_STXFS5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SCKR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FSR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_HCKR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SCKT ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FST ) ,
IMX_PINCTRL_PIN ( MX35_PAD_HCKT ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TX5_RX0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TX4_RX1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TX3_RX2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TX2_RX3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TX1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TX0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSPI1_MOSI ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSPI1_MISO ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSPI1_SS0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSPI1_SS1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSPI1_SCLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CSPI1_SPI_RDY ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RXD1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TXD1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RTS1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CTS1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RXD2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TXD2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RTS2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CTS2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_RTCK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TCK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TMS ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TDI ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TDO ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TRSTB ) ,
IMX_PINCTRL_PIN ( MX35_PAD_DE_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SJC_MOD ) ,
IMX_PINCTRL_PIN ( MX35_PAD_USBOTG_PWR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_USBOTG_OC ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD6 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD7 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD8 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD9 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD11 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD12 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD13 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD14 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD15 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD16 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD17 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD18 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD19 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD20 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD21 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD22 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_LD23 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_HSYNC ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_FPSHIFT ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_DRDY ) ,
IMX_PINCTRL_PIN ( MX35_PAD_CONTRAST ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_VSYNC ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_REV ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_CLS ) ,
IMX_PINCTRL_PIN ( MX35_PAD_D3_SPL ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1_CMD ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1_DATA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1_DATA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1_DATA2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD1_DATA3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2_CMD ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2_DATA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2_DATA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2_DATA2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_SD2_DATA3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_CS0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_CS1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DIOR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DIOW ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DMACK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_RESET_B ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_IORDY ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA4 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA5 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA6 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA7 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA8 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA9 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA10 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA11 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA12 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA13 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA14 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DATA15 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_INTRQ ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_BUFF_EN ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DMARQ ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_ATA_DA2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_MLB_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_MLB_DAT ) ,
IMX_PINCTRL_PIN ( MX35_PAD_MLB_SIG ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TX_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RX_CLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RX_DV ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_COL ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RDATA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TDATA0 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TX_EN ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_MDC ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_MDIO ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TX_ERR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RX_ERR ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_CRS ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RDATA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TDATA1 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RDATA2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TDATA2 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_RDATA3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_FEC_TDATA3 ) ,
IMX_PINCTRL_PIN ( MX35_PAD_EXT_ARMCLK ) ,
IMX_PINCTRL_PIN ( MX35_PAD_TEST_MODE ) ,
} ;
static struct imx_pinctrl_soc_info imx35_pinctrl_info = {
. pins = imx35_pinctrl_pads ,
. npins = ARRAY_SIZE ( imx35_pinctrl_pads ) ,
. pin_regs = imx35_pin_regs ,
. npin_regs = ARRAY_SIZE ( imx35_pin_regs ) ,
} ;
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static struct of_device_id imx35_pinctrl_of_match [ ] = {
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{ . compatible = " fsl,imx35-iomuxc " , } ,
{ /* sentinel */ }
} ;
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static int imx35_pinctrl_probe ( struct platform_device * pdev )
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{
return imx_pinctrl_probe ( pdev , & imx35_pinctrl_info ) ;
}
static struct platform_driver imx35_pinctrl_driver = {
. driver = {
. name = " imx35-pinctrl " ,
. owner = THIS_MODULE ,
. of_match_table = of_match_ptr ( imx35_pinctrl_of_match ) ,
} ,
. probe = imx35_pinctrl_probe ,
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. remove = imx_pinctrl_remove ,
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} ;
static int __init imx35_pinctrl_init ( void )
{
return platform_driver_register ( & imx35_pinctrl_driver ) ;
}
arch_initcall ( imx35_pinctrl_init ) ;
static void __exit imx35_pinctrl_exit ( void )
{
platform_driver_unregister ( & imx35_pinctrl_driver ) ;
}
module_exit ( imx35_pinctrl_exit ) ;
MODULE_AUTHOR ( " Dong Aisheng <dong.aisheng@linaro.org> " ) ;
MODULE_DESCRIPTION ( " Freescale IMX35 pinctrl driver " ) ;
MODULE_LICENSE ( " GPL v2 " ) ;
