2005-04-17 02:20:36 +04:00
/ *
* S3 9 0 l o w - l e v e l e n t r y p o i n t s .
*
2012-07-20 13:15:04 +04:00
* Copyright I B M C o r p . 1 9 9 9 , 2 0 1 2
2005-04-17 02:20:36 +04:00
* Author( s ) : M a r t i n S c h w i d e f s k y ( s c h w i d e f s k y @de.ibm.com),
2006-09-28 18:56:37 +04:00
* Hartmut P e n n e r ( h p @de.ibm.com),
* Denis J o s e p h B a r r o w ( d j b a r r o w @de.ibm.com,barrow_dj@yahoo.com),
2005-06-26 01:55:30 +04:00
* Heiko C a r s t e n s < h e i k o . c a r s t e n s @de.ibm.com>
2005-04-17 02:20:36 +04:00
* /
2008-02-05 18:50:40 +03:00
# include < l i n u x / i n i t . h >
2011-07-24 12:48:19 +04:00
# include < l i n u x / l i n k a g e . h >
2012-09-05 15:26:11 +04:00
# include < a s m / p r o c e s s o r . h >
2005-04-17 02:20:36 +04:00
# include < a s m / c a c h e . h >
# include < a s m / e r r n o . h >
# include < a s m / p t r a c e . h >
# include < a s m / t h r e a d _ i n f o . h >
2005-09-09 22:57:26 +04:00
# include < a s m / a s m - o f f s e t s . h >
2005-04-17 02:20:36 +04:00
# include < a s m / u n i s t d . h >
# include < a s m / p a g e . h >
2012-06-04 17:05:43 +04:00
# include < a s m / s i g p . h >
2013-06-27 11:01:09 +04:00
# include < a s m / i r q . h >
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
# include < a s m / v x - i n s n . h >
2015-10-01 18:02:48 +03:00
# include < a s m / s e t u p . h >
# include < a s m / n m i . h >
2016-01-12 21:30:03 +03:00
# include < a s m / e x p o r t . h >
2005-04-17 02:20:36 +04:00
2011-12-27 14:27:15 +04:00
_ _ PT_ R 0 = _ _ P T _ G P R S
_ _ PT_ R 1 = _ _ P T _ G P R S + 8
_ _ PT_ R 2 = _ _ P T _ G P R S + 1 6
_ _ PT_ R 3 = _ _ P T _ G P R S + 2 4
_ _ PT_ R 4 = _ _ P T _ G P R S + 3 2
_ _ PT_ R 5 = _ _ P T _ G P R S + 4 0
_ _ PT_ R 6 = _ _ P T _ G P R S + 4 8
_ _ PT_ R 7 = _ _ P T _ G P R S + 5 6
_ _ PT_ R 8 = _ _ P T _ G P R S + 6 4
_ _ PT_ R 9 = _ _ P T _ G P R S + 7 2
_ _ PT_ R 1 0 = _ _ P T _ G P R S + 8 0
_ _ PT_ R 1 1 = _ _ P T _ G P R S + 8 8
_ _ PT_ R 1 2 = _ _ P T _ G P R S + 9 6
_ _ PT_ R 1 3 = _ _ P T _ G P R S + 1 0 4
_ _ PT_ R 1 4 = _ _ P T _ G P R S + 1 1 2
_ _ PT_ R 1 5 = _ _ P T _ G P R S + 1 2 0
2005-04-17 02:20:36 +04:00
2016-11-14 16:39:16 +03:00
STACK_ S H I F T = P A G E _ S H I F T + T H R E A D _ S I Z E _ O R D E R
2005-04-17 02:20:36 +04:00
STACK_ S I Z E = 1 < < S T A C K _ S H I F T
2013-04-24 12:20:43 +04:00
STACK_ I N I T = S T A C K _ S I Z E - S T A C K _ F R A M E _ O V E R H E A D - _ _ P T _ S I Z E
2005-04-17 02:20:36 +04:00
2014-09-22 18:39:06 +04:00
_ TIF_ W O R K = ( _ T I F _ S I G P E N D I N G | _ T I F _ N O T I F Y _ R E S U M E | _ T I F _ N E E D _ R E S C H E D | \
_ TIF_ U P R O B E )
2014-04-15 14:55:07 +04:00
_ TIF_ T R A C E = ( _ T I F _ S Y S C A L L _ T R A C E | _ T I F _ S Y S C A L L _ A U D I T | _ T I F _ S E C C O M P | \
_ TIF_ S Y S C A L L _ T R A C E P O I N T )
2017-02-17 10:12:30 +03:00
_ CIF_ W O R K = ( _ C I F _ M C C K _ P E N D I N G | _ C I F _ A S C E _ P R I M A R Y | _ C I F _ F P U )
2014-04-15 14:55:07 +04:00
_ PIF_ W O R K = ( _ P I F _ P E R _ T R A P )
2005-04-17 02:20:36 +04:00
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
# define B A S E D ( n a m e ) n a m e - c l e a n u p _ c r i t i c a l ( % r13 )
2005-04-17 02:20:36 +04:00
2006-07-03 11:24:46 +04:00
.macro TRACE_IRQS_ON
2011-12-27 14:27:15 +04:00
# ifdef C O N F I G _ T R A C E _ I R Q F L A G S
2010-05-17 12:00:02 +04:00
basr % r2 ,% r0
brasl % r14 ,t r a c e _ h a r d i r q s _ o n _ c a l l e r
2011-12-27 14:27:15 +04:00
# endif
2006-07-03 11:24:46 +04:00
.endm
.macro TRACE_IRQS_OFF
2011-12-27 14:27:15 +04:00
# ifdef C O N F I G _ T R A C E _ I R Q F L A G S
2010-05-17 12:00:02 +04:00
basr % r2 ,% r0
brasl % r14 ,t r a c e _ h a r d i r q s _ o f f _ c a l l e r
2007-11-20 13:13:32 +03:00
# endif
2011-12-27 14:27:15 +04:00
.endm
2007-11-20 13:13:32 +03:00
.macro LOCKDEP_SYS_EXIT
2011-12-27 14:27:15 +04:00
# ifdef C O N F I G _ L O C K D E P
tm _ _ P T _ P S W + 1 ( % r11 ) ,0 x01 # r e t u r n i n g t o u s e r ?
jz . + 1 0
2007-11-20 13:13:32 +03:00
brasl % r14 ,l o c k d e p _ s y s _ e x i t
2006-07-03 11:24:46 +04:00
# endif
2005-04-17 02:20:36 +04:00
.endm
2011-12-27 14:27:15 +04:00
.macro CHECK_STACK stacksize,s a v e a r e a
2006-06-29 16:58:05 +04:00
# ifdef C O N F I G _ C H E C K _ S T A C K
2011-12-27 14:27:15 +04:00
tml % r15 ,\ s t a c k s i z e - C O N F I G _ S T A C K _ G U A R D
lghi % r14 ,\ s a v e a r e a
jz s t a c k _ o v e r f l o w
2006-06-29 16:58:05 +04:00
# endif
.endm
2015-06-22 18:28:14 +03:00
.macro SWITCH_ASYNC savearea,t i m e r
2011-12-27 14:27:15 +04:00
tmhh % r8 ,0 x00 0 1 # i n t e r r u p t i n g f r o m u s e r ?
jnz 1 f
lgr % r14 ,% r9
slg % r14 ,B A S E D ( . L c r i t i c a l _ s t a r t )
clg % r14 ,B A S E D ( . L c r i t i c a l _ l e n g t h )
2005-04-17 02:20:36 +04:00
jhe 0 f
2011-12-27 14:27:15 +04:00
lghi % r11 ,\ s a v e a r e a # i n s i d e c r i t i c a l s e c t i o n , d o c l e a n u p
2005-04-17 02:20:36 +04:00
brasl % r14 ,c l e a n u p _ c r i t i c a l
2011-12-27 14:27:15 +04:00
tmhh % r8 ,0 x00 0 1 # r e t e s t p r o b l e m s t a t e a f t e r c l e a n u p
2005-04-17 02:20:36 +04:00
jnz 1 f
2015-06-22 18:28:14 +03:00
0 : lg % r14 ,_ _ L C _ A S Y N C _ S T A C K # a r e w e a l r e a d y o n t h e a s y n c s t a c k ?
2005-04-17 02:20:36 +04:00
slgr % r14 ,% r15
2015-06-22 18:28:14 +03:00
srag % r14 ,% r14 ,S T A C K _ S H I F T
2015-06-22 18:27:48 +03:00
jnz 2 f
2015-06-22 18:28:14 +03:00
CHECK_ S T A C K 1 < < S T A C K _ S H I F T ,\ s a v e a r e a
2013-04-24 12:20:43 +04:00
aghi % r15 ,- ( S T A C K _ F R A M E _ O V E R H E A D + _ _ P T _ S I Z E )
2015-06-22 18:27:48 +03:00
j 3 f
2017-01-25 14:54:17 +03:00
1 : UPDATE_ V T I M E % r14 ,% r15 ,\ t i m e r
2015-06-22 18:28:14 +03:00
2 : lg % r15 ,_ _ L C _ A S Y N C _ S T A C K # l o a d a s y n c s t a c k
2015-06-22 18:27:48 +03:00
3 : la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
2006-09-28 18:56:37 +04:00
.endm
2005-04-17 02:20:36 +04:00
2015-06-22 18:27:48 +03:00
.macro UPDATE_VTIME w1 ,w2 ,e n t e r _ t i m e r
lg \ w1 ,_ _ L C _ E X I T _ T I M E R
lg \ w2 ,_ _ L C _ L A S T _ U P D A T E _ T I M E R
slg \ w1 ,\ e n t e r _ t i m e r
slg \ w2 ,_ _ L C _ E X I T _ T I M E R
alg \ w1 ,_ _ L C _ U S E R _ T I M E R
alg \ w2 ,_ _ L C _ S Y S T E M _ T I M E R
stg \ w1 ,_ _ L C _ U S E R _ T I M E R
stg \ w2 ,_ _ L C _ S Y S T E M _ T I M E R
2011-12-27 14:27:15 +04:00
mvc _ _ L C _ L A S T _ U P D A T E _ T I M E R ( 8 ) ,\ e n t e r _ t i m e r
2005-04-17 02:20:36 +04:00
.endm
2010-10-25 18:10:37 +04:00
.macro REENABLE_IRQS
2011-12-27 14:27:15 +04:00
stg % r8 ,_ _ L C _ R E T U R N _ P S W
ni _ _ L C _ R E T U R N _ P S W ,0 x b f
ssm _ _ L C _ R E T U R N _ P S W
2010-10-25 18:10:37 +04:00
.endm
2012-05-09 18:27:39 +04:00
.macro STCK savearea
2012-05-14 12:35:22 +04:00
# ifdef C O N F I G _ H A V E _ M A R C H _ Z 9 _ 1 0 9 _ F E A T U R E S
2012-05-09 18:27:39 +04:00
.insn 0 x b27 c00 0 0 ,\ s a v e a r e a # s t o r e c l o c k f a s t
# else
.insn 0 x b20 5 0 0 0 0 ,\ s a v e a r e a # s t o r e c l o c k
# endif
.endm
2015-10-01 18:02:48 +03:00
/ *
* The T S T M S K m a c r o g e n e r a t e s a t e s t - u n d e r - m a s k i n s t r u c t i o n b y
* calculating t h e m e m o r y o f f s e t f o r t h e s p e c i f i e d m a s k v a l u e .
* Mask v a l u e c a n b e a n y c o n s t a n t . T h e m a c r o s h i f t s t h e m a s k
* value t o c a l c u l a t e t h e m e m o r y o f f s e t f o r t h e t e s t - u n d e r - m a s k
* instruction.
* /
.macro TSTMSK addr, m a s k , s i z e =8 , b y t e p o s =0
.if ( \ bytepos < \ s i z e ) & & ( \ m a s k > > 8 )
.if ( \ mask & 0 x f f )
.error " Mask e x c e e d s b y t e b o u n d a r y "
.endif
TSTMSK \ a d d r , " ( \ m a s k > > 8 ) " , \ s i z e , " ( \ b y t e p o s + 1 ) "
.exitm
.endif
.ifeq \ mask
.error " Mask m u s t n o t b e z e r o "
.endif
off = \ s i z e - \ b y t e p o s - 1
tm o f f + \ a d d r , \ m a s k
.endm
2011-01-05 14:47:25 +03:00
.section .kprobes .text , " ax"
2016-06-30 13:40:25 +03:00
.Ldummy :
/ *
* This n o p e x i s t s o n l y i n o r d e r t o a v o i d t h a t _ _ s w i t c h _ t o s t a r t s a t
* the b e g i n n i n g o f t h e k p r o b e s t e x t s e c t i o n . I n t h a t c a s e w e w o u l d
* have s e v e r a l s y m b o l s a t t h e s a m e a d d r e s s . E . g . o b j d u m p w o u l d t a k e
* an a r b i t r a r y s y m b o l n a m e w h e n d i s a s s e m b l i n g t h i s c o d e .
* With t h e a d d e d n o p i n b e t w e e n t h e _ _ s w i t c h _ t o s y m b o l i s u n i q u e
* again.
* /
nop 0
2011-01-05 14:47:25 +03:00
2005-04-17 02:20:36 +04:00
/ *
* Scheduler r e s u m e f u n c t i o n , c a l l e d b y s w i t c h _ t o
* gpr2 = ( t a s k _ s t r u c t * ) p r e v
* gpr3 = ( t a s k _ s t r u c t * ) n e x t
* Returns :
* gpr2 = p r e v
* /
2011-07-24 12:48:19 +04:00
ENTRY( _ _ s w i t c h _ t o )
2012-05-15 11:20:06 +04:00
stmg % r6 ,% r15 ,_ _ S F _ G P R S ( % r15 ) # s t o r e g p r s o f p r e v t a s k
2015-07-20 11:01:46 +03:00
lgr % r1 ,% r2
aghi % r1 ,_ _ T A S K _ t h r e a d # t h r e a d _ s t r u c t o f p r e v t a s k
2016-11-08 13:08:26 +03:00
lg % r5 ,_ _ T A S K _ s t a c k ( % r3 ) # s t a r t o f k e r n e l s t a c k o f n e x t
2015-07-20 11:01:46 +03:00
stg % r15 ,_ _ T H R E A D _ k s p ( % r1 ) # s t o r e k e r n e l s t a c k o f p r e v
lgr % r1 ,% r3
aghi % r1 ,_ _ T A S K _ t h r e a d # t h r e a d _ s t r u c t o f n e x t t a s k
2012-05-15 11:20:06 +04:00
lgr % r15 ,% r5
2013-04-24 12:20:43 +04:00
aghi % r15 ,S T A C K _ I N I T # e n d o f k e r n e l s t a c k o f n e x t
2012-05-15 11:20:06 +04:00
stg % r3 ,_ _ L C _ C U R R E N T # s t o r e t a s k s t r u c t o f n e x t
stg % r15 ,_ _ L C _ K E R N E L _ S T A C K # s t o r e e n d o f k e r n e l s t a c k
2015-07-20 11:01:46 +03:00
lg % r15 ,_ _ T H R E A D _ k s p ( % r1 ) # l o a d k e r n e l s t a c k o f n e x t
2016-02-29 18:05:35 +03:00
/* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
2012-05-15 11:20:06 +04:00
lctl % c4 ,% c4 ,_ _ T A S K _ p i d ( % r3 ) # l o a d p i d t o c o n t r o l r e g . 4
2015-10-06 19:06:15 +03:00
mvc _ _ L C _ C U R R E N T _ P I D ( 4 ,% r0 ) ,_ _ T A S K _ p i d ( % r3 ) # s t o r e p i d o f n e x t
2014-04-15 14:55:07 +04:00
lmg % r6 ,% r15 ,_ _ S F _ G P R S ( % r15 ) # l o a d g p r s o f n e x t t a s k
2015-10-06 19:06:15 +03:00
TSTMSK _ _ L C _ M A C H I N E _ F L A G S ,M A C H I N E _ F L A G _ L P P
bzr % r14
.insn 0 x b28 0 0 0 0 0 ,_ _ L C _ L P P # s e t p r o g r a m p a r a m e t e r
2005-04-17 02:20:36 +04:00
br % r14
2014-12-03 19:00:08 +03:00
.L__critical_start :
2015-06-22 18:26:40 +03:00
# if I S _ E N A B L E D ( C O N F I G _ K V M )
/ *
* sie6 4 a c a l l i n g c o n v e n t i o n :
* % r2 p o i n t e r t o s i e c o n t r o l b l o c k
* % r3 g u e s t r e g i s t e r s a v e a r e a
* /
ENTRY( s i e 6 4 a )
stmg % r6 ,% r14 ,_ _ S F _ G P R S ( % r15 ) # s a v e k e r n e l r e g i s t e r s
stg % r2 ,_ _ S F _ E M P T Y ( % r15 ) # s a v e c o n t r o l b l o c k p o i n t e r
stg % r3 ,_ _ S F _ E M P T Y + 8 ( % r15 ) # s a v e g u e s t r e g i s t e r s a v e a r e a
2015-10-06 19:06:15 +03:00
xc _ _ S F _ E M P T Y + 1 6 ( 8 ,% r15 ) ,_ _ S F _ E M P T Y + 1 6 ( % r15 ) # r e a s o n c o d e = 0
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ F P U # l o a d g u e s t f p / v x r e g i s t e r s ?
2015-06-22 18:26:40 +03:00
jno . L s i e _ l o a d _ g u e s t _ g p r s
brasl % r14 ,l o a d _ f p u _ r e g s # l o a d g u e s t f p / v x r e g s
.Lsie_load_guest_gprs :
lmg % r0 ,% r13 ,0 ( % r3 ) # l o a d g u e s t g p r s 0 - 1 3
lg % r14 ,_ _ L C _ G M A P # g e t g m a p p o i n t e r
ltgr % r14 ,% r14
jz . L s i e _ g m a p
lctlg % c1 ,% c1 ,_ _ G M A P _ A S C E ( % r14 ) # l o a d p r i m a r y a s c e
.Lsie_gmap :
lg % r14 ,_ _ S F _ E M P T Y ( % r15 ) # g e t c o n t r o l b l o c k p o i n t e r
oi _ _ S I E _ P R O G 0 C + 3 ( % r14 ) ,1 # w e a r e g o i n g i n t o S I E n o w
tm _ _ S I E _ P R O G 2 0 + 3 ( % r14 ) ,3 # l a s t e x i t . . .
jnz . L s i e _ s k i p
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ F P U
2015-06-22 18:26:40 +03:00
jo . L s i e _ s k i p # e x i t i f f p / v x r e g s c h a n g e d
sie 0 ( % r14 )
.Lsie_skip :
ni _ _ S I E _ P R O G 0 C + 3 ( % r14 ) ,0 x f e # n o l o n g e r i n S I E
lctlg % c1 ,% c1 ,_ _ L C _ U S E R _ A S C E # l o a d p r i m a r y a s c e
.Lsie_done :
# some p r o g r a m c h e c k s a r e s u p p r e s s i n g . C c o d e ( e . g . d o _ p r o t e c t i o n _ e x c e p t i o n )
# will r e w i n d t h e P S W b y t h e I L C , w h i c h i s 4 b y t e s i n c a s e o f S I E . O t h e r
# instructions b e t w e e n s i e 6 4 a a n d . L s i e _ d o n e s h o u l d n o t c a u s e p r o g r a m
# interrupts. S o l e t s u s e a n o p ( 4 7 0 0 0 0 0 0 ) a s a l a n d i n g p a d .
# See a l s o . L c l e a n u p _ s i e
.Lrewind_pad :
nop 0
.globl sie_exit
sie_exit :
lg % r14 ,_ _ S F _ E M P T Y + 8 ( % r15 ) # l o a d g u e s t r e g i s t e r s a v e a r e a
stmg % r0 ,% r13 ,0 ( % r14 ) # s a v e g u e s t g p r s 0 - 1 3
lmg % r6 ,% r14 ,_ _ S F _ G P R S ( % r15 ) # r e s t o r e k e r n e l r e g i s t e r s
2015-10-06 19:06:15 +03:00
lg % r2 ,_ _ S F _ E M P T Y + 1 6 ( % r15 ) # r e t u r n e x i t r e a s o n c o d e
2015-06-22 18:26:40 +03:00
br % r14
.Lsie_fault :
lghi % r14 ,- E F A U L T
2015-10-06 19:06:15 +03:00
stg % r14 ,_ _ S F _ E M P T Y + 1 6 ( % r15 ) # s e t e x i t r e a s o n c o d e
2015-06-22 18:26:40 +03:00
j s i e _ e x i t
EX_ T A B L E ( . L r e w i n d _ p a d ,. L s i e _ f a u l t )
EX_ T A B L E ( s i e _ e x i t ,. L s i e _ f a u l t )
2016-01-12 21:30:03 +03:00
EXPORT_ S Y M B O L ( s i e 6 4 a )
EXPORT_ S Y M B O L ( s i e _ e x i t )
2015-06-22 18:26:40 +03:00
# endif
2005-04-17 02:20:36 +04:00
/ *
* SVC i n t e r r u p t h a n d l e r r o u t i n e . S y s t e m c a l l s a r e s y n c h r o n o u s e v e n t s a n d
* are e x e c u t e d w i t h i n t e r r u p t s e n a b l e d .
* /
2011-07-24 12:48:19 +04:00
ENTRY( s y s t e m _ c a l l )
2008-12-25 15:39:25 +03:00
stpt _ _ L C _ S Y N C _ E N T E R _ T I M E R
2014-12-03 19:00:08 +03:00
.Lsysc_stmg :
2011-12-27 14:27:15 +04:00
stmg % r8 ,% r15 ,_ _ L C _ S A V E _ A R E A _ S Y N C
2016-11-08 13:08:26 +03:00
lg % r12 ,_ _ L C _ C U R R E N T
2017-01-25 14:54:17 +03:00
lghi % r13 ,_ _ T A S K _ t h r e a d
2014-04-15 14:55:07 +04:00
lghi % r14 ,_ P I F _ S Y S C A L L
2014-12-03 19:00:08 +03:00
.Lsysc_per :
2011-12-27 14:27:15 +04:00
lg % r15 ,_ _ L C _ K E R N E L _ S T A C K
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 ) # p o i n t e r t o p t _ r e g s
2015-06-22 18:27:48 +03:00
.Lsysc_vtime :
2017-01-25 14:54:17 +03:00
UPDATE_ V T I M E % r8 ,% r9 ,_ _ L C _ S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ P T _ R 8 ( 6 4 ,% r11 ) ,_ _ L C _ S A V E _ A R E A _ S Y N C
mvc _ _ P T _ P S W ( 1 6 ,% r11 ) ,_ _ L C _ S V C _ O L D _ P S W
2011-12-27 14:27:18 +04:00
mvc _ _ P T _ I N T _ C O D E ( 4 ,% r11 ) ,_ _ L C _ S V C _ I L C
2014-04-15 14:55:07 +04:00
stg % r14 ,_ _ P T _ F L A G S ( % r11 )
2014-12-03 19:00:08 +03:00
.Lsysc_do_svc :
2016-11-08 14:33:38 +03:00
# load a d d r e s s o f s y s t e m c a l l t a b l e
lg % r10 ,_ _ T H R E A D _ s y s c _ t a b l e ( % r13 ,% r12 )
2011-12-27 14:27:18 +04:00
llgh % r8 ,_ _ P T _ I N T _ C O D E + 2 ( % r11 )
2011-12-27 14:27:15 +04:00
slag % r8 ,% r8 ,2 # s h i f t a n d t e s t f o r s v c 0
2014-12-03 19:00:08 +03:00
jnz . L s y s c _ n r _ o k
2005-04-17 02:20:36 +04:00
# svc 0 : system c a l l n u m b e r i n % r1
2011-12-27 14:27:15 +04:00
llgfr % r1 ,% r1 # c l e a r h i g h w o r d i n r 1
2010-05-17 12:00:05 +04:00
cghi % r1 ,N R _ s y s c a l l s
2014-12-03 19:00:08 +03:00
jnl . L s y s c _ n r _ o k
2011-12-27 14:27:18 +04:00
sth % r1 ,_ _ P T _ I N T _ C O D E + 2 ( % r11 )
2011-12-27 14:27:15 +04:00
slag % r8 ,% r1 ,2
2014-12-03 19:00:08 +03:00
.Lsysc_nr_ok :
2011-12-27 14:27:15 +04:00
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
stg % r2 ,_ _ P T _ O R I G _ G P R 2 ( % r11 )
stg % r7 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
lgf % r9 ,0 ( % r8 ,% r10 ) # g e t s y s t e m c a l l a d d .
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ T R A C E
2014-12-03 19:00:08 +03:00
jnz . L s y s c _ t r a c e s y s
2011-12-27 14:27:15 +04:00
basr % r14 ,% r9 # c a l l s y s _ x x x x
stg % r2 ,_ _ P T _ R 2 ( % r11 ) # s t o r e r e t u r n v a l u e
2005-04-17 02:20:36 +04:00
2014-12-03 19:00:08 +03:00
.Lsysc_return :
2010-05-17 12:00:02 +04:00
LOCKDEP_ S Y S _ E X I T
2014-12-03 19:00:08 +03:00
.Lsysc_tif :
2015-10-01 18:02:48 +03:00
TSTMSK _ _ P T _ F L A G S ( % r11 ) ,_ P I F _ W O R K
2014-12-03 19:00:08 +03:00
jnz . L s y s c _ w o r k
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ W O R K
2014-12-03 19:00:08 +03:00
jnz . L s y s c _ w o r k # c h e c k f o r w o r k
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ W O R K
2014-12-03 19:00:08 +03:00
jnz . L s y s c _ w o r k
.Lsysc_restore :
2011-12-27 14:27:15 +04:00
lg % r14 ,_ _ L C _ V D S O _ P E R _ C P U
lmg % r0 ,% r10 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ L C _ R E T U R N _ P S W ( 1 6 ) ,_ _ P T _ P S W ( % r11 )
stpt _ _ L C _ E X I T _ T I M E R
mvc _ _ V D S O _ E C T G _ B A S E ( 1 6 ,% r14 ) ,_ _ L C _ E X I T _ T I M E R
lmg % r11 ,% r15 ,_ _ P T _ R 1 1 ( % r11 )
lpswe _ _ L C _ R E T U R N _ P S W
2014-12-03 19:00:08 +03:00
.Lsysc_done :
2007-11-20 13:13:32 +03:00
2010-05-17 12:00:01 +04:00
#
# One o f t h e w o r k b i t s i s o n . F i n d o u t w h i c h o n e .
#
2014-12-03 19:00:08 +03:00
.Lsysc_work :
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ M C C K _ P E N D I N G
2014-12-03 19:00:08 +03:00
jo . L s y s c _ m c c k _ p e n d i n g
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ N E E D _ R E S C H E D
2014-12-03 19:00:08 +03:00
jo . L s y s c _ r e s c h e d u l e
2014-09-22 18:39:06 +04:00
# ifdef C O N F I G _ U P R O B E S
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ U P R O B E
2014-12-03 19:00:08 +03:00
jo . L s y s c _ u p r o b e _ n o t i f y
2014-09-22 18:39:06 +04:00
# endif
2015-10-01 18:02:48 +03:00
TSTMSK _ _ P T _ F L A G S ( % r11 ) ,_ P I F _ P E R _ T R A P
2014-12-03 19:00:08 +03:00
jo . L s y s c _ s i n g l e s t e p
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ S I G P E N D I N G
2014-12-03 19:00:08 +03:00
jo . L s y s c _ s i g p e n d i n g
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ N O T I F Y _ R E S U M E
2014-12-03 19:00:08 +03:00
jo . L s y s c _ n o t i f y _ r e s u m e
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ F P U
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
jo . L s y s c _ v x r s
2017-02-17 10:12:30 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ A S C E _ P R I M A R Y
jo . L s y s c _ a s c e _ p r i m a r y
2014-12-03 19:00:08 +03:00
j . L s y s c _ r e t u r n # b e w a r e o f c r i t i c a l s e c t i o n c l e a n u p
2005-04-17 02:20:36 +04:00
#
# _ TIF_ N E E D _ R E S C H E D i s s e t , c a l l s c h e d u l e
2006-09-28 18:56:37 +04:00
#
2014-12-03 19:00:08 +03:00
.Lsysc_reschedule :
larl % r14 ,. L s y s c _ r e t u r n
2011-12-27 14:27:15 +04:00
jg s c h e d u l e
2005-04-17 02:20:36 +04:00
2005-06-26 01:55:30 +04:00
#
2014-04-15 14:55:07 +04:00
# _ CIF_ M C C K _ P E N D I N G i s s e t , c a l l h a n d l e r
2005-06-26 01:55:30 +04:00
#
2014-12-03 19:00:08 +03:00
.Lsysc_mcck_pending :
larl % r14 ,. L s y s c _ r e t u r n
2006-09-28 18:56:37 +04:00
jg s39 0 _ h a n d l e _ m c c k # T I F b i t w i l l b e c l e a r e d b y h a n d l e r
2005-06-26 01:55:30 +04:00
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
#
2017-02-17 10:12:30 +03:00
# _ CIF_ A S C E _ P R I M A R Y i s s e t , l o a d u s e r s p a c e a s c e
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
#
2017-02-17 10:12:30 +03:00
.Lsysc_asce_primary :
ni _ _ L C _ C P U _ F L A G S + 7 ,2 5 5 - _ C I F _ A S C E _ P R I M A R Y
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
lctlg % c1 ,% c1 ,_ _ L C _ U S E R _ A S C E # l o a d p r i m a r y a s c e
2014-12-03 19:00:08 +03:00
j . L s y s c _ r e t u r n
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
#
# CIF_ F P U i s s e t , r e s t o r e f l o a t i n g - p o i n t c o n t r o l s a n d f l o a t i n g - p o i n t r e g i s t e r s .
#
.Lsysc_vxrs :
larl % r14 ,. L s y s c _ r e t u r n
jg l o a d _ f p u _ r e g s
2005-04-17 02:20:36 +04:00
#
2008-04-30 11:53:08 +04:00
# _ TIF_ S I G P E N D I N G i s s e t , c a l l d o _ s i g n a l
2005-04-17 02:20:36 +04:00
#
2014-12-03 19:00:08 +03:00
.Lsysc_sigpending :
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
brasl % r14 ,d o _ s i g n a l
2015-10-01 18:02:48 +03:00
TSTMSK _ _ P T _ F L A G S ( % r11 ) ,_ P I F _ S Y S C A L L
2014-12-03 19:00:08 +03:00
jno . L s y s c _ r e t u r n
2016-03-22 12:54:24 +03:00
.Lsysc_do_syscall :
lghi % r13 ,_ _ T A S K _ t h r e a d
2011-12-27 14:27:15 +04:00
lmg % r2 ,% r7 ,_ _ P T _ R 2 ( % r11 ) # l o a d s v c a r g u m e n t s
2016-03-22 12:54:24 +03:00
lghi % r1 ,0 # s v c 0 r e t u r n s - E N O S Y S
j . L s y s c _ d o _ s v c
2005-04-17 02:20:36 +04:00
2008-10-10 23:33:20 +04:00
#
# _ TIF_ N O T I F Y _ R E S U M E i s s e t , c a l l d o _ n o t i f y _ r e s u m e
#
2014-12-03 19:00:08 +03:00
.Lsysc_notify_resume :
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2014-12-03 19:00:08 +03:00
larl % r14 ,. L s y s c _ r e t u r n
2011-12-27 14:27:15 +04:00
jg d o _ n o t i f y _ r e s u m e
2008-10-10 23:33:20 +04:00
2014-09-22 18:39:06 +04:00
#
# _ TIF_ U P R O B E i s s e t , c a l l u p r o b e _ n o t i f y _ r e s u m e
#
# ifdef C O N F I G _ U P R O B E S
2014-12-03 19:00:08 +03:00
.Lsysc_uprobe_notify :
2014-09-22 18:39:06 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2014-12-03 19:00:08 +03:00
larl % r14 ,. L s y s c _ r e t u r n
2014-09-22 18:39:06 +04:00
jg u p r o b e _ n o t i f y _ r e s u m e
# endif
2005-04-17 02:20:36 +04:00
#
2014-04-15 14:55:07 +04:00
# _ PIF_ P E R _ T R A P i s s e t , c a l l d o _ p e r _ t r a p
2005-04-17 02:20:36 +04:00
#
2014-12-03 19:00:08 +03:00
.Lsysc_singlestep :
2014-04-15 14:55:07 +04:00
ni _ _ P T _ F L A G S + 7 ( % r11 ) ,2 5 5 - _ P I F _ P E R _ T R A P
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2014-12-03 19:00:08 +03:00
larl % r14 ,. L s y s c _ r e t u r n
2011-01-05 14:48:10 +03:00
jg d o _ p e r _ t r a p
2005-04-17 02:20:36 +04:00
#
2008-10-10 23:33:20 +04:00
# call t r a c e h o o k _ r e p o r t _ s y s c a l l _ e n t r y / t r a c e h o o k _ r e p o r t _ s y s c a l l _ e x i t b e f o r e
# and a f t e r t h e s y s t e m c a l l
2005-04-17 02:20:36 +04:00
#
2014-12-03 19:00:08 +03:00
.Lsysc_tracesys :
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2005-04-17 02:20:36 +04:00
la % r3 ,0
2011-12-27 14:27:18 +04:00
llgh % r0 ,_ _ P T _ I N T _ C O D E + 2 ( % r11 )
2011-12-27 14:27:15 +04:00
stg % r0 ,_ _ P T _ R 2 ( % r11 )
2008-10-10 23:33:20 +04:00
brasl % r14 ,d o _ s y s c a l l _ t r a c e _ e n t e r
2005-04-17 02:20:36 +04:00
lghi % r0 ,N R _ s y s c a l l s
2008-10-10 23:33:20 +04:00
clgr % r0 ,% r2
2014-12-03 19:00:08 +03:00
jnh . L s y s c _ t r a c e n o g o
2011-12-27 14:27:15 +04:00
sllg % r8 ,% r2 ,2
lgf % r9 ,0 ( % r8 ,% r10 )
2014-12-03 19:00:08 +03:00
.Lsysc_tracego :
2011-12-27 14:27:15 +04:00
lmg % r3 ,% r7 ,_ _ P T _ R 3 ( % r11 )
stg % r7 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
lg % r2 ,_ _ P T _ O R I G _ G P R 2 ( % r11 )
basr % r14 ,% r9 # c a l l s y s _ x x x
stg % r2 ,_ _ P T _ R 2 ( % r11 ) # s t o r e r e t u r n v a l u e
2014-12-03 19:00:08 +03:00
.Lsysc_tracenogo :
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ T R A C E
2014-12-03 19:00:08 +03:00
jz . L s y s c _ r e t u r n
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2014-12-03 19:00:08 +03:00
larl % r14 ,. L s y s c _ r e t u r n
2008-10-10 23:33:20 +04:00
jg d o _ s y s c a l l _ t r a c e _ e x i t
2005-04-17 02:20:36 +04:00
#
# a n e w p r o c e s s e x i t s t h e k e r n e l w i t h r e t _ f r o m _ f o r k
#
2011-07-24 12:48:19 +04:00
ENTRY( r e t _ f r o m _ f o r k )
2011-12-27 14:27:15 +04:00
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
2016-11-08 13:08:26 +03:00
lg % r12 ,_ _ L C _ C U R R E N T
2012-09-11 02:03:41 +04:00
brasl % r14 ,s c h e d u l e _ t a i l
TRACE_ I R Q S _ O N
ssm _ _ L C _ S V C _ N E W _ P S W # r e e n a b l e i n t e r r u p t s
2012-10-11 23:30:14 +04:00
tm _ _ P T _ P S W + 1 ( % r11 ) ,0 x01 # f o r k i n g a k e r n e l t h r e a d ?
2014-12-03 19:00:08 +03:00
jne . L s y s c _ t r a c e n o g o
2012-10-11 23:30:14 +04:00
# it' s a k e r n e l t h r e a d
lmg % r9 ,% r10 ,_ _ P T _ R 9 ( % r11 ) # l o a d g p r s
2012-09-11 02:03:41 +04:00
ENTRY( k e r n e l _ t h r e a d _ s t a r t e r )
la % r2 ,0 ( % r10 )
basr % r14 ,% r9
2014-12-03 19:00:08 +03:00
j . L s y s c _ t r a c e n o g o
2005-04-17 02:20:36 +04:00
/ *
* Program c h e c k h a n d l e r r o u t i n e
* /
2011-07-24 12:48:19 +04:00
ENTRY( p g m _ c h e c k _ h a n d l e r )
2008-12-25 15:39:25 +03:00
stpt _ _ L C _ S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
stmg % r8 ,% r15 ,_ _ L C _ S A V E _ A R E A _ S Y N C
lg % r10 ,_ _ L C _ L A S T _ B R E A K
2016-11-08 13:08:26 +03:00
lg % r12 ,_ _ L C _ C U R R E N T
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
larl % r13 ,c l e a n u p _ c r i t i c a l
2011-12-27 14:27:15 +04:00
lmg % r8 ,% r9 ,_ _ L C _ P G M _ O L D _ P S W
tmhh % r8 ,0 x00 0 1 # t e s t p r o b l e m s t a t e b i t
2015-06-22 18:26:40 +03:00
jnz 2 f # - > f a u l t i n u s e r s p a c e
# if I S _ E N A B L E D ( C O N F I G _ K V M )
# cleanup c r i t i c a l s e c t i o n f o r s i e 6 4 a
lgr % r14 ,% r9
slg % r14 ,B A S E D ( . L s i e _ c r i t i c a l _ s t a r t )
clg % r14 ,B A S E D ( . L s i e _ c r i t i c a l _ l e n g t h )
jhe 0 f
brasl % r14 ,. L c l e a n u p _ s i e
# endif
0 : tmhh % r8 ,0 x40 0 0 # P E R b i t s e t i n o l d P S W ?
jnz 1 f # - > e n a b l e d , c a n ' t b e a d o u b l e f a u l t
2011-12-27 14:27:15 +04:00
tm _ _ L C _ P G M _ I L C + 3 ,0 x80 # c h e c k f o r p e r e x c e p t i o n
2014-12-03 19:00:08 +03:00
jnz . L p g m _ s v c p e r # - > s i n g l e s t e p p e d s v c
2015-06-22 18:26:40 +03:00
1 : CHECK_ S T A C K S T A C K _ S I Z E ,_ _ L C _ S A V E _ A R E A _ S Y N C
2013-04-24 12:20:43 +04:00
aghi % r15 ,- ( S T A C K _ F R A M E _ O V E R H E A D + _ _ P T _ S I Z E )
2015-06-22 18:26:40 +03:00
j 3 f
2017-01-25 14:54:17 +03:00
2 : UPDATE_ V T I M E % r14 ,% r15 ,_ _ L C _ S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
lg % r15 ,_ _ L C _ K E R N E L _ S T A C K
2016-11-08 13:08:26 +03:00
lgr % r14 ,% r12
2015-07-20 11:01:46 +03:00
aghi % r14 ,_ _ T A S K _ t h r e a d # p o i n t e r t o t h r e a d _ s t r u c t
2012-07-31 13:03:04 +04:00
lghi % r13 ,_ _ L C _ P G M _ T D B
tm _ _ L C _ P G M _ I L C + 2 ,0 x02 # c h e c k f o r t r a n s a c t i o n a b o r t
2015-06-22 18:26:40 +03:00
jz 3 f
2012-07-31 13:03:04 +04:00
mvc _ _ T H R E A D _ t r a p _ t d b ( 2 5 6 ,% r14 ) ,0 ( % r13 )
2015-06-22 18:26:40 +03:00
3 : la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
2017-01-25 14:54:17 +03:00
stg % r10 ,_ _ T H R E A D _ l a s t _ b r e a k ( % r14 )
2011-12-27 14:27:15 +04:00
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ P T _ R 8 ( 6 4 ,% r11 ) ,_ _ L C _ S A V E _ A R E A _ S Y N C
stmg % r8 ,% r9 ,_ _ P T _ P S W ( % r11 )
2011-12-27 14:27:18 +04:00
mvc _ _ P T _ I N T _ C O D E ( 4 ,% r11 ) ,_ _ L C _ P G M _ I L C
mvc _ _ P T _ I N T _ P A R M _ L O N G ( 8 ,% r11 ) ,_ _ L C _ T R A N S _ E X C _ C O D E
2014-04-15 14:55:07 +04:00
xc _ _ P T _ F L A G S ( 8 ,% r11 ) ,_ _ P T _ F L A G S ( % r11 )
2011-12-27 14:27:15 +04:00
stg % r10 ,_ _ P T _ A R G S ( % r11 )
tm _ _ L C _ P G M _ I L C + 3 ,0 x80 # c h e c k f o r p e r e x c e p t i o n
2015-06-22 18:26:40 +03:00
jz 4 f
2011-12-27 14:27:15 +04:00
tmhh % r8 ,0 x00 0 1 # k e r n e l p e r e v e n t ?
2014-12-03 19:00:08 +03:00
jz . L p g m _ k p r o b e
2014-04-15 14:55:07 +04:00
oi _ _ P T _ F L A G S + 7 ( % r11 ) ,_ P I F _ P E R _ T R A P
2012-07-31 13:03:04 +04:00
mvc _ _ T H R E A D _ p e r _ a d d r e s s ( 8 ,% r14 ) ,_ _ L C _ P E R _ A D D R E S S
2014-02-26 19:32:46 +04:00
mvc _ _ T H R E A D _ p e r _ c a u s e ( 2 ,% r14 ) ,_ _ L C _ P E R _ C O D E
mvc _ _ T H R E A D _ p e r _ p a i d ( 1 ,% r14 ) ,_ _ L C _ P E R _ A C C E S S _ I D
2015-06-22 18:26:40 +03:00
4 : REENABLE_ I R Q S
2011-12-27 14:27:15 +04:00
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
2010-07-27 21:29:37 +04:00
larl % r1 ,p g m _ c h e c k _ t a b l e
2011-12-27 14:27:18 +04:00
llgh % r10 ,_ _ P T _ I N T _ C O D E + 2 ( % r11 )
nill % r10 ,0 x00 7 f
2012-10-18 20:10:06 +04:00
sll % r10 ,2
2015-06-22 18:27:48 +03:00
je . L p g m _ r e t u r n
2012-10-18 20:10:06 +04:00
lgf % r1 ,0 ( % r10 ,% r1 ) # l o a d a d d r e s s o f h a n d l e r r o u t i n e
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2010-07-27 21:29:37 +04:00
basr % r14 ,% r1 # b r a n c h t o i n t e r r u p t - h a n d l e r
2015-06-22 18:27:48 +03:00
.Lpgm_return :
LOCKDEP_ S Y S _ E X I T
tm _ _ P T _ P S W + 1 ( % r11 ) ,0 x01 # r e t u r n i n g t o u s e r ?
jno . L s y s c _ r e s t o r e
2016-03-22 12:54:24 +03:00
TSTMSK _ _ P T _ F L A G S ( % r11 ) ,_ P I F _ S Y S C A L L
jo . L s y s c _ d o _ s y s c a l l
2015-06-22 18:27:48 +03:00
j . L s y s c _ t i f
2005-04-17 02:20:36 +04:00
#
2011-12-27 14:27:15 +04:00
# PER e v e n t i n s u p e r v i s o r s t a t e , m u s t b e k p r o b e s
2005-04-17 02:20:36 +04:00
#
2014-12-03 19:00:08 +03:00
.Lpgm_kprobe :
2011-12-27 14:27:15 +04:00
REENABLE_ I R Q S
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
brasl % r14 ,d o _ p e r _ t r a p
2015-06-22 18:27:48 +03:00
j . L p g m _ r e t u r n
2005-04-17 02:20:36 +04:00
2006-09-20 17:58:39 +04:00
#
2011-12-27 14:27:15 +04:00
# single s t e p p e d s y s t e m c a l l
2006-09-20 17:58:39 +04:00
#
2014-12-03 19:00:08 +03:00
.Lpgm_svcper :
2011-12-27 14:27:15 +04:00
mvc _ _ L C _ R E T U R N _ P S W ( 8 ) ,_ _ L C _ S V C _ N E W _ P S W
2017-02-20 11:51:36 +03:00
lghi % r13 ,_ _ T A S K _ t h r e a d
2014-12-03 19:00:08 +03:00
larl % r14 ,. L s y s c _ p e r
2011-12-27 14:27:15 +04:00
stg % r14 ,_ _ L C _ R E T U R N _ P S W + 8
2014-04-15 14:55:07 +04:00
lghi % r14 ,_ P I F _ S Y S C A L L | _ P I F _ P E R _ T R A P
2014-12-03 19:00:08 +03:00
lpswe _ _ L C _ R E T U R N _ P S W # b r a n c h t o . L s y s c _ p e r a n d e n a b l e i r q s
2006-09-20 17:58:39 +04:00
2005-04-17 02:20:36 +04:00
/ *
* IO i n t e r r u p t h a n d l e r r o u t i n e
* /
2011-07-24 12:48:19 +04:00
ENTRY( i o _ i n t _ h a n d l e r )
2012-05-09 18:27:39 +04:00
STCK _ _ L C _ I N T _ C L O C K
2008-12-31 17:11:41 +03:00
stpt _ _ L C _ A S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
stmg % r8 ,% r15 ,_ _ L C _ S A V E _ A R E A _ A S Y N C
2016-11-08 13:08:26 +03:00
lg % r12 ,_ _ L C _ C U R R E N T
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
larl % r13 ,c l e a n u p _ c r i t i c a l
2011-12-27 14:27:15 +04:00
lmg % r8 ,% r9 ,_ _ L C _ I O _ O L D _ P S W
2015-06-22 18:28:14 +03:00
SWITCH_ A S Y N C _ _ L C _ S A V E _ A R E A _ A S Y N C ,_ _ L C _ A S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ P T _ R 8 ( 6 4 ,% r11 ) ,_ _ L C _ S A V E _ A R E A _ A S Y N C
stmg % r8 ,% r9 ,_ _ P T _ P S W ( % r11 )
2013-06-17 16:54:02 +04:00
mvc _ _ P T _ I N T _ C O D E ( 1 2 ,% r11 ) ,_ _ L C _ S U B C H A N N E L _ I D
2014-04-15 14:55:07 +04:00
xc _ _ P T _ F L A G S ( 8 ,% r11 ) ,_ _ P T _ F L A G S ( % r11 )
2015-08-15 12:42:21 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ I G N O R E _ I R Q
jo . L i o _ r e s t o r e
2006-07-03 11:24:46 +04:00
TRACE_ I R Q S _ O F F
2011-12-27 14:27:15 +04:00
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
2014-12-03 19:00:08 +03:00
.Lio_loop :
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2013-06-27 11:01:09 +04:00
lghi % r3 ,I O _ I N T E R R U P T
tm _ _ P T _ I N T _ C O D E + 8 ( % r11 ) ,0 x80 # a d a p t e r i n t e r r u p t ?
2014-12-03 19:00:08 +03:00
jz . L i o _ c a l l
2013-06-27 11:01:09 +04:00
lghi % r3 ,T H I N _ I N T E R R U P T
2014-12-03 19:00:08 +03:00
.Lio_call :
2011-12-27 14:27:15 +04:00
brasl % r14 ,d o _ I R Q
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ M A C H I N E _ F L A G S ,M A C H I N E _ F L A G _ L P A R
2014-12-03 19:00:08 +03:00
jz . L i o _ r e t u r n
2013-06-17 16:54:02 +04:00
tpi 0
2014-12-03 19:00:08 +03:00
jz . L i o _ r e t u r n
2013-06-17 16:54:02 +04:00
mvc _ _ P T _ I N T _ C O D E ( 1 2 ,% r11 ) ,_ _ L C _ S U B C H A N N E L _ I D
2014-12-03 19:00:08 +03:00
j . L i o _ l o o p
.Lio_return :
2010-05-17 12:00:02 +04:00
LOCKDEP_ S Y S _ E X I T
TRACE_ I R Q S _ O N
2014-12-03 19:00:08 +03:00
.Lio_tif :
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ W O R K
2014-12-03 19:00:08 +03:00
jnz . L i o _ w o r k # t h e r e i s w o r k t o d o ( s i g n a l s e t c . )
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ W O R K
2014-12-03 19:00:08 +03:00
jnz . L i o _ w o r k
.Lio_restore :
2011-12-27 14:27:15 +04:00
lg % r14 ,_ _ L C _ V D S O _ P E R _ C P U
lmg % r0 ,% r10 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ L C _ R E T U R N _ P S W ( 1 6 ) ,_ _ P T _ P S W ( % r11 )
stpt _ _ L C _ E X I T _ T I M E R
mvc _ _ V D S O _ E C T G _ B A S E ( 1 6 ,% r14 ) ,_ _ L C _ E X I T _ T I M E R
lmg % r11 ,% r15 ,_ _ P T _ R 1 1 ( % r11 )
lpswe _ _ L C _ R E T U R N _ P S W
2014-12-03 19:00:08 +03:00
.Lio_done :
2005-04-17 02:20:36 +04:00
2008-05-07 11:22:52 +04:00
#
2010-05-17 12:00:01 +04:00
# There i s w o r k t o d o , f i n d o u t i n w h i c h c o n t e x t w e h a v e b e e n i n t e r r u p t e d :
2014-04-15 14:55:07 +04:00
# 1 ) if w e r e t u r n t o u s e r s p a c e w e c a n d o a l l _ T I F _ W O R K w o r k
2010-05-17 12:00:01 +04:00
# 2 ) if w e r e t u r n t o k e r n e l c o d e a n d k v m i s e n a b l e d c h e c k i f w e n e e d t o
# modify t h e p s w t o l e a v e S I E
# 3 ) if w e r e t u r n t o k e r n e l c o d e a n d p r e e m p t i v e s c h e d u l i n g i s e n a b l e d c h e c k
# the p r e e m p t i o n c o u n t e r a n d i f i t i s z e r o c a l l p r e e m p t _ s c h e d u l e _ i r q
# Before a n y w o r k c a n b e d o n e , a s w i t c h t o t h e k e r n e l s t a c k i s r e q u i r e d .
2008-05-07 11:22:52 +04:00
#
2014-12-03 19:00:08 +03:00
.Lio_work :
2011-12-27 14:27:15 +04:00
tm _ _ P T _ P S W + 1 ( % r11 ) ,0 x01 # r e t u r n i n g t o u s e r ?
2014-12-03 19:00:08 +03:00
jo . L i o _ w o r k _ u s e r # y e s - > d o r e s c h e d & s i g n a l
2010-05-17 12:00:01 +04:00
# ifdef C O N F I G _ P R E E M P T
2008-05-07 11:22:52 +04:00
# check f o r p r e e m p t i v e s c h e d u l i n g
2016-10-25 13:21:44 +03:00
icm % r0 ,1 5 ,_ _ L C _ P R E E M P T _ C O U N T
2014-12-03 19:00:08 +03:00
jnz . L i o _ r e s t o r e # p r e e m p t i o n i s d i s a b l e d
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ N E E D _ R E S C H E D
2014-12-03 19:00:08 +03:00
jno . L i o _ r e s t o r e
2005-04-17 02:20:36 +04:00
# switch t o k e r n e l s t a c k
2011-12-27 14:27:15 +04:00
lg % r1 ,_ _ P T _ R 1 5 ( % r11 )
aghi % r1 ,- ( S T A C K _ F R A M E _ O V E R H E A D + _ _ P T _ S I Z E )
mvc S T A C K _ F R A M E _ O V E R H E A D ( _ _ P T _ S I Z E ,% r1 ) ,0 ( % r11 )
xc _ _ S F _ B A C K C H A I N ( 8 ,% r1 ) ,_ _ S F _ B A C K C H A I N ( % r1 )
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r1 )
2005-04-17 02:20:36 +04:00
lgr % r15 ,% r1
2014-12-03 19:00:08 +03:00
# TRACE_ I R Q S _ O N a l r e a d y d o n e a t . L i o _ r e t u r n , c a l l
2010-05-17 12:00:02 +04:00
# TRACE_ I R Q S _ O F F t o k e e p t h i n g s s y m m e t r i c a l
TRACE_ I R Q S _ O F F
brasl % r14 ,p r e e m p t _ s c h e d u l e _ i r q
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
2010-05-17 12:00:02 +04:00
# else
2014-12-03 19:00:08 +03:00
j . L i o _ r e s t o r e
2010-05-17 12:00:02 +04:00
# endif
2005-04-17 02:20:36 +04:00
2010-05-17 12:00:01 +04:00
#
# Need t o d o w o r k b e f o r e r e t u r n i n g t o u s e r s p a c e , s w i t c h t o k e r n e l s t a c k
#
2014-12-03 19:00:08 +03:00
.Lio_work_user :
2005-04-17 02:20:36 +04:00
lg % r1 ,_ _ L C _ K E R N E L _ S T A C K
2011-12-27 14:27:15 +04:00
mvc S T A C K _ F R A M E _ O V E R H E A D ( _ _ P T _ S I Z E ,% r1 ) ,0 ( % r11 )
xc _ _ S F _ B A C K C H A I N ( 8 ,% r1 ) ,_ _ S F _ B A C K C H A I N ( % r1 )
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r1 )
2005-04-17 02:20:36 +04:00
lgr % r15 ,% r1
2010-05-17 12:00:01 +04:00
2005-04-17 02:20:36 +04:00
#
# One o f t h e w o r k b i t s i s o n . F i n d o u t w h i c h o n e .
#
2014-12-03 19:00:08 +03:00
.Lio_work_tif :
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ M C C K _ P E N D I N G
2014-12-03 19:00:08 +03:00
jo . L i o _ m c c k _ p e n d i n g
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ N E E D _ R E S C H E D
2014-12-03 19:00:08 +03:00
jo . L i o _ r e s c h e d u l e
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ S I G P E N D I N G
2014-12-03 19:00:08 +03:00
jo . L i o _ s i g p e n d i n g
2015-10-01 18:02:48 +03:00
TSTMSK _ _ T I _ f l a g s ( % r12 ) ,_ T I F _ N O T I F Y _ R E S U M E
2014-12-03 19:00:08 +03:00
jo . L i o _ n o t i f y _ r e s u m e
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ F P U
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
jo . L i o _ v x r s
2017-02-17 10:12:30 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ A S C E _ P R I M A R Y
jo . L i o _ a s c e _ p r i m a r y
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n # b e w a r e o f c r i t i c a l s e c t i o n c l e a n u p
2008-05-07 11:22:53 +04:00
2005-06-26 01:55:30 +04:00
#
2014-04-15 14:55:07 +04:00
# _ CIF_ M C C K _ P E N D I N G i s s e t , c a l l h a n d l e r
2005-06-26 01:55:30 +04:00
#
2014-12-03 19:00:08 +03:00
.Lio_mcck_pending :
# TRACE_ I R Q S _ O N a l r e a d y d o n e a t . L i o _ r e t u r n
2007-07-27 14:29:18 +04:00
brasl % r14 ,s39 0 _ h a n d l e _ m c c k # T I F b i t w i l l b e c l e a r e d b y h a n d l e r
2010-05-17 12:00:02 +04:00
TRACE_ I R Q S _ O F F
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
2005-06-26 01:55:30 +04:00
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
#
2017-02-17 10:12:30 +03:00
# _ CIF_ A S C E _ P R I M A R Y i s s e t , l o a d u s e r s p a c e a s c e
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
#
2017-02-17 10:12:30 +03:00
.Lio_asce_primary :
ni _ _ L C _ C P U _ F L A G S + 7 ,2 5 5 - _ C I F _ A S C E _ P R I M A R Y
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
lctlg % c1 ,% c1 ,_ _ L C _ U S E R _ A S C E # l o a d p r i m a r y a s c e
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
s390/uaccess: rework uaccess code - fix locking issues
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-03-21 13:42:25 +04:00
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
#
# CIF_ F P U i s s e t , r e s t o r e f l o a t i n g - p o i n t c o n t r o l s a n d f l o a t i n g - p o i n t r e g i s t e r s .
#
.Lio_vxrs :
larl % r14 ,. L i o _ r e t u r n
jg l o a d _ f p u _ r e g s
2005-04-17 02:20:36 +04:00
#
# _ TIF_ N E E D _ R E S C H E D i s s e t , c a l l s c h e d u l e
2006-09-28 18:56:37 +04:00
#
2014-12-03 19:00:08 +03:00
.Lio_reschedule :
# TRACE_ I R Q S _ O N a l r e a d y d o n e a t . L i o _ r e t u r n
2011-12-27 14:27:15 +04:00
ssm _ _ L C _ S V C _ N E W _ P S W # r e e n a b l e i n t e r r u p t s
2006-09-28 18:56:37 +04:00
brasl % r14 ,s c h e d u l e # c a l l s c h e d u l e r
2011-12-27 14:27:15 +04:00
ssm _ _ L C _ P G M _ N E W _ P S W # d i s a b l e I / O a n d e x t . i n t e r r u p t s
2007-11-20 13:13:32 +03:00
TRACE_ I R Q S _ O F F
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
2005-04-17 02:20:36 +04:00
#
2008-04-30 11:53:08 +04:00
# _ TIF_ S I G P E N D I N G o r i s s e t , c a l l d o _ s i g n a l
2005-04-17 02:20:36 +04:00
#
2014-12-03 19:00:08 +03:00
.Lio_sigpending :
# TRACE_ I R Q S _ O N a l r e a d y d o n e a t . L i o _ r e t u r n
2011-12-27 14:27:15 +04:00
ssm _ _ L C _ S V C _ N E W _ P S W # r e e n a b l e i n t e r r u p t s
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
brasl % r14 ,d o _ s i g n a l
ssm _ _ L C _ P G M _ N E W _ P S W # d i s a b l e I / O a n d e x t . i n t e r r u p t s
2007-11-20 13:13:32 +03:00
TRACE_ I R Q S _ O F F
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
2005-04-17 02:20:36 +04:00
2008-10-10 23:33:20 +04:00
#
# _ TIF_ N O T I F Y _ R E S U M E o r i s s e t , c a l l d o _ n o t i f y _ r e s u m e
#
2014-12-03 19:00:08 +03:00
.Lio_notify_resume :
# TRACE_ I R Q S _ O N a l r e a d y d o n e a t . L i o _ r e t u r n
2011-12-27 14:27:15 +04:00
ssm _ _ L C _ S V C _ N E W _ P S W # r e e n a b l e i n t e r r u p t s
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
brasl % r14 ,d o _ n o t i f y _ r e s u m e
ssm _ _ L C _ P G M _ N E W _ P S W # d i s a b l e I / O a n d e x t . i n t e r r u p t s
2008-10-10 23:33:20 +04:00
TRACE_ I R Q S _ O F F
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
2008-10-10 23:33:20 +04:00
2005-04-17 02:20:36 +04:00
/ *
* External i n t e r r u p t h a n d l e r r o u t i n e
* /
2011-07-24 12:48:19 +04:00
ENTRY( e x t _ i n t _ h a n d l e r )
2012-05-09 18:27:39 +04:00
STCK _ _ L C _ I N T _ C L O C K
2008-12-31 17:11:41 +03:00
stpt _ _ L C _ A S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
stmg % r8 ,% r15 ,_ _ L C _ S A V E _ A R E A _ A S Y N C
2016-11-08 13:08:26 +03:00
lg % r12 ,_ _ L C _ C U R R E N T
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
larl % r13 ,c l e a n u p _ c r i t i c a l
2011-12-27 14:27:15 +04:00
lmg % r8 ,% r9 ,_ _ L C _ E X T _ O L D _ P S W
2015-06-22 18:28:14 +03:00
SWITCH_ A S Y N C _ _ L C _ S A V E _ A R E A _ A S Y N C ,_ _ L C _ A S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ P T _ R 8 ( 6 4 ,% r11 ) ,_ _ L C _ S A V E _ A R E A _ A S Y N C
stmg % r8 ,% r9 ,_ _ P T _ P S W ( % r11 )
2013-06-17 16:54:02 +04:00
lghi % r1 ,_ _ L C _ E X T _ P A R A M S 2
mvc _ _ P T _ I N T _ C O D E ( 4 ,% r11 ) ,_ _ L C _ E X T _ C P U _ A D D R
mvc _ _ P T _ I N T _ P A R M ( 4 ,% r11 ) ,_ _ L C _ E X T _ P A R A M S
mvc _ _ P T _ I N T _ P A R M _ L O N G ( 8 ,% r11 ) ,0 ( % r1 )
2014-04-15 14:55:07 +04:00
xc _ _ P T _ F L A G S ( 8 ,% r11 ) ,_ _ P T _ F L A G S ( % r11 )
2015-08-15 12:42:21 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ I G N O R E _ I R Q
jo . L i o _ r e s t o r e
2006-07-03 11:24:46 +04:00
TRACE_ I R Q S _ O F F
2012-05-09 18:27:35 +04:00
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
2011-12-27 14:27:15 +04:00
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2013-06-27 11:01:09 +04:00
lghi % r3 ,E X T _ I N T E R R U P T
brasl % r14 ,d o _ I R Q
2014-12-03 19:00:08 +03:00
j . L i o _ r e t u r n
2005-04-17 02:20:36 +04:00
2012-03-11 19:59:27 +04:00
/ *
2014-12-03 19:00:08 +03:00
* Load i d l e P S W . T h e s e c o n d " h a l f " o f t h i s f u n c t i o n i s i n . L c l e a n u p _ i d l e .
2012-03-11 19:59:27 +04:00
* /
ENTRY( p s w _ i d l e )
2012-07-20 13:15:08 +04:00
stg % r3 ,_ _ S F _ E M P T Y ( % r15 )
2014-12-03 19:00:08 +03:00
larl % r1 ,. L p s w _ i d l e _ l p s w + 4
2012-03-11 19:59:27 +04:00
stg % r1 ,_ _ S F _ E M P T Y + 8 ( % r15 )
2015-09-18 17:41:36 +03:00
# ifdef C O N F I G _ S M P
larl % r1 ,s m p _ c p u _ m t i d
llgf % r1 ,0 ( % r1 )
ltgr % r1 ,% r1
jz . L p s w _ i d l e _ s t c c t m
.insn 0 x e b00 0 0 0 0 0 0 1 7 ,% r1 ,5 ,_ _ S F _ E M P T Y + 1 6 ( % r15 )
.Lpsw_idle_stcctm :
# endif
2015-11-19 13:09:45 +03:00
oi _ _ L C _ C P U _ F L A G S + 7 ,_ C I F _ E N A B L E D _ W A I T
2012-07-20 13:15:08 +04:00
STCK _ _ C L O C K _ I D L E _ E N T E R ( % r2 )
stpt _ _ T I M E R _ I D L E _ E N T E R ( % r2 )
2014-12-03 19:00:08 +03:00
.Lpsw_idle_lpsw :
2012-03-11 19:59:27 +04:00
lpswe _ _ S F _ E M P T Y ( % r15 )
br % r14
2014-12-03 19:00:08 +03:00
.Lpsw_idle_end :
2012-03-11 19:59:27 +04:00
2015-09-29 11:04:41 +03:00
/ *
* Store f l o a t i n g - p o i n t c o n t r o l s a n d f l o a t i n g - p o i n t o r v e c t o r r e g i s t e r
* depending w h e t h e r t h e v e c t o r f a c i l i t y i s a v a i l a b l e . A c r i t i c a l s e c t i o n
* cleanup a s s u r e s t h a t t h e r e g i s t e r s a r e s t o r e d e v e n i f i n t e r r u p t e d f o r
* some o t h e r w o r k . T h e C I F _ F P U f l a g i s s e t t o t r i g g e r a l a z y r e s t o r e
* of t h e r e g i s t e r c o n t e n t s a t r e t u r n f r o m i o o r a s y s t e m c a l l .
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
* /
ENTRY( s a v e _ f p u _ r e g s )
2015-06-29 17:43:06 +03:00
lg % r2 ,_ _ L C _ C U R R E N T
aghi % r2 ,_ _ T A S K _ t h r e a d
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ F P U
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
bor % r14
2015-06-29 17:43:06 +03:00
stfpc _ _ T H R E A D _ F P U _ f p c ( % r2 )
lg % r3 ,_ _ T H R E A D _ F P U _ r e g s ( % r2 )
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ M A C H I N E _ F L A G S ,M A C H I N E _ F L A G _ V X
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
jz . L s a v e _ f p u _ r e g s _ f p # n o - > s t o r e F P r e g s
VSTM % v0 ,% v15 ,0 ,% r3 # v s t m 0 ,1 5 ,0 ( 3 )
VSTM % v16 ,% v31 ,2 5 6 ,% r3 # v s t m 16 ,3 1 ,2 5 6 ( 3 )
j . L s a v e _ f p u _ r e g s _ d o n e # - > s e t C I F _ F P U f l a g
.Lsave_fpu_regs_fp :
std 0 ,0 ( % r3 )
std 1 ,8 ( % r3 )
std 2 ,1 6 ( % r3 )
std 3 ,2 4 ( % r3 )
std 4 ,3 2 ( % r3 )
std 5 ,4 0 ( % r3 )
std 6 ,4 8 ( % r3 )
std 7 ,5 6 ( % r3 )
std 8 ,6 4 ( % r3 )
std 9 ,7 2 ( % r3 )
std 1 0 ,8 0 ( % r3 )
std 1 1 ,8 8 ( % r3 )
std 1 2 ,9 6 ( % r3 )
std 1 3 ,1 0 4 ( % r3 )
std 1 4 ,1 1 2 ( % r3 )
std 1 5 ,1 2 0 ( % r3 )
.Lsave_fpu_regs_done :
oi _ _ L C _ C P U _ F L A G S + 7 ,_ C I F _ F P U
br % r14
.Lsave_fpu_regs_end :
2016-01-12 21:30:03 +03:00
# if I S _ E N A B L E D ( C O N F I G _ K V M )
EXPORT_ S Y M B O L ( s a v e _ f p u _ r e g s )
# endif
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
2015-09-29 11:04:41 +03:00
/ *
* Load f l o a t i n g - p o i n t c o n t r o l s a n d f l o a t i n g - p o i n t o r v e c t o r r e g i s t e r s .
* A c r i t i c a l s e c t i o n c l e a n u p a s s u r e s t h a t t h e r e g i s t e r c o n t e n t s a r e
* loaded e v e n i f i n t e r r u p t e d f o r s o m e o t h e r w o r k .
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
*
* There a r e s p e c i a l c a l l i n g c o n v e n t i o n s t o f i t i n t o s y s c a n d i o r e t u r n w o r k :
* % r15 : < kernel s t a c k >
* The f u n c t i o n r e q u i r e s :
2015-09-29 11:04:41 +03:00
* % r4
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
* /
load_fpu_regs :
2015-06-29 17:43:06 +03:00
lg % r4 ,_ _ L C _ C U R R E N T
aghi % r4 ,_ _ T A S K _ t h r e a d
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ F P U
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
bnor % r14
2015-06-29 17:43:06 +03:00
lfpc _ _ T H R E A D _ F P U _ f p c ( % r4 )
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ M A C H I N E _ F L A G S ,M A C H I N E _ F L A G _ V X
2015-06-29 17:43:06 +03:00
lg % r4 ,_ _ T H R E A D _ F P U _ r e g s ( % r4 ) # % r 4 < - r e g s a v e a r e a
2015-09-29 11:04:41 +03:00
jz . L l o a d _ f p u _ r e g s _ f p # - > n o V X , l o a d F P r e g s
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
VLM % v0 ,% v15 ,0 ,% r4
VLM % v16 ,% v31 ,2 5 6 ,% r4
j . L l o a d _ f p u _ r e g s _ d o n e
.Lload_fpu_regs_fp :
ld 0 ,0 ( % r4 )
ld 1 ,8 ( % r4 )
ld 2 ,1 6 ( % r4 )
ld 3 ,2 4 ( % r4 )
ld 4 ,3 2 ( % r4 )
ld 5 ,4 0 ( % r4 )
ld 6 ,4 8 ( % r4 )
ld 7 ,5 6 ( % r4 )
ld 8 ,6 4 ( % r4 )
ld 9 ,7 2 ( % r4 )
ld 1 0 ,8 0 ( % r4 )
ld 1 1 ,8 8 ( % r4 )
ld 1 2 ,9 6 ( % r4 )
ld 1 3 ,1 0 4 ( % r4 )
ld 1 4 ,1 1 2 ( % r4 )
ld 1 5 ,1 2 0 ( % r4 )
.Lload_fpu_regs_done :
ni _ _ L C _ C P U _ F L A G S + 7 ,2 5 5 - _ C I F _ F P U
br % r14
.Lload_fpu_regs_end :
2014-12-03 19:00:08 +03:00
.L__critical_end :
2005-09-04 02:57:56 +04:00
2005-04-17 02:20:36 +04:00
/ *
* Machine c h e c k h a n d l e r r o u t i n e s
* /
2011-07-24 12:48:19 +04:00
ENTRY( m c c k _ i n t _ h a n d l e r )
2012-05-09 18:27:39 +04:00
STCK _ _ L C _ M C C K _ C L O C K
2005-06-26 01:55:30 +04:00
la % r1 ,4 0 9 5 # r e v a l i d a t e r 1
spt _ _ L C _ C P U _ T I M E R _ S A V E _ A R E A - 4 0 9 5 ( % r1 ) # r e v a l i d a t e c p u t i m e r
2006-09-28 18:56:37 +04:00
lmg % r0 ,% r15 ,_ _ L C _ G P R E G S _ S A V E _ A R E A - 4 0 9 5 ( % r1 ) # r e v a l i d a t e g p r s
2016-11-08 13:08:26 +03:00
lg % r12 ,_ _ L C _ C U R R E N T
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
larl % r13 ,c l e a n u p _ c r i t i c a l
2011-12-27 14:27:15 +04:00
lmg % r8 ,% r9 ,_ _ L C _ M C K _ O L D _ P S W
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ M C C K _ C O D E ,M C C K _ C O D E _ S Y S T E M _ D A M A G E
2014-12-03 19:00:08 +03:00
jo . L m c c k _ p a n i c # y e s - > r e s t o f m c c k c o d e i n v a l i d
2011-12-27 14:27:15 +04:00
lghi % r14 ,_ _ L C _ C P U _ T I M E R _ S A V E _ A R E A
mvc _ _ L C _ M C C K _ E N T E R _ T I M E R ( 8 ) ,0 ( % r14 )
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ M C C K _ C O D E ,M C C K _ C O D E _ C P U _ T I M E R _ V A L I D
2011-12-27 14:27:15 +04:00
jo 3 f
2006-06-29 16:58:05 +04:00
la % r14 ,_ _ L C _ S Y N C _ E N T E R _ T I M E R
clc 0 ( 8 ,% r14 ) ,_ _ L C _ A S Y N C _ E N T E R _ T I M E R
jl 0 f
la % r14 ,_ _ L C _ A S Y N C _ E N T E R _ T I M E R
0 : clc 0 ( 8 ,% r14 ) ,_ _ L C _ E X I T _ T I M E R
2011-12-27 14:27:15 +04:00
jl 1 f
2006-06-29 16:58:05 +04:00
la % r14 ,_ _ L C _ E X I T _ T I M E R
2011-12-27 14:27:15 +04:00
1 : clc 0 ( 8 ,% r14 ) ,_ _ L C _ L A S T _ U P D A T E _ T I M E R
jl 2 f
2006-06-29 16:58:05 +04:00
la % r14 ,_ _ L C _ L A S T _ U P D A T E _ T I M E R
2011-12-27 14:27:15 +04:00
2 : spt 0 ( % r14 )
2010-05-17 12:00:03 +04:00
mvc _ _ L C _ M C C K _ E N T E R _ T I M E R ( 8 ) ,0 ( % r14 )
2015-10-01 18:02:48 +03:00
3 : TSTMSK _ _ L C _ M C C K _ C O D E ,( M C C K _ C O D E _ P S W _ M W P _ V A L I D | M C C K _ C O D E _ P S W _ I A _ V A L I D )
2014-12-03 19:00:08 +03:00
jno . L m c c k _ p a n i c # n o - > s k i p c l e a n u p c r i t i c a l
2015-06-22 18:28:14 +03:00
SWITCH_ A S Y N C _ _ L C _ G P R E G S _ S A V E _ A R E A + 6 4 ,_ _ L C _ M C C K _ E N T E R _ T I M E R
2014-12-03 19:00:08 +03:00
.Lmcck_skip :
2013-02-28 19:28:41 +04:00
lghi % r14 ,_ _ L C _ G P R E G S _ S A V E _ A R E A + 6 4
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ P T _ R 8 ( 6 4 ,% r11 ) ,0 ( % r14 )
2011-12-27 14:27:15 +04:00
stmg % r8 ,% r9 ,_ _ P T _ P S W ( % r11 )
2014-04-15 14:55:07 +04:00
xc _ _ P T _ F L A G S ( 8 ,% r11 ) ,_ _ P T _ F L A G S ( % r11 )
2011-12-27 14:27:15 +04:00
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2005-06-26 01:55:30 +04:00
brasl % r14 ,s39 0 _ d o _ m a c h i n e _ c h e c k
2011-12-27 14:27:15 +04:00
tm _ _ P T _ P S W + 1 ( % r11 ) ,0 x01 # r e t u r n i n g t o u s e r ?
2014-12-03 19:00:08 +03:00
jno . L m c c k _ r e t u r n
2005-06-26 01:55:30 +04:00
lg % r1 ,_ _ L C _ K E R N E L _ S T A C K # s w i t c h t o k e r n e l s t a c k
2011-12-27 14:27:15 +04:00
mvc S T A C K _ F R A M E _ O V E R H E A D ( _ _ P T _ S I Z E ,% r1 ) ,0 ( % r11 )
xc _ _ S F _ B A C K C H A I N ( 8 ,% r1 ) ,_ _ S F _ B A C K C H A I N ( % r1 )
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r1 )
2005-06-26 01:55:30 +04:00
lgr % r15 ,% r1
2011-12-27 14:27:15 +04:00
ssm _ _ L C _ P G M _ N E W _ P S W # t u r n d a t o n , k e e p i r q s o f f
2015-10-01 18:02:48 +03:00
TSTMSK _ _ L C _ C P U _ F L A G S ,_ C I F _ M C C K _ P E N D I N G
2014-12-03 19:00:08 +03:00
jno . L m c c k _ r e t u r n
2006-07-03 11:24:46 +04:00
TRACE_ I R Q S _ O F F
2005-06-26 01:55:30 +04:00
brasl % r14 ,s39 0 _ h a n d l e _ m c c k
2006-07-03 11:24:46 +04:00
TRACE_ I R Q S _ O N
2014-12-03 19:00:08 +03:00
.Lmcck_return :
2011-12-27 14:27:15 +04:00
lg % r14 ,_ _ L C _ V D S O _ P E R _ C P U
lmg % r0 ,% r10 ,_ _ P T _ R 0 ( % r11 )
mvc _ _ L C _ R E T U R N _ M C C K _ P S W ( 1 6 ) ,_ _ P T _ P S W ( % r11 ) # m o v e r e t u r n P S W
2006-06-29 16:58:05 +04:00
tm _ _ L C _ R E T U R N _ M C C K _ P S W + 1 ,0 x01 # r e t u r n i n g t o u s e r ?
jno 0 f
stpt _ _ L C _ E X I T _ T I M E R
2011-12-27 14:27:15 +04:00
mvc _ _ V D S O _ E C T G _ B A S E ( 1 6 ,% r14 ) ,_ _ L C _ E X I T _ T I M E R
0 : lmg % r11 ,% r15 ,_ _ P T _ R 1 1 ( % r11 )
lpswe _ _ L C _ R E T U R N _ M C C K _ P S W
2014-12-03 19:00:08 +03:00
.Lmcck_panic :
2011-12-27 14:27:15 +04:00
lg % r15 ,_ _ L C _ P A N I C _ S T A C K
2016-12-02 15:29:22 +03:00
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
2014-12-03 19:00:08 +03:00
j . L m c c k _ s k i p
2005-04-17 02:20:36 +04:00
2011-08-03 18:44:19 +04:00
#
# PSW r e s t a r t i n t e r r u p t h a n d l e r
#
2012-03-11 19:59:26 +04:00
ENTRY( r e s t a r t _ i n t _ h a n d l e r )
2015-10-06 19:06:15 +03:00
TSTMSK _ _ L C _ M A C H I N E _ F L A G S ,M A C H I N E _ F L A G _ L P P
jz 0 f
.insn 0 x b28 0 0 0 0 0 ,_ _ L C _ L P P
0 : stg % r15 ,_ _ L C _ S A V E _ A R E A _ R E S T A R T
2012-03-11 19:59:26 +04:00
lg % r15 ,_ _ L C _ R E S T A R T _ S T A C K
2011-12-27 14:27:15 +04:00
aghi % r15 ,- _ _ P T _ S I Z E # c r e a t e p t _ r e g s o n s t a c k
2012-03-11 19:59:26 +04:00
xc 0 ( _ _ P T _ S I Z E ,% r15 ) ,0 ( % r15 )
2011-12-27 14:27:15 +04:00
stmg % r0 ,% r14 ,_ _ P T _ R 0 ( % r15 )
mvc _ _ P T _ R 1 5 ( 8 ,% r15 ) ,_ _ L C _ S A V E _ A R E A _ R E S T A R T
mvc _ _ P T _ P S W ( 1 6 ,% r15 ) ,_ _ L C _ R S T _ O L D _ P S W # s t o r e r e s t a r t o l d p s w
2012-03-11 19:59:26 +04:00
aghi % r15 ,- S T A C K _ F R A M E _ O V E R H E A D # c r e a t e s t a c k f r a m e o n s t a c k
xc 0 ( S T A C K _ F R A M E _ O V E R H E A D ,% r15 ) ,0 ( % r15 )
2012-06-05 11:59:52 +04:00
lg % r1 ,_ _ L C _ R E S T A R T _ F N # l o a d f n , p a r m & s o u r c e c p u
lg % r2 ,_ _ L C _ R E S T A R T _ D A T A
lg % r3 ,_ _ L C _ R E S T A R T _ S O U R C E
2012-03-11 19:59:26 +04:00
ltgr % r3 ,% r3 # t e s t s o u r c e c p u a d d r e s s
jm 1 f # n e g a t i v e - > s k i p s o u r c e s t o p
2012-06-04 17:05:43 +04:00
0 : sigp % r4 ,% r3 ,S I G P _ S E N S E # s i g p s e n s e t o s o u r c e c p u
2012-03-11 19:59:26 +04:00
brc 1 0 ,0 b # w a i t f o r s t a t u s s t o r e d
1 : basr % r14 ,% r1 # c a l l f u n c t i o n
stap _ _ S F _ E M P T Y ( % r15 ) # s t o r e c p u a d d r e s s
llgh % r3 ,_ _ S F _ E M P T Y ( % r15 )
2012-06-04 17:05:43 +04:00
2 : sigp % r4 ,% r3 ,S I G P _ S T O P # s i g p s t o p t o c u r r e n t c p u
2012-03-11 19:59:26 +04:00
brc 2 ,2 b
3 : j 3 b
2011-08-03 18:44:19 +04:00
2011-01-05 14:47:25 +03:00
.section .kprobes .text , " ax"
2005-04-17 02:20:36 +04:00
# ifdef C O N F I G _ C H E C K _ S T A C K
/ *
* The s y n c h r o n o u s o r t h e a s y n c h r o n o u s s t a c k o v e r f l o w e d . W e a r e d e a d .
* No n e e d t o p r o p e r l y s a v e t h e r e g i s t e r s , w e a r e g o i n g t o p a n i c a n y w a y .
* Setup a p t _ r e g s s o t h a t s h o w _ t r a c e c a n p r o v i d e a g o o d c a l l t r a c e .
* /
stack_overflow :
2013-04-24 12:20:43 +04:00
lg % r15 ,_ _ L C _ P A N I C _ S T A C K # c h a n g e t o p a n i c s t a c k
la % r11 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
2011-12-27 14:27:15 +04:00
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r11 )
stmg % r8 ,% r9 ,_ _ P T _ P S W ( % r11 )
mvc _ _ P T _ R 8 ( 6 4 ,% r11 ) ,0 ( % r14 )
stg % r10 ,_ _ P T _ O R I G _ G P R 2 ( % r11 ) # s t o r e l a s t b r e a k t o o r i g _ g p r 2
xc _ _ S F _ B A C K C H A I N ( 8 ,% r15 ) ,_ _ S F _ B A C K C H A I N ( % r15 )
lgr % r2 ,% r11 # p a s s p o i n t e r t o p t _ r e g s
2005-04-17 02:20:36 +04:00
jg k e r n e l _ s t a c k _ o v e r f l o w
# endif
cleanup_critical :
2015-06-22 18:26:40 +03:00
# if I S _ E N A B L E D ( C O N F I G _ K V M )
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e _ s i e ) # . L s i e _ g m a p
jl 0 f
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e _ s i e + 8 ) # . L s i e _ d o n e
jl . L c l e a n u p _ s i e
# endif
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e ) # s y s t e m _ c a l l
2005-04-17 02:20:36 +04:00
jl 0 f
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 8 ) # . L s y s c _ d o _ s v c
jl . L c l e a n u p _ s y s t e m _ c a l l
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 1 6 ) # . L s y s c _ t i f
2005-04-17 02:20:36 +04:00
jl 0 f
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 2 4 ) # . L s y s c _ r e s t o r e
jl . L c l e a n u p _ s y s c _ t i f
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 3 2 ) # . L s y s c _ d o n e
jl . L c l e a n u p _ s y s c _ r e s t o r e
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 4 0 ) # . L i o _ t i f
2006-06-29 16:58:05 +04:00
jl 0 f
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 4 8 ) # . L i o _ r e s t o r e
jl . L c l e a n u p _ i o _ t i f
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 5 6 ) # . L i o _ d o n e
jl . L c l e a n u p _ i o _ r e s t o r e
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 6 4 ) # p s w _ i d l e
2012-03-11 19:59:27 +04:00
jl 0 f
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 7 2 ) # . L p s w _ i d l e _ e n d
jl . L c l e a n u p _ i d l e
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 8 0 ) # s a v e _ f p u _ r e g s
jl 0 f
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 8 8 ) # . L s a v e _ f p u _ r e g s _ e n d
jl . L c l e a n u p _ s a v e _ f p u _ r e g s
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 9 6 ) # l o a d _ f p u _ r e g s
jl 0 f
clg % r9 ,B A S E D ( . L c l e a n u p _ t a b l e + 1 0 4 ) # . L l o a d _ f p u _ r e g s _ e n d
jl . L c l e a n u p _ l o a d _ f p u _ r e g s
2011-12-27 14:27:15 +04:00
0 : br % r14
2015-06-22 18:26:40 +03:00
.align 8
.Lcleanup_table :
.quad system_call
.quad .Lsysc_do_svc
.quad .Lsysc_tif
.quad .Lsysc_restore
.quad .Lsysc_done
.quad .Lio_tif
.quad .Lio_restore
.quad .Lio_done
.quad psw_idle
.quad .Lpsw_idle_end
.quad save_fpu_regs
.quad .Lsave_fpu_regs_end
.quad load_fpu_regs
.quad .Lload_fpu_regs_end
# if I S _ E N A B L E D ( C O N F I G _ K V M )
.Lcleanup_table_sie :
.quad .Lsie_gmap
.quad .Lsie_done
.Lcleanup_sie :
lg % r9 ,_ _ S F _ E M P T Y ( % r15 ) # g e t c o n t r o l b l o c k p o i n t e r
2015-10-06 19:06:15 +03:00
ni _ _ S I E _ P R O G 0 C + 3 ( % r9 ) ,0 x f e # n o l o n g e r i n S I E
2015-06-22 18:26:40 +03:00
lctlg % c1 ,% c1 ,_ _ L C _ U S E R _ A S C E # l o a d p r i m a r y a s c e
larl % r9 ,s i e _ e x i t # s k i p f o r w a r d t o s i e _ e x i t
br % r14
# endif
2005-04-17 02:20:36 +04:00
2014-12-03 19:00:08 +03:00
.Lcleanup_system_call :
2011-12-27 14:27:15 +04:00
# check i f s t p t h a s b e e n e x e c u t e d
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ s y s t e m _ c a l l _ i n s n )
2005-04-17 02:20:36 +04:00
jh 0 f
mvc _ _ L C _ S Y N C _ E N T E R _ T I M E R ( 8 ) ,_ _ L C _ A S Y N C _ E N T E R _ T I M E R
2011-12-27 14:27:15 +04:00
cghi % r11 ,_ _ L C _ S A V E _ A R E A _ A S Y N C
2010-05-17 12:00:03 +04:00
je 0 f
2011-12-27 14:27:15 +04:00
mvc _ _ L C _ S Y N C _ E N T E R _ T I M E R ( 8 ) ,_ _ L C _ M C C K _ E N T E R _ T I M E R
0 : # check i f s t m g h a s b e e n e x e c u t e d
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ s y s t e m _ c a l l _ i n s n + 8 )
2005-04-17 02:20:36 +04:00
jh 0 f
2011-12-27 14:27:15 +04:00
mvc _ _ L C _ S A V E _ A R E A _ S Y N C ( 6 4 ) ,0 ( % r11 )
0 : # check i f b a s e r e g i s t e r s e t u p + T I F b i t l o a d h a s b e e n d o n e
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ s y s t e m _ c a l l _ i n s n + 1 6 )
2011-12-27 14:27:15 +04:00
jhe 0 f
2017-01-25 14:54:17 +03:00
# set u p s a v e d r e g i s t e r r12 t a s k s t r u c t p o i n t e r
stg % r12 ,3 2 ( % r11 )
# set u p s a v e d r e g i s t e r r13 _ _ T A S K _ t h r e a d o f f s e t
mvc 4 0 ( 8 ,% r11 ) ,B A S E D ( . L c l e a n u p _ s y s t e m _ c a l l _ c o n s t )
2011-12-27 14:27:15 +04:00
0 : # check i f t h e u s e r t i m e u p d a t e h a s b e e n d o n e
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ s y s t e m _ c a l l _ i n s n + 2 4 )
2011-12-27 14:27:15 +04:00
jh 0 f
lg % r15 ,_ _ L C _ E X I T _ T I M E R
slg % r15 ,_ _ L C _ S Y N C _ E N T E R _ T I M E R
alg % r15 ,_ _ L C _ U S E R _ T I M E R
stg % r15 ,_ _ L C _ U S E R _ T I M E R
0 : # check i f t h e s y s t e m t i m e u p d a t e h a s b e e n d o n e
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ s y s t e m _ c a l l _ i n s n + 3 2 )
2011-12-27 14:27:15 +04:00
jh 0 f
lg % r15 ,_ _ L C _ L A S T _ U P D A T E _ T I M E R
slg % r15 ,_ _ L C _ E X I T _ T I M E R
alg % r15 ,_ _ L C _ S Y S T E M _ T I M E R
stg % r15 ,_ _ L C _ S Y S T E M _ T I M E R
0 : # update a c c o u n t i n g t i m e s t a m p
2005-04-17 02:20:36 +04:00
mvc _ _ L C _ L A S T _ U P D A T E _ T I M E R ( 8 ) ,_ _ L C _ S Y N C _ E N T E R _ T I M E R
2017-01-25 14:54:17 +03:00
# set u p s a v e d r e g i s t e r r11
2011-12-27 14:27:15 +04:00
lg % r15 ,_ _ L C _ K E R N E L _ S T A C K
2013-04-24 12:20:43 +04:00
la % r9 ,S T A C K _ F R A M E _ O V E R H E A D ( % r15 )
stg % r9 ,2 4 ( % r11 ) # r 11 p t _ r e g s p o i n t e r
2011-12-27 14:27:15 +04:00
# fill p t _ r e g s
2013-04-24 12:20:43 +04:00
mvc _ _ P T _ R 8 ( 6 4 ,% r9 ) ,_ _ L C _ S A V E _ A R E A _ S Y N C
stmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r9 )
mvc _ _ P T _ P S W ( 1 6 ,% r9 ) ,_ _ L C _ S V C _ O L D _ P S W
mvc _ _ P T _ I N T _ C O D E ( 4 ,% r9 ) ,_ _ L C _ S V C _ I L C
2014-04-15 14:55:07 +04:00
xc _ _ P T _ F L A G S ( 8 ,% r9 ) ,_ _ P T _ F L A G S ( % r9 )
mvi _ _ P T _ F L A G S + 7 ( % r9 ) ,_ P I F _ S Y S C A L L
2011-12-27 14:27:15 +04:00
# setup s a v e d r e g i s t e r r15
stg % r15 ,5 6 ( % r11 ) # r 15 s t a c k p o i n t e r
# set n e w p s w a d d r e s s a n d e x i t
2014-12-03 19:00:08 +03:00
larl % r9 ,. L s y s c _ d o _ s v c
2005-04-17 02:20:36 +04:00
br % r14
2014-12-03 19:00:08 +03:00
.Lcleanup_system_call_insn :
2006-09-28 18:56:37 +04:00
.quad system_call
2014-12-03 19:00:08 +03:00
.quad .Lsysc_stmg
.quad .Lsysc_per
2015-06-22 18:27:48 +03:00
.quad .Lsysc_vtime + 3 6
2014-12-03 19:00:08 +03:00
.quad .Lsysc_vtime + 4 2
2017-01-25 14:54:17 +03:00
.Lcleanup_system_call_const :
.quad __TASK_thread
2005-04-17 02:20:36 +04:00
2014-12-03 19:00:08 +03:00
.Lcleanup_sysc_tif :
larl % r9 ,. L s y s c _ t i f
2005-04-17 02:20:36 +04:00
br % r14
2014-12-03 19:00:08 +03:00
.Lcleanup_sysc_restore :
clg % r9 ,B A S E D ( . L c l e a n u p _ s y s c _ r e s t o r e _ i n s n )
2010-05-17 12:00:03 +04:00
je 0 f
2011-12-27 14:27:15 +04:00
lg % r9 ,2 4 ( % r11 ) # g e t s a v e d p o i n t e r t o p t _ r e g s
mvc _ _ L C _ R E T U R N _ P S W ( 1 6 ) ,_ _ P T _ P S W ( % r9 )
mvc 0 ( 6 4 ,% r11 ) ,_ _ P T _ R 8 ( % r9 )
lmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r9 )
0 : lmg % r8 ,% r9 ,_ _ L C _ R E T U R N _ P S W
2005-04-17 02:20:36 +04:00
br % r14
2014-12-03 19:00:08 +03:00
.Lcleanup_sysc_restore_insn :
.quad .Lsysc_done - 4
2005-04-17 02:20:36 +04:00
2014-12-03 19:00:08 +03:00
.Lcleanup_io_tif :
larl % r9 ,. L i o _ t i f
2010-04-09 15:43:00 +04:00
br % r14
2014-12-03 19:00:08 +03:00
.Lcleanup_io_restore :
clg % r9 ,B A S E D ( . L c l e a n u p _ i o _ r e s t o r e _ i n s n )
2011-12-27 14:27:15 +04:00
je 0 f
lg % r9 ,2 4 ( % r11 ) # g e t s a v e d r 11 p o i n t e r t o p t _ r e g s
mvc _ _ L C _ R E T U R N _ P S W ( 1 6 ) ,_ _ P T _ P S W ( % r9 )
mvc 0 ( 6 4 ,% r11 ) ,_ _ P T _ R 8 ( % r9 )
lmg % r0 ,% r7 ,_ _ P T _ R 0 ( % r9 )
0 : lmg % r8 ,% r9 ,_ _ L C _ R E T U R N _ P S W
2005-09-04 02:57:56 +04:00
br % r14
2014-12-03 19:00:08 +03:00
.Lcleanup_io_restore_insn :
.quad .Lio_done - 4
2005-09-04 02:57:56 +04:00
2014-12-03 19:00:08 +03:00
.Lcleanup_idle :
2015-11-19 13:09:45 +03:00
ni _ _ L C _ C P U _ F L A G S + 7 ,2 5 5 - _ C I F _ E N A B L E D _ W A I T
2012-03-11 19:59:27 +04:00
# copy i n t e r r u p t c l o c k & c p u t i m e r
2012-07-20 13:15:08 +04:00
mvc _ _ C L O C K _ I D L E _ E X I T ( 8 ,% r2 ) ,_ _ L C _ I N T _ C L O C K
mvc _ _ T I M E R _ I D L E _ E X I T ( 8 ,% r2 ) ,_ _ L C _ A S Y N C _ E N T E R _ T I M E R
2012-03-11 19:59:27 +04:00
cghi % r11 ,_ _ L C _ S A V E _ A R E A _ A S Y N C
je 0 f
2012-07-20 13:15:08 +04:00
mvc _ _ C L O C K _ I D L E _ E X I T ( 8 ,% r2 ) ,_ _ L C _ M C C K _ C L O C K
mvc _ _ T I M E R _ I D L E _ E X I T ( 8 ,% r2 ) ,_ _ L C _ M C C K _ E N T E R _ T I M E R
2012-03-11 19:59:27 +04:00
0 : # check i f s t c k & s t p t h a v e b e e n e x e c u t e d
2014-12-03 19:00:08 +03:00
clg % r9 ,B A S E D ( . L c l e a n u p _ i d l e _ i n s n )
2012-03-11 19:59:27 +04:00
jhe 1 f
2012-07-20 13:15:08 +04:00
mvc _ _ C L O C K _ I D L E _ E N T E R ( 8 ,% r2 ) ,_ _ C L O C K _ I D L E _ E X I T ( % r2 )
mvc _ _ T I M E R _ I D L E _ E N T E R ( 8 ,% r2 ) ,_ _ T I M E R _ I D L E _ E X I T ( % r2 )
2015-09-18 17:41:36 +03:00
1 : # calculate i d l e c y c l e s
# ifdef C O N F I G _ S M P
clg % r9 ,B A S E D ( . L c l e a n u p _ i d l e _ i n s n )
jl 3 f
larl % r1 ,s m p _ c p u _ m t i d
llgf % r1 ,0 ( % r1 )
ltgr % r1 ,% r1
jz 3 f
.insn 0 x e b00 0 0 0 0 0 0 1 7 ,% r1 ,5 ,_ _ S F _ E M P T Y + 8 0 ( % r15 )
larl % r3 ,m t _ c y c l e s
ag % r3 ,_ _ L C _ P E R C P U _ O F F S E T
la % r4 ,_ _ S F _ E M P T Y + 1 6 ( % r15 )
2 : lg % r0 ,0 ( % r3 )
slg % r0 ,0 ( % r4 )
alg % r0 ,6 4 ( % r4 )
stg % r0 ,0 ( % r3 )
la % r3 ,8 ( % r3 )
la % r4 ,8 ( % r4 )
brct % r1 ,2 b
# endif
3 : # account s y s t e m t i m e g o i n g i d l e
2012-03-11 19:59:27 +04:00
lg % r9 ,_ _ L C _ S T E A L _ T I M E R
2012-07-20 13:15:08 +04:00
alg % r9 ,_ _ C L O C K _ I D L E _ E N T E R ( % r2 )
2012-03-11 19:59:27 +04:00
slg % r9 ,_ _ L C _ L A S T _ U P D A T E _ C L O C K
stg % r9 ,_ _ L C _ S T E A L _ T I M E R
2012-07-20 13:15:08 +04:00
mvc _ _ L C _ L A S T _ U P D A T E _ C L O C K ( 8 ) ,_ _ C L O C K _ I D L E _ E X I T ( % r2 )
2012-03-11 19:59:27 +04:00
lg % r9 ,_ _ L C _ S Y S T E M _ T I M E R
alg % r9 ,_ _ L C _ L A S T _ U P D A T E _ T I M E R
2012-07-20 13:15:08 +04:00
slg % r9 ,_ _ T I M E R _ I D L E _ E N T E R ( % r2 )
2012-03-11 19:59:27 +04:00
stg % r9 ,_ _ L C _ S Y S T E M _ T I M E R
2012-07-20 13:15:08 +04:00
mvc _ _ L C _ L A S T _ U P D A T E _ T I M E R ( 8 ) ,_ _ T I M E R _ I D L E _ E X I T ( % r2 )
2012-03-11 19:59:27 +04:00
# prepare r e t u r n p s w
2013-08-23 16:45:58 +04:00
nihh % r8 ,0 x f c f d # c l e a r i r q & w a i t s t a t e b i t s
2012-03-11 19:59:27 +04:00
lg % r9 ,4 8 ( % r11 ) # r e t u r n f r o m p s w _ i d l e
br % r14
2014-12-03 19:00:08 +03:00
.Lcleanup_idle_insn :
.quad .Lpsw_idle_lpsw
2012-03-11 19:59:27 +04:00
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
.Lcleanup_save_fpu_regs :
2016-03-10 11:52:55 +03:00
larl % r9 ,s a v e _ f p u _ r e g s
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
br % r14
.Lcleanup_load_fpu_regs :
2016-03-10 11:52:55 +03:00
larl % r9 ,l o a d _ f p u _ r e g s
s390/kernel: lazy restore fpu registers
Improve the save and restore behavior of FPU register contents to use the
vector extension within the kernel.
The kernel does not use floating-point or vector registers and, therefore,
saving and restoring the FPU register contents are performed for handling
signals or switching processes only. To prepare for using vector
instructions and vector registers within the kernel, enhance the save
behavior and implement a lazy restore at return to user space from a
system call or interrupt.
To implement the lazy restore, the save_fpu_regs() sets a CPU information
flag, CIF_FPU, to indicate that the FPU registers must be restored.
Saving and setting CIF_FPU is performed in an atomic fashion to be
interrupt-safe. When the kernel wants to use the vector extension or
wants to change the FPU register state for a task during signal handling,
the save_fpu_regs() must be called first. The CIF_FPU flag is also set at
process switch. At return to user space, the FPU state is restored. In
particular, the FPU state includes the floating-point or vector register
contents, as well as, vector-enablement and floating-point control. The
FPU state restore and clearing CIF_FPU is also performed in an atomic
fashion.
For KVM, the restore of the FPU register state is performed when restoring
the general-purpose guest registers before the SIE instructions is started.
Because the path towards the SIE instruction is interruptible, the CIF_FPU
flag must be checked again right before going into SIE. If set, the guest
registers must be reloaded again by re-entering the outer SIE loop. This
is the same behavior as if the SIE critical section is interrupted.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-06-10 13:53:42 +03:00
br % r14
2005-04-17 02:20:36 +04:00
/ *
* Integer c o n s t a n t s
* /
2011-12-27 14:27:15 +04:00
.align 8
2005-04-17 02:20:36 +04:00
.Lcritical_start :
2014-12-03 19:00:08 +03:00
.quad .L__critical_start
2011-12-27 14:27:15 +04:00
.Lcritical_length :
2014-12-03 19:00:08 +03:00
.quad .L__critical_end - .L__critical_start
2013-11-01 13:08:20 +04:00
# if I S _ E N A B L E D ( C O N F I G _ K V M )
2015-06-22 18:26:40 +03:00
.Lsie_critical_start :
2014-12-03 19:00:08 +03:00
.quad .Lsie_gmap
2013-05-17 16:41:37 +04:00
.Lsie_critical_length :
2014-12-03 19:00:08 +03:00
.quad .Lsie_done - .Lsie_gmap
2011-07-24 12:48:18 +04:00
# endif
2015-02-13 16:44:29 +03:00
.section .rodata , " a"
# define S Y S C A L L ( e s a m e ,e m u ) . l o n g e s a m e
2009-06-12 12:26:47 +04:00
.globl sys_call_table
2005-04-17 02:20:36 +04:00
sys_call_table :
# include " s y s c a l l s . S "
# undef S Y S C A L L
2006-01-06 11:19:28 +03:00
# ifdef C O N F I G _ C O M P A T
2005-04-17 02:20:36 +04:00
2015-02-13 16:44:29 +03:00
# define S Y S C A L L ( e s a m e ,e m u ) . l o n g e m u
2013-04-24 14:58:39 +04:00
.globl sys_call_table_emu
2005-04-17 02:20:36 +04:00
sys_call_table_emu :
# include " s y s c a l l s . S "
# undef S Y S C A L L
# endif
