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/ *
* This f i l e c o n t a i n s l o w l e v e l C P U s e t u p f u n c t i o n s .
* Copyright ( C ) 2 0 0 3 B e n j a m i n H e r r e n s c h m i d t ( b e n h @kernel.crashing.org)
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
*
* /
# include < a s m / p r o c e s s o r . h >
# include < a s m / p a g e . h >
# include < a s m / c p u t a b l e . h >
# include < a s m / p p c _ a s m . h >
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# include < a s m / a s m - o f f s e t s . h >
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# include < a s m / c a c h e . h >
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_ GLOBAL( _ _ c p u _ p r e i n i t _ p p c97 0 )
/* Do nothing if not running in HV mode */
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mfmsr r0
rldicl. r0 ,r0 ,4 ,6 3
beqlr
/ * Make s u r e H I D 4 : r m _ c i i s o f f b e f o r e M M U i s t u r n e d o f f , t h a t l a r g e
* pages a r e e n a b l e d w i t h H I D 4 : 6 1 a n d c l e a r H I D 5 : D C B Z _ s i z e a n d
* HID5 : DCBZ3 2 _ i l l
* /
li r0 ,0
mfspr r3 ,S P R N _ H I D 4
rldimi r3 ,r0 ,4 0 ,2 3 / * c l e a r b i t 2 3 ( r m _ c i ) * /
rldimi r3 ,r0 ,2 ,6 1 / * c l e a r b i t 6 1 ( l g _ p g _ e n ) * /
sync
mtspr S P R N _ H I D 4 ,r3
isync
sync
mfspr r3 ,S P R N _ H I D 5
rldimi r3 ,r0 ,6 ,5 6 / * c l e a r b i t s 5 6 & 5 7 ( D C B Z * ) * /
sync
mtspr S P R N _ H I D 5 ,r3
isync
sync
/* Setup some basic HID1 features */
mfspr r0 ,S P R N _ H I D 1
li r3 ,0 x12 0 0 / * e n a b l e i - f e t c h c a c h e a b i l i t y * /
sldi r3 ,r3 ,4 4 / * a n d p r e f e t c h * /
or r0 ,r0 ,r3
mtspr S P R N _ H I D 1 ,r0
mtspr S P R N _ H I D 1 ,r0
isync
/* Clear HIOR */
li r0 ,0
sync
mtspr S P R N _ H I O R ,0 / * C l e a r i n t e r r u p t p r e f i x * /
isync
blr
/* Definitions for the table use to save CPU states */
# define C S _ H I D 0 0
# define C S _ H I D 1 8
# define C S _ H I D 4 1 6
# define C S _ H I D 5 2 4
# define C S _ S I Z E 3 2
.data
.balign L1 _ C A C H E _ B Y T E S ,0
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cpu_state_storage :
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.space CS_SIZE
.balign L1 _ C A C H E _ B Y T E S ,0
.text
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_ GLOBAL( _ _ s e t u p _ c p u _ p p c97 0 )
/* Do nothing if not running in HV mode */
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mfmsr r0
rldicl. r0 ,r0 ,4 ,6 3
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beqlr
mfspr r0 ,S P R N _ H I D 0
li r11 ,5 / * c l e a r D O Z E a n d S L E E P * /
rldimi r0 ,r11 ,5 2 ,8 / * s e t N A P a n d D P M * /
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li r11 ,0
rldimi r0 ,r11 ,3 2 ,3 1 / * c l e a r E N _ A T T N * /
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b l o a d _ h i d s / * J u m p t o s h a r e d c o d e * /
_ GLOBAL( _ _ s e t u p _ c p u _ p p c97 0 M P )
/* Do nothing if not running in HV mode */
mfmsr r0
rldicl. r0 ,r0 ,4 ,6 3
beqlr
mfspr r0 ,S P R N _ H I D 0
li r11 ,0 x15 / * c l e a r D O Z E a n d S L E E P * /
rldimi r0 ,r11 ,5 2 ,6 / * s e t D E E P N A P , N A P a n d D P M * /
li r11 ,0
rldimi r0 ,r11 ,3 2 ,3 1 / * c l e a r E N _ A T T N * /
load_hids :
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mtspr S P R N _ H I D 0 ,r0
mfspr r0 ,S P R N _ H I D 0
mfspr r0 ,S P R N _ H I D 0
mfspr r0 ,S P R N _ H I D 0
mfspr r0 ,S P R N _ H I D 0
mfspr r0 ,S P R N _ H I D 0
mfspr r0 ,S P R N _ H I D 0
sync
isync
/* Save away cpu state */
LOAD_ R E G _ I M M E D I A T E ( r5 ,c p u _ s t a t e _ s t o r a g e )
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/* Save HID0,1,4 and 5 */
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mfspr r3 ,S P R N _ H I D 0
std r3 ,C S _ H I D 0 ( r5 )
mfspr r3 ,S P R N _ H I D 1
std r3 ,C S _ H I D 1 ( r5 )
mfspr r3 ,S P R N _ H I D 4
std r3 ,C S _ H I D 4 ( r5 )
mfspr r3 ,S P R N _ H I D 5
std r3 ,C S _ H I D 5 ( r5 )
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blr
/ * Called w i t h n o M M U c o n t e x t ( t y p i c a l l y M S R : I R / D R o f f ) t o
* restore C P U s t a t e a s b a c k e d u p b y t h e p r e v i o u s
* function. T h i s d o e s n o t i n c l u d e c a c h e s e t t i n g
* /
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_ GLOBAL( _ _ r e s t o r e _ c p u _ p p c97 0 )
/* Do nothing if not running in HV mode */
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mfmsr r0
rldicl. r0 ,r0 ,4 ,6 3
beqlr
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LOAD_ R E G _ I M M E D I A T E ( r5 ,c p u _ s t a t e _ s t o r a g e )
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/* Before accessing memory, we make sure rm_ci is clear */
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li r0 ,0
mfspr r3 ,S P R N _ H I D 4
rldimi r3 ,r0 ,4 0 ,2 3 / * c l e a r b i t 2 3 ( r m _ c i ) * /
sync
mtspr S P R N _ H I D 4 ,r3
isync
sync
/* Clear interrupt prefix */
li r0 ,0
sync
mtspr S P R N _ H I O R ,0
isync
/* Restore HID0 */
ld r3 ,C S _ H I D 0 ( r5 )
sync
isync
mtspr S P R N _ H I D 0 ,r3
mfspr r3 ,S P R N _ H I D 0
mfspr r3 ,S P R N _ H I D 0
mfspr r3 ,S P R N _ H I D 0
mfspr r3 ,S P R N _ H I D 0
mfspr r3 ,S P R N _ H I D 0
mfspr r3 ,S P R N _ H I D 0
sync
isync
/* Restore HID1 */
ld r3 ,C S _ H I D 1 ( r5 )
sync
isync
mtspr S P R N _ H I D 1 ,r3
mtspr S P R N _ H I D 1 ,r3
sync
isync
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/* Restore HID4 */
ld r3 ,C S _ H I D 4 ( r5 )
sync
isync
mtspr S P R N _ H I D 4 ,r3
sync
isync
/* Restore HID5 */
ld r3 ,C S _ H I D 5 ( r5 )
sync
isync
mtspr S P R N _ H I D 5 ,r3
sync
isync
blr