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/*
* pata_cmd640 . c - CMD640 PCI PATA for new ATA layer
* ( C ) 2007 Red Hat Inc
*
* Based upon
* linux / drivers / ide / pci / cmd640 . c Version 1.02 Sep 01 , 1996
*
* Copyright ( C ) 1995 - 1996 Linus Torvalds & authors ( see driver )
*
* This drives only the PCI version of the controller . If you have a
* VLB one then we have enough docs to support it but you can write
* your own code .
*/
# include <linux/kernel.h>
# include <linux/module.h>
# include <linux/pci.h>
# include <linux/init.h>
# include <linux/blkdev.h>
# include <linux/delay.h>
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 11:04:11 +03:00
# include <linux/gfp.h>
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# include <scsi/scsi_host.h>
# include <linux/libata.h>
# define DRV_NAME "pata_cmd640"
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# define DRV_VERSION "0.0.5"
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struct cmd640_reg {
int last ;
u8 reg58 [ ATA_MAX_DEVICES ] ;
} ;
enum {
CFR = 0x50 ,
CNTRL = 0x51 ,
CMDTIM = 0x52 ,
ARTIM0 = 0x53 ,
DRWTIM0 = 0x54 ,
ARTIM23 = 0x57 ,
DRWTIM23 = 0x58 ,
BRST = 0x59
} ;
/**
* cmd640_set_piomode - set initial PIO mode data
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* @ ap : ATA port
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* @ adev : ATA device
*
* Called to do the PIO mode setup .
*/
static void cmd640_set_piomode ( struct ata_port * ap , struct ata_device * adev )
{
struct cmd640_reg * timing = ap - > private_data ;
struct pci_dev * pdev = to_pci_dev ( ap - > host - > dev ) ;
struct ata_timing t ;
const unsigned long T = 1000000 / 33 ;
const u8 setup_data [ ] = { 0x40 , 0x40 , 0x40 , 0x80 , 0x00 } ;
u8 reg ;
int arttim = ARTIM0 + 2 * adev - > devno ;
struct ata_device * pair = ata_dev_pair ( adev ) ;
if ( ata_timing_compute ( adev , adev - > pio_mode , & t , T , 0 ) < 0 ) {
printk ( KERN_ERR DRV_NAME " : mode computation failed. \n " ) ;
return ;
}
/* The second channel has shared timings and the setup timing is
messy to switch to merge it for worst case */
if ( ap - > port_no & & pair ) {
struct ata_timing p ;
ata_timing_compute ( pair , pair - > pio_mode , & p , T , 1 ) ;
ata_timing_merge ( & p , & t , & t , ATA_TIMING_SETUP ) ;
}
/* Make the timings fit */
if ( t . recover > 16 ) {
t . active + = t . recover - 16 ;
t . recover = 16 ;
}
if ( t . active > 16 )
t . active = 16 ;
/* Now convert the clocks into values we can actually stuff into
the chip */
if ( t . recover > 1 )
t . recover - - ; /* 640B only */
else
t . recover = 15 ;
if ( t . setup > 4 )
t . setup = 0xC0 ;
else
t . setup = setup_data [ t . setup ] ;
if ( ap - > port_no = = 0 ) {
t . active & = 0x0F ; /* 0 = 16 */
/* Load setup timing */
pci_read_config_byte ( pdev , arttim , & reg ) ;
reg & = 0x3F ;
reg | = t . setup ;
pci_write_config_byte ( pdev , arttim , reg ) ;
/* Load active/recovery */
pci_write_config_byte ( pdev , arttim + 1 , ( t . active < < 4 ) | t . recover ) ;
} else {
/* Save the shared timings for channel, they will be loaded
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by qc_issue . Reloading the setup time is expensive so we
keep a merged one loaded */
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pci_read_config_byte ( pdev , ARTIM23 , & reg ) ;
reg & = 0x3F ;
reg | = t . setup ;
pci_write_config_byte ( pdev , ARTIM23 , reg ) ;
timing - > reg58 [ adev - > devno ] = ( t . active < < 4 ) | t . recover ;
}
}
/**
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* cmd640_qc_issue - command preparation hook
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* @ qc : Command to be issued
*
* Channel 1 has shared timings . We must reprogram the
* clock each drive 2 / 3 switch we do .
*/
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static unsigned int cmd640_qc_issue ( struct ata_queued_cmd * qc )
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{
struct ata_port * ap = qc - > ap ;
struct ata_device * adev = qc - > dev ;
struct pci_dev * pdev = to_pci_dev ( ap - > host - > dev ) ;
struct cmd640_reg * timing = ap - > private_data ;
if ( ap - > port_no ! = 0 & & adev - > devno ! = timing - > last ) {
pci_write_config_byte ( pdev , DRWTIM23 , timing - > reg58 [ adev - > devno ] ) ;
timing - > last = adev - > devno ;
}
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return ata_sff_qc_issue ( qc ) ;
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}
/**
* cmd640_port_start - port setup
* @ ap : ATA port being set up
*
* The CMD640 needs to maintain private data structures so we
* allocate space here .
*/
static int cmd640_port_start ( struct ata_port * ap )
{
struct pci_dev * pdev = to_pci_dev ( ap - > host - > dev ) ;
struct cmd640_reg * timing ;
timing = devm_kzalloc ( & pdev - > dev , sizeof ( struct cmd640_reg ) , GFP_KERNEL ) ;
if ( timing = = NULL )
return - ENOMEM ;
timing - > last = - 1 ; /* Force a load */
ap - > private_data = timing ;
libata-sff: clean up BMDMA initialization
When BMDMA initialization failed or BMDMA was not available for
whatever reason, bmdma_addr was left at zero and used as an indication
that BMDMA shouldn't be used. This leads to the following problems.
p1. For BMDMA drivers which don't use traditional BMDMA register,
ata_bmdma_mode_filter() incorrectly inhibits DMA modes. Those
drivers either have to inherit from ata_sff_port_ops or clear
->mode_filter explicitly.
p2. non-BMDMA drivers call into BMDMA PRD table allocation. It
doesn't actually allocate PRD table if bmdma_addr is not
initialized but is still confusing.
p3. For BMDMA drivers which don't use traditional BMDMA register, some
methods might not be invoked as expected (e.g. bmdma_stop from
ata_sff_post_internal_cmd()).
p4. SFF drivers w/ custom DMA interface implement noop BMDMA ops
worrying libata core might call into one of them.
These problems are caused by the muddy line between SFF and BMDMA and
the assumption that all BMDMA controllers initialize bmdma_addr.
This patch fixes p1 and p2 by removing the bmdma_addr assumption and
moving prd allocation to BMDMA port start. Later patches will fix the
remaining issues.
This patch improves BMDMA initialization such that
* When BMDMA register initialization fails, falls back to PIO instead
of failing. ata_pci_bmdma_init() never fails now.
* When ata_pci_bmdma_init() falls back to PIO, it clears
ap->mwdma_mask and udma_mask instead of depending on
ata_bmdma_mode_filter(). This makes ata_bmdma_mode_filter()
unnecessary thus resolving p1.
* ata_port_start() which actually is BMDMA specific is moved to
ata_bmdma_port_start(). ata_port_start() and ata_sff_port_start()
are killed.
* ata_sff_port_start32() is moved and renamed to
ata_bmdma_port_start32().
Drivers which no longer call into PRD table allocation are...
pdc_adma, sata_inic162x, sata_qstor, sata_sx4, pata_cmd640 and all
drivers which inherit from ata_sff_port_ops.
pata_icside sets ->port_start to ATA_OP_NULL as it doesn't need PRD
but is a BMDMA controller and doesn't have custom port_start like
other such controllers.
Note that with the previous patch which makes all and only BMDMA
drivers inherit from ata_bmdma_port_ops, this change doesn't break
drivers which need PRD table.
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-05-10 23:41:34 +04:00
return 0 ;
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}
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static bool cmd640_sff_irq_check ( struct ata_port * ap )
{
struct pci_dev * pdev = to_pci_dev ( ap - > host - > dev ) ;
int irq_reg = ap - > port_no ? ARTIM23 : CFR ;
u8 irq_stat , irq_mask = ap - > port_no ? 0x10 : 0x04 ;
pci_read_config_byte ( pdev , irq_reg , & irq_stat ) ;
return irq_stat & irq_mask ;
}
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static struct scsi_host_template cmd640_sht = {
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ATA_PIO_SHT ( DRV_NAME ) ,
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} ;
static struct ata_port_operations cmd640_port_ops = {
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. inherits = & ata_sff_port_ops ,
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
/* In theory xfer_noirq is not needed once we kill the prefetcher */
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. sff_data_xfer = ata_sff_data_xfer_noirq ,
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. sff_irq_check = cmd640_sff_irq_check ,
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. qc_issue = cmd640_qc_issue ,
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
. cable_detect = ata_cable_40wire ,
. set_piomode = cmd640_set_piomode ,
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. port_start = cmd640_port_start ,
} ;
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static void cmd640_hardware_init ( struct pci_dev * pdev )
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{
u8 ctrl ;
/* CMD640 detected, commiserations */
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pci_write_config_byte ( pdev , 0x5B , 0x00 ) ;
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/* PIO0 command cycles */
pci_write_config_byte ( pdev , CMDTIM , 0 ) ;
/* 512 byte bursts (sector) */
pci_write_config_byte ( pdev , BRST , 0x40 ) ;
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/*
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* A reporter a long time ago
* Had problems with the data fifo
* So don ' t run the risk
* Of putting crap on the disk
* For its better just to go slow
*/
/* Do channel 0 */
pci_read_config_byte ( pdev , CNTRL , & ctrl ) ;
pci_write_config_byte ( pdev , CNTRL , ctrl | 0xC0 ) ;
/* Ditto for channel 1 */
pci_read_config_byte ( pdev , ARTIM23 , & ctrl ) ;
ctrl | = 0x0C ;
pci_write_config_byte ( pdev , ARTIM23 , ctrl ) ;
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}
static int cmd640_init_one ( struct pci_dev * pdev , const struct pci_device_id * id )
{
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static const struct ata_port_info info = {
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. flags = ATA_FLAG_SLAVE_POSS ,
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. pio_mask = ATA_PIO4 ,
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. port_ops = & cmd640_port_ops
} ;
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const struct ata_port_info * ppi [ ] = { & info , NULL } ;
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int rc ;
rc = pcim_enable_device ( pdev ) ;
if ( rc )
return rc ;
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cmd640_hardware_init ( pdev ) ;
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return ata_pci_sff_init_one ( pdev , ppi , & cmd640_sht , NULL , 0 ) ;
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}
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# ifdef CONFIG_PM
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static int cmd640_reinit_one ( struct pci_dev * pdev )
{
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struct ata_host * host = pci_get_drvdata ( pdev ) ;
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int rc ;
rc = ata_pci_device_do_resume ( pdev ) ;
if ( rc )
return rc ;
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cmd640_hardware_init ( pdev ) ;
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ata_host_resume ( host ) ;
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return 0 ;
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}
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# endif
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static const struct pci_device_id cmd640 [ ] = {
{ PCI_VDEVICE ( CMD , 0x640 ) , 0 } ,
{ } ,
} ;
static struct pci_driver cmd640_pci_driver = {
. name = DRV_NAME ,
. id_table = cmd640 ,
. probe = cmd640_init_one ,
. remove = ata_pci_remove_one ,
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# ifdef CONFIG_PM
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. suspend = ata_pci_device_suspend ,
. resume = cmd640_reinit_one ,
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# endif
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} ;
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module_pci_driver ( cmd640_pci_driver ) ;
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MODULE_AUTHOR ( " Alan Cox " ) ;
MODULE_DESCRIPTION ( " low-level driver for CMD640 PATA controllers " ) ;
MODULE_LICENSE ( " GPL " ) ;
MODULE_DEVICE_TABLE ( pci , cmd640 ) ;
MODULE_VERSION ( DRV_VERSION ) ;