2009-07-24 03:15:59 +04:00
/ *
* Boot c o d e a n d e x c e p t i o n v e c t o r s f o r B o o k 3 E p r o c e s s o r s
*
* Copyright ( C ) 2 0 0 7 B e n . H e r r e n s c h m i d t ( b e n h @kernel.crashing.org), IBM Corp.
*
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or
* modify i t u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* as p u b l i s h e d b y t h e F r e e S o f t w a r e F o u n d a t i o n ; either version
* 2 of t h e L i c e n s e , o r ( a t y o u r o p t i o n ) a n y l a t e r v e r s i o n .
* /
# include < l i n u x / t h r e a d s . h >
# include < a s m / r e g . h >
# include < a s m / p a g e . h >
# include < a s m / p p c _ a s m . h >
# include < a s m / a s m - o f f s e t s . h >
# include < a s m / c p u t a b l e . h >
# include < a s m / s e t u p . h >
# include < a s m / t h r e a d _ i n f o . h >
2011-04-15 02:32:08 +04:00
# include < a s m / r e g _ a2 . h >
2009-07-24 03:15:59 +04:00
# include < a s m / e x c e p t i o n - 6 4 e . h >
# include < a s m / b u g . h >
# include < a s m / i r q f l a g s . h >
# include < a s m / p t r a c e . h >
# include < a s m / p p c - o p c o d e . h >
# include < a s m / m m u . h >
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# include < a s m / h w _ i r q . h >
2012-08-06 07:27:05 +04:00
# include < a s m / k v m _ a s m . h >
# include < a s m / k v m _ b o o k e _ h v _ a s m . h >
2018-07-05 19:25:01 +03:00
# include < a s m / f e a t u r e - f i x u p s . h >
2009-07-24 03:15:59 +04:00
/ * XXX T h i s w i l l u l t i m a t e l y a d d s p a c e f o r a s p e c i a l e x c e p t i o n s a v e
* structure u s e d t o s a v e t h i n g s l i k e S R R 0 / S R R 1 , S P R G s , M A S , e t c . . .
* when t a k i n g s p e c i a l i n t e r r u p t s . F o r n o w w e d o n ' t s u p p o r t t h a t ,
* special i n t e r r u p t s f r o m w i t h i n a n o n - s t a n d a r d l e v e l w i l l p r o b a b l y
* blow y o u u p
* /
2014-03-11 02:29:38 +04:00
# define S P E C I A L _ E X C _ S R R 0 0
# define S P E C I A L _ E X C _ S R R 1 1
# define S P E C I A L _ E X C _ S P R G _ G E N 2
# define S P E C I A L _ E X C _ S P R G _ T L B 3
# define S P E C I A L _ E X C _ M A S 0 4
# define S P E C I A L _ E X C _ M A S 1 5
# define S P E C I A L _ E X C _ M A S 2 6
# define S P E C I A L _ E X C _ M A S 3 7
# define S P E C I A L _ E X C _ M A S 6 8
# define S P E C I A L _ E X C _ M A S 7 9
# define S P E C I A L _ E X C _ M A S 5 1 0 / * E . H V o n l y * /
# define S P E C I A L _ E X C _ M A S 8 1 1 / * E . H V o n l y * /
# define S P E C I A L _ E X C _ I R Q H A P P E N E D 1 2
# define S P E C I A L _ E X C _ D E A R 1 3
# define S P E C I A L _ E X C _ E S R 1 4
# define S P E C I A L _ E X C _ S O F T E 1 5
# define S P E C I A L _ E X C _ C S R R 0 1 6
# define S P E C I A L _ E X C _ C S R R 1 1 7
/* must be even to keep 16-byte stack alignment */
# define S P E C I A L _ E X C _ E N D 1 8
# define S P E C I A L _ E X C _ F R A M E _ S I Z E ( I N T _ F R A M E _ S I Z E + S P E C I A L _ E X C _ E N D * 8 )
# define S P E C I A L _ E X C _ F R A M E _ O F F S ( I N T _ F R A M E _ S I Z E - 2 8 8 )
# define S P E C I A L _ E X C _ S T O R E ( r e g , n a m e ) \
std r e g , ( S P E C I A L _ E X C _ ## n a m e * 8 + S P E C I A L _ E X C _ F R A M E _ O F F S ) ( r1 )
# define S P E C I A L _ E X C _ L O A D ( r e g , n a m e ) \
ld r e g , ( S P E C I A L _ E X C _ ## n a m e * 8 + S P E C I A L _ E X C _ F R A M E _ O F F S ) ( r1 )
special_reg_save :
lbz r9 ,P A C A I R Q H A P P E N E D ( r13 )
RECONCILE_ I R Q _ S T A T E ( r3 ,r4 )
2009-07-24 03:15:59 +04:00
2014-03-11 02:29:38 +04:00
/ *
* We o n l y n e e d ( o r h a v e s t a c k s p a c e ) t o s a v e t h i s s t u f f i f
* we i n t e r r u p t e d t h e k e r n e l .
* /
ld r3 ,_ M S R ( r1 )
andi. r3 ,r3 ,M S R _ P R
bnelr
/* Copy info into temporary exception thread info */
ld r11 ,P A C A K S A V E ( r13 )
CURRENT_ T H R E A D _ I N F O ( r11 , r11 )
CURRENT_ T H R E A D _ I N F O ( r12 , r1 )
ld r10 ,T I _ F L A G S ( r11 )
std r10 ,T I _ F L A G S ( r12 )
ld r10 ,T I _ P R E E M P T ( r11 )
std r10 ,T I _ P R E E M P T ( r12 )
ld r10 ,T I _ T A S K ( r11 )
std r10 ,T I _ T A S K ( r12 )
/ *
* Advance t o t h e n e x t T L B e x c e p t i o n f r a m e f o r h a n d l e r
* types t h a t d o n ' t d o i t a u t o m a t i c a l l y .
* /
LOAD_ R E G _ A D D R ( r11 ,e x t l b _ l e v e l _ e x c )
lwz r12 ,0 ( r11 )
mfspr r10 ,S P R N _ S P R G _ T L B _ E X F R A M E
add r10 ,r10 ,r12
mtspr S P R N _ S P R G _ T L B _ E X F R A M E ,r10
/ *
* Save r e g i s t e r s n e e d e d t o a l l o w n e s t i n g o f c e r t a i n e x c e p t i o n s
* ( such a s T L B m i s s e s ) i n s i d e s p e c i a l e x c e p t i o n l e v e l s
* /
mfspr r10 ,S P R N _ S R R 0
SPECIAL_ E X C _ S T O R E ( r10 ,S R R 0 )
mfspr r10 ,S P R N _ S R R 1
SPECIAL_ E X C _ S T O R E ( r10 ,S R R 1 )
mfspr r10 ,S P R N _ S P R G _ G E N _ S C R A T C H
SPECIAL_ E X C _ S T O R E ( r10 ,S P R G _ G E N )
mfspr r10 ,S P R N _ S P R G _ T L B _ S C R A T C H
SPECIAL_ E X C _ S T O R E ( r10 ,S P R G _ T L B )
mfspr r10 ,S P R N _ M A S 0
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 0 )
mfspr r10 ,S P R N _ M A S 1
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 1 )
mfspr r10 ,S P R N _ M A S 2
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 2 )
mfspr r10 ,S P R N _ M A S 3
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 3 )
mfspr r10 ,S P R N _ M A S 6
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 6 )
mfspr r10 ,S P R N _ M A S 7
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 7 )
BEGIN_ F T R _ S E C T I O N
mfspr r10 ,S P R N _ M A S 5
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 5 )
mfspr r10 ,S P R N _ M A S 8
SPECIAL_ E X C _ S T O R E ( r10 ,M A S 8 )
/* MAS5/8 could have inappropriate values if we interrupted KVM code */
li r10 ,0
mtspr S P R N _ M A S 5 ,r10
mtspr S P R N _ M A S 8 ,r10
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ E M B _ H V )
SPECIAL_ E X C _ S T O R E ( r9 ,I R Q H A P P E N E D )
mfspr r10 ,S P R N _ D E A R
SPECIAL_ E X C _ S T O R E ( r10 ,D E A R )
mfspr r10 ,S P R N _ E S R
SPECIAL_ E X C _ S T O R E ( r10 ,E S R )
2017-12-20 06:55:50 +03:00
lbz r10 ,P A C A I R Q S O F T M A S K ( r13 )
2014-03-11 02:29:38 +04:00
SPECIAL_ E X C _ S T O R E ( r10 ,S O F T E )
ld r10 ,_ N I P ( r1 )
SPECIAL_ E X C _ S T O R E ( r10 ,C S R R 0 )
ld r10 ,_ M S R ( r1 )
SPECIAL_ E X C _ S T O R E ( r10 ,C S R R 1 )
blr
ret_from_level_except :
ld r3 ,_ M S R ( r1 )
andi. r3 ,r3 ,M S R _ P R
beq 1 f
b r e t _ f r o m _ e x c e p t
1 :
LOAD_ R E G _ A D D R ( r11 ,e x t l b _ l e v e l _ e x c )
lwz r12 ,0 ( r11 )
mfspr r10 ,S P R N _ S P R G _ T L B _ E X F R A M E
sub r10 ,r10 ,r12
mtspr S P R N _ S P R G _ T L B _ E X F R A M E ,r10
/ *
* It' s p o s s i b l e t h a t t h e s p e c i a l l e v e l e x c e p t i o n i n t e r r u p t e d a
* TLB m i s s h a n d l e r , a n d i n s e r t e d t h e s a m e e n t r y t h a t t h e
* interrupted h a n d l e r w a s a b o u t t o i n s e r t . O n C P U s w i t h o u t T L B
* write c o n d i t i o n a l , t h i s c a n r e s u l t i n a d u p l i c a t e T L B e n t r y .
* Wipe a l l n o n - b o l t e d e n t r i e s t o b e s a f e .
*
* Note t h a t t h i s d o e s n ' t p r o t e c t a g a i n s t a n y T L B m i s s e s
* we m a y t a k e a c c e s s i n g t h e s t a c k f r o m h e r e t o t h e e n d o f
* the s p e c i a l l e v e l e x c e p t i o n . I t ' s n o t c l e a r h o w w e c a n
* reasonably p r o t e c t a g a i n s t t h a t , b u t o n l y C P U s w i t h
* neither T L B w r i t e c o n d i t i o n a l n o r b o l t e d k e r n e l m e m o r y
* are a f f e c t e d . D o a n y s u c h C P U s e v e n e x i s t ?
* /
PPC_ T L B I L X _ A L L ( 0 ,R 0 )
REST_ N V G P R S ( r1 )
SPECIAL_ E X C _ L O A D ( r10 ,S R R 0 )
mtspr S P R N _ S R R 0 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,S R R 1 )
mtspr S P R N _ S R R 1 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,S P R G _ G E N )
mtspr S P R N _ S P R G _ G E N _ S C R A T C H ,r10
SPECIAL_ E X C _ L O A D ( r10 ,S P R G _ T L B )
mtspr S P R N _ S P R G _ T L B _ S C R A T C H ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 0 )
mtspr S P R N _ M A S 0 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 1 )
mtspr S P R N _ M A S 1 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 2 )
mtspr S P R N _ M A S 2 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 3 )
mtspr S P R N _ M A S 3 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 6 )
mtspr S P R N _ M A S 6 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 7 )
mtspr S P R N _ M A S 7 ,r10
BEGIN_ F T R _ S E C T I O N
SPECIAL_ E X C _ L O A D ( r10 ,M A S 5 )
mtspr S P R N _ M A S 5 ,r10
SPECIAL_ E X C _ L O A D ( r10 ,M A S 8 )
mtspr S P R N _ M A S 8 ,r10
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ E M B _ H V )
2017-12-20 06:55:50 +03:00
lbz r6 ,P A C A I R Q S O F T M A S K ( r13 )
2014-03-11 02:29:38 +04:00
ld r5 ,S O F T E ( r1 )
/* Interrupts had better not already be enabled... */
powerpc/64: Change soft_enabled from flag to bitmask
"paca->soft_enabled" is used as a flag to mask some of interrupts.
Currently supported flags values and their details:
soft_enabled MSR[EE]
0 0 Disabled (PMI and HMI not masked)
1 1 Enabled
"paca->soft_enabled" is initialized to 1 to make the interripts as
enabled. arch_local_irq_disable() will toggle the value when
interrupts needs to disbled. At this point, the interrupts are not
actually disabled, instead, interrupt vector has code to check for the
flag and mask it when it occurs. By "mask it", it update interrupt
paca->irq_happened and return. arch_local_irq_restore() is called to
re-enable interrupts, which checks and replays interrupts if any
occured.
Now, as mentioned, current logic doesnot mask "performance monitoring
interrupts" and PMIs are implemented as NMI. But this patchset depends
on local_irq_* for a successful local_* update. Meaning, mask all
possible interrupts during local_* update and replay them after the
update.
So the idea here is to reserve the "paca->soft_enabled" logic. New
values and details:
soft_enabled MSR[EE]
1 0 Disabled (PMI and HMI not masked)
0 1 Enabled
Reason for the this change is to create foundation for a third mask
value "0x2" for "soft_enabled" to add support to mask PMIs. When
->soft_enabled is set to a value "3", PMI interrupts are mask and when
set to a value of "1", PMI are not mask. With this patch also extends
soft_enabled as interrupt disable mask.
Current flags are renamed from IRQ_[EN?DIS}ABLED to
IRQS_ENABLED and IRQS_DISABLED.
Patch also fixes the ptrace call to force the user to see the softe
value to be alway 1. Reason being, even though userspace has no
business knowing about softe, it is part of pt_regs. Like-wise in
signal context.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-12-20 06:55:49 +03:00
tweqi r6 ,I R Q S _ E N A B L E D
2014-03-11 02:29:38 +04:00
powerpc/64: Change soft_enabled from flag to bitmask
"paca->soft_enabled" is used as a flag to mask some of interrupts.
Currently supported flags values and their details:
soft_enabled MSR[EE]
0 0 Disabled (PMI and HMI not masked)
1 1 Enabled
"paca->soft_enabled" is initialized to 1 to make the interripts as
enabled. arch_local_irq_disable() will toggle the value when
interrupts needs to disbled. At this point, the interrupts are not
actually disabled, instead, interrupt vector has code to check for the
flag and mask it when it occurs. By "mask it", it update interrupt
paca->irq_happened and return. arch_local_irq_restore() is called to
re-enable interrupts, which checks and replays interrupts if any
occured.
Now, as mentioned, current logic doesnot mask "performance monitoring
interrupts" and PMIs are implemented as NMI. But this patchset depends
on local_irq_* for a successful local_* update. Meaning, mask all
possible interrupts during local_* update and replay them after the
update.
So the idea here is to reserve the "paca->soft_enabled" logic. New
values and details:
soft_enabled MSR[EE]
1 0 Disabled (PMI and HMI not masked)
0 1 Enabled
Reason for the this change is to create foundation for a third mask
value "0x2" for "soft_enabled" to add support to mask PMIs. When
->soft_enabled is set to a value "3", PMI interrupts are mask and when
set to a value of "1", PMI are not mask. With this patch also extends
soft_enabled as interrupt disable mask.
Current flags are renamed from IRQ_[EN?DIS}ABLED to
IRQS_ENABLED and IRQS_DISABLED.
Patch also fixes the ptrace call to force the user to see the softe
value to be alway 1. Reason being, even though userspace has no
business knowing about softe, it is part of pt_regs. Like-wise in
signal context.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-12-20 06:55:49 +03:00
andi. r6 ,r5 ,I R Q S _ D I S A B L E D
bne 1 f
2014-03-11 02:29:38 +04:00
TRACE_ E N A B L E _ I N T S
2017-12-20 06:55:50 +03:00
stb r5 ,P A C A I R Q S O F T M A S K ( r13 )
2014-03-11 02:29:38 +04:00
1 :
/ *
* Restore P A C A I R Q H A P P E N E D r a t h e r t h a n s e t t i n g i t b a s e d o n
* the r e t u r n M S R [ E E ] , s i n c e w e c o u l d h a v e i n t e r r u p t e d
* _ _ check_ i r q _ r e p l a y ( ) o r o t h e r i n c o n s i s t e n t t r a n s i t o r y
* states t h a t m u s t r e m a i n t h a t w a y .
* /
SPECIAL_ E X C _ L O A D ( r10 ,I R Q H A P P E N E D )
stb r10 ,P A C A I R Q H A P P E N E D ( r13 )
SPECIAL_ E X C _ L O A D ( r10 ,D E A R )
mtspr S P R N _ D E A R ,r10
SPECIAL_ E X C _ L O A D ( r10 ,E S R )
mtspr S P R N _ E S R ,r10
stdcx. r0 ,0 ,r1 / * t o c l e a r t h e r e s e r v a t i o n * /
REST_ 4 G P R S ( 2 , r1 )
REST_ 4 G P R S ( 6 , r1 )
ld r10 ,_ C T R ( r1 )
ld r11 ,_ X E R ( r1 )
mtctr r10
mtxer r11
blr
.macro ret_from_level srr0 s r r1 p a c a _ e x s c r a t c h
bl r e t _ f r o m _ l e v e l _ e x c e p t
ld r10 ,_ L I N K ( r1 )
ld r11 ,_ C C R ( r1 )
ld r0 ,G P R 1 3 ( r1 )
mtlr r10
mtcr r11
ld r10 ,G P R 1 0 ( r1 )
ld r11 ,G P R 1 1 ( r1 )
ld r12 ,G P R 1 2 ( r1 )
mtspr \ s c r a t c h ,r0
std r10 ,\ p a c a _ e x + E X _ R 1 0 ( r13 ) ;
std r11 ,\ p a c a _ e x + E X _ R 1 1 ( r13 ) ;
ld r10 ,_ N I P ( r1 )
ld r11 ,_ M S R ( r1 )
ld r0 ,G P R 0 ( r1 )
ld r1 ,G P R 1 ( r1 )
mtspr \ s r r0 ,r10
mtspr \ s r r1 ,r11
ld r10 ,\ p a c a _ e x + E X _ R 1 0 ( r13 )
ld r11 ,\ p a c a _ e x + E X _ R 1 1 ( r13 )
mfspr r13 ,\ s c r a t c h
.endm
ret_from_crit_except :
ret_ f r o m _ l e v e l S P R N _ C S R R 0 S P R N _ C S R R 1 P A C A _ E X C R I T S P R N _ S P R G _ C R I T _ S C R A T C H
rfci
2013-10-23 13:31:22 +04:00
2014-03-11 02:29:38 +04:00
ret_from_mc_except :
ret_ f r o m _ l e v e l S P R N _ M C S R R 0 S P R N _ M C S R R 1 P A C A _ E X M C S P R N _ S P R G _ M C _ S C R A T C H
rfmci
2013-10-23 13:31:22 +04:00
2009-07-24 03:15:59 +04:00
/* Exception prolog code for all exceptions */
2012-08-06 07:27:05 +04:00
# define E X C E P T I O N _ P R O L O G ( n , i n t n u m , t y p e , a d d i t i o n ) \
2009-07-24 03:15:59 +04:00
mtspr S P R N _ S P R G _ ## t y p e # # _ S C R A T C H , r 13 ; /* get spare registers */ \
mfspr r13 ,S P R N _ S P R G _ P A C A ; /* get PACA */ \
std r10 ,P A C A _ E X ## t y p e + E X _ R 10 ( r13 ) ; \
std r11 ,P A C A _ E X ## t y p e + E X _ R 11 ( r13 ) ; \
mfcr r10 ; /* save CR */ \
2012-08-06 07:27:05 +04:00
mfspr r11 ,S P R N _ ## t y p e # # _ S R R 1 ;/* what are we coming from */ \
DO_ K V M i n t n u m ,S P R N _ ## t y p e # # _ S R R 1 ; /* KVM hook */ \
2012-08-06 07:27:06 +04:00
stw r10 ,P A C A _ E X ## t y p e + E X _ C R ( r 13 ) ; /* save old CR in the PACA */ \
2009-07-24 03:15:59 +04:00
addition; /* additional code for that exc. */ \
std r1 ,P A C A _ E X ## t y p e + E X _ R 1 ( r13 ) ; /* save old r1 in the PACA */ \
type## _ S E T _ K S T A C K ; / * g e t s p e c i a l s t a c k i f n e c e s s a r y * / \
andi. r10 ,r11 ,M S R _ P R ; /* save stack pointer */ \
beq 1 f ; /* branch around if supervisor */ \
ld r1 ,P A C A K S A V E ( r13 ) ; /* get kernel stack coming from usr */\
2018-12-12 17:03:05 +03:00
1 : type## _ B T B _ F L U S H \
cmpdi c r1 ,r1 ,0 ; /* check if SP makes sense */ \
2009-07-24 03:15:59 +04:00
bge- c r1 ,e x c _ ## n # # _ b a d _ s t a c k ; / * b a d s t a c k ( T O D O : o u t o f l i n e ) * / \
mfspr r10 ,S P R N _ ## t y p e # # _ S R R 0 ; /* read SRR0 before touching stack */
/* Exception type-specific macros */
# define G E N _ S E T _ K S T A C K \
subi r1 ,r1 ,I N T _ F R A M E _ S I Z E ; /* alloc frame on kernel stack */
# define S P R N _ G E N _ S R R 0 S P R N _ S R R 0
# define S P R N _ G E N _ S R R 1 S P R N _ S R R 1
2012-08-06 07:27:04 +04:00
# define G D B E L L _ S E T _ K S T A C K G E N _ S E T _ K S T A C K
# define S P R N _ G D B E L L _ S R R 0 S P R N _ G S R R 0
# define S P R N _ G D B E L L _ S R R 1 S P R N _ G S R R 1
2009-07-24 03:15:59 +04:00
# define C R I T _ S E T _ K S T A C K \
ld r1 ,P A C A _ C R I T _ S T A C K ( r13 ) ; \
2014-03-11 02:29:38 +04:00
subi r1 ,r1 ,S P E C I A L _ E X C _ F R A M E _ S I Z E
2009-07-24 03:15:59 +04:00
# define S P R N _ C R I T _ S R R 0 S P R N _ C S R R 0
# define S P R N _ C R I T _ S R R 1 S P R N _ C S R R 1
# define D B G _ S E T _ K S T A C K \
ld r1 ,P A C A _ D B G _ S T A C K ( r13 ) ; \
2014-03-11 02:29:38 +04:00
subi r1 ,r1 ,S P E C I A L _ E X C _ F R A M E _ S I Z E
2009-07-24 03:15:59 +04:00
# define S P R N _ D B G _ S R R 0 S P R N _ D S R R 0
# define S P R N _ D B G _ S R R 1 S P R N _ D S R R 1
# define M C _ S E T _ K S T A C K \
ld r1 ,P A C A _ M C _ S T A C K ( r13 ) ; \
2014-03-11 02:29:38 +04:00
subi r1 ,r1 ,S P E C I A L _ E X C _ F R A M E _ S I Z E
2009-07-24 03:15:59 +04:00
# define S P R N _ M C _ S R R 0 S P R N _ M C S R R 0
# define S P R N _ M C _ S R R 1 S P R N _ M C S R R 1
2018-12-12 17:03:05 +03:00
# ifdef C O N F I G _ P P C _ F S L _ B O O K 3 E
# define G E N _ B T B _ F L U S H \
START_ B T B _ F L U S H _ S E C T I O N \
beq 1 f ; \
BTB_ F L U S H ( r10 ) \
1 : \
END_ B T B _ F L U S H _ S E C T I O N
# define C R I T _ B T B _ F L U S H \
START_ B T B _ F L U S H _ S E C T I O N \
BTB_ F L U S H ( r10 ) \
END_ B T B _ F L U S H _ S E C T I O N
# define D B G _ B T B _ F L U S H C R I T _ B T B _ F L U S H
# define M C _ B T B _ F L U S H C R I T _ B T B _ F L U S H
# define G D B E L L _ B T B _ F L U S H G E N _ B T B _ F L U S H
# else
# define G E N _ B T B _ F L U S H
# define C R I T _ B T B _ F L U S H
# define D B G _ B T B _ F L U S H
# define G D B E L L _ B T B _ F L U S H
# endif
2012-08-06 07:27:05 +04:00
# define N O R M A L _ E X C E P T I O N _ P R O L O G ( n , i n t n u m , a d d i t i o n ) \
EXCEPTION_ P R O L O G ( n , i n t n u m , G E N , a d d i t i o n ## _ G E N ( n ) )
2009-07-24 03:15:59 +04:00
2012-08-06 07:27:05 +04:00
# define C R I T _ E X C E P T I O N _ P R O L O G ( n , i n t n u m , a d d i t i o n ) \
EXCEPTION_ P R O L O G ( n , i n t n u m , C R I T , a d d i t i o n ## _ C R I T ( n ) )
2009-07-24 03:15:59 +04:00
2012-08-06 07:27:05 +04:00
# define D B G _ E X C E P T I O N _ P R O L O G ( n , i n t n u m , a d d i t i o n ) \
EXCEPTION_ P R O L O G ( n , i n t n u m , D B G , a d d i t i o n ## _ D B G ( n ) )
2009-07-24 03:15:59 +04:00
2012-08-06 07:27:05 +04:00
# define M C _ E X C E P T I O N _ P R O L O G ( n , i n t n u m , a d d i t i o n ) \
EXCEPTION_ P R O L O G ( n , i n t n u m , M C , a d d i t i o n ## _ M C ( n ) )
2009-07-24 03:15:59 +04:00
2012-08-06 07:27:05 +04:00
# define G D B E L L _ E X C E P T I O N _ P R O L O G ( n , i n t n u m , a d d i t i o n ) \
EXCEPTION_ P R O L O G ( n , i n t n u m , G D B E L L , a d d i t i o n ## _ G D B E L L ( n ) )
2009-07-24 03:15:59 +04:00
/ * Variants o f t h e " a d d i t i o n " a r g u m e n t f o r t h e p r o l o g
* /
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ N O N E _ G E N ( n )
2012-08-06 07:27:04 +04:00
# define P R O L O G _ A D D I T I O N _ N O N E _ G D B E L L ( n )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ N O N E _ C R I T ( n )
# define P R O L O G _ A D D I T I O N _ N O N E _ D B G ( n )
# define P R O L O G _ A D D I T I O N _ N O N E _ M C ( n )
2009-07-24 03:15:59 +04:00
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ M A S K A B L E _ G E N ( n ) \
2017-12-20 06:55:50 +03:00
lbz r10 ,P A C A I R Q S O F T M A S K ( r13 ) ; /* are irqs soft-masked? */ \
powerpc/64: Change soft_enabled from flag to bitmask
"paca->soft_enabled" is used as a flag to mask some of interrupts.
Currently supported flags values and their details:
soft_enabled MSR[EE]
0 0 Disabled (PMI and HMI not masked)
1 1 Enabled
"paca->soft_enabled" is initialized to 1 to make the interripts as
enabled. arch_local_irq_disable() will toggle the value when
interrupts needs to disbled. At this point, the interrupts are not
actually disabled, instead, interrupt vector has code to check for the
flag and mask it when it occurs. By "mask it", it update interrupt
paca->irq_happened and return. arch_local_irq_restore() is called to
re-enable interrupts, which checks and replays interrupts if any
occured.
Now, as mentioned, current logic doesnot mask "performance monitoring
interrupts" and PMIs are implemented as NMI. But this patchset depends
on local_irq_* for a successful local_* update. Meaning, mask all
possible interrupts during local_* update and replay them after the
update.
So the idea here is to reserve the "paca->soft_enabled" logic. New
values and details:
soft_enabled MSR[EE]
1 0 Disabled (PMI and HMI not masked)
0 1 Enabled
Reason for the this change is to create foundation for a third mask
value "0x2" for "soft_enabled" to add support to mask PMIs. When
->soft_enabled is set to a value "3", PMI interrupts are mask and when
set to a value of "1", PMI are not mask. With this patch also extends
soft_enabled as interrupt disable mask.
Current flags are renamed from IRQ_[EN?DIS}ABLED to
IRQS_ENABLED and IRQS_DISABLED.
Patch also fixes the ptrace call to force the user to see the softe
value to be alway 1. Reason being, even though userspace has no
business knowing about softe, it is part of pt_regs. Like-wise in
signal context.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-12-20 06:55:49 +03:00
andi. r10 ,r10 ,I R Q S _ D I S A B L E D ; /* yes -> go out of line */ \
bne m a s k e d _ i n t e r r u p t _ b o o k 3 e _ ## n
2009-07-24 03:15:59 +04:00
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ 2 R E G S _ G E N ( n ) \
2009-07-24 03:15:59 +04:00
std r14 ,P A C A _ E X G E N + E X _ R 1 4 ( r13 ) ; \
std r15 ,P A C A _ E X G E N + E X _ R 1 5 ( r13 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ 1 R E G _ G E N ( n ) \
2009-07-24 03:15:59 +04:00
std r14 ,P A C A _ E X G E N + E X _ R 1 4 ( r13 ) ;
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ 2 R E G S _ C R I T ( n ) \
2009-07-24 03:15:59 +04:00
std r14 ,P A C A _ E X C R I T + E X _ R 1 4 ( r13 ) ; \
std r15 ,P A C A _ E X C R I T + E X _ R 1 5 ( r13 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ 2 R E G S _ D B G ( n ) \
2009-07-24 03:15:59 +04:00
std r14 ,P A C A _ E X D B G + E X _ R 1 4 ( r13 ) ; \
std r15 ,P A C A _ E X D B G + E X _ R 1 5 ( r13 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
# define P R O L O G _ A D D I T I O N _ 2 R E G S _ M C ( n ) \
2009-07-24 03:15:59 +04:00
std r14 ,P A C A _ E X M C + E X _ R 1 4 ( r13 ) ; \
std r15 ,P A C A _ E X M C + E X _ R 1 5 ( r13 )
2011-06-22 15:19:49 +04:00
2014-03-13 04:07:51 +04:00
/* Core exception code for all exceptions except TLB misses. */
# define E X C E P T I O N _ C O M M O N _ L V L ( n , s c r a t c h , e x c f ) \
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
exc_ ## n # # _ c o m m o n : \
2009-07-24 03:15:59 +04:00
std r0 ,G P R 0 ( r1 ) ; /* save r0 in stackframe */ \
std r2 ,G P R 2 ( r1 ) ; /* save r2 in stackframe */ \
SAVE_ 4 G P R S ( 3 , r1 ) ; /* save r3 - r6 in stackframe */ \
SAVE_ 2 G P R S ( 7 , r1 ) ; /* save r7, r8 in stackframe */ \
std r9 ,G P R 9 ( r1 ) ; /* save r9 in stackframe */ \
std r10 ,_ N I P ( r1 ) ; /* save SRR0 to stackframe */ \
std r11 ,_ M S R ( r1 ) ; /* save SRR1 to stackframe */ \
2012-12-07 01:46:37 +04:00
beq 2 f ; /* if from kernel mode */ \
2016-05-17 09:33:46 +03:00
ACCOUNT_ C P U _ U S E R _ E N T R Y ( r13 ,r10 ,r11 ) ;/* accounting (uses cr0+eq) */ \
2012-12-07 01:46:37 +04:00
2 : ld r3 ,e x c f + E X _ R 1 0 ( r13 ) ; /* get back r10 */ \
2009-07-24 03:15:59 +04:00
ld r4 ,e x c f + E X _ R 1 1 ( r13 ) ; /* get back r11 */ \
2014-03-13 04:07:51 +04:00
mfspr r5 ,s c r a t c h ; /* get back r13 */ \
2009-07-24 03:15:59 +04:00
std r12 ,G P R 1 2 ( r1 ) ; /* save r12 in stackframe */ \
ld r2 ,P A C A T O C ( r13 ) ; /* get kernel TOC into r2 */ \
mflr r6 ; /* save LR in stackframe */ \
mfctr r7 ; /* save CTR in stackframe */ \
mfspr r8 ,S P R N _ X E R ; /* save XER in stackframe */ \
ld r9 ,e x c f + E X _ R 1 ( r13 ) ; /* load orig r1 back from PACA */ \
lwz r10 ,e x c f + E X _ C R ( r13 ) ; /* load orig CR back from PACA */ \
2017-12-20 06:55:50 +03:00
lbz r11 ,P A C A I R Q S O F T M A S K ( r13 ) ; /* get current IRQ softe */ \
2009-07-24 03:15:59 +04:00
ld r12 ,e x c e p t i o n _ m a r k e r @toc(r2); \
li r0 ,0 ; \
std r3 ,G P R 1 0 ( r1 ) ; /* save r10 to stackframe */ \
std r4 ,G P R 1 1 ( r1 ) ; /* save r11 to stackframe */ \
std r5 ,G P R 1 3 ( r1 ) ; /* save it to stackframe */ \
std r6 ,_ L I N K ( r1 ) ; \
std r7 ,_ C T R ( r1 ) ; \
std r8 ,_ X E R ( r1 ) ; \
li r3 ,( n ) + 1 ; /* indicate partial regs in trap */ \
std r9 ,0 ( r1 ) ; /* store stack frame back link */ \
std r10 ,_ C C R ( r1 ) ; /* store orig CR in stackframe */ \
std r9 ,G P R 1 ( r1 ) ; /* store stack frame back link */ \
std r11 ,S O F T E ( r1 ) ; /* and save it to stackframe */ \
std r12 ,S T A C K _ F R A M E _ O V E R H E A D - 1 6 ( r1 ) ; /* mark the frame */ \
std r3 ,_ T R A P ( r1 ) ; /* set trap number */ \
2014-03-13 03:22:58 +04:00
std r0 ,R E S U L T ( r1 ) ; /* clear regs->result */
2009-07-24 03:15:59 +04:00
2014-03-13 04:07:51 +04:00
# define E X C E P T I O N _ C O M M O N ( n ) \
EXCEPTION_ C O M M O N _ L V L ( n , S P R N _ S P R G _ G E N _ S C R A T C H , P A C A _ E X G E N )
# define E X C E P T I O N _ C O M M O N _ C R I T ( n ) \
EXCEPTION_ C O M M O N _ L V L ( n , S P R N _ S P R G _ C R I T _ S C R A T C H , P A C A _ E X C R I T )
# define E X C E P T I O N _ C O M M O N _ M C ( n ) \
EXCEPTION_ C O M M O N _ L V L ( n , S P R N _ S P R G _ M C _ S C R A T C H , P A C A _ E X M C )
# define E X C E P T I O N _ C O M M O N _ D B G ( n ) \
EXCEPTION_ C O M M O N _ L V L ( n , S P R N _ S P R G _ D B G _ S C R A T C H , P A C A _ E X D B G )
2014-03-13 03:22:58 +04:00
/ *
* This i s m e a n t f o r e x c e p t i o n s t h a t d o n ' t i m m e d i a t e l y h a r d - e n a b l e . W e
* set a b i t i n p a c a - > i r q _ h a p p e n e d t o e n s u r e t h a t a s u b s e q u e n t c a l l t o
* arch_ l o c a l _ i r q _ r e s t o r e ( ) w i l l p r o p e r l y h a r d - e n a b l e a n d a v o i d t h e
* fast- p a t h , a n d t h e n r e c o n c i l e i r q s t a t e .
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
* /
2013-07-16 07:09:30 +04:00
# define I N T S _ D I S A B L E R E C O N C I L E _ I R Q _ S T A T E ( r3 ,r4 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
2014-03-13 03:22:58 +04:00
/ *
* This i s c a l l e d b y e x c e p t i o n s t h a t d o n ' t u s e I N T S _ D I S A B L E ( t h a t d i d n o t
* touch i r q i n d i c a t o r s i n t h e P A C A ) . T h i s w i l l r e s t o r e M S R : E E t o i t ' s
* previous v a l u e
2009-07-24 03:15:59 +04:00
*
* XXX I n t h e l o n g r u n , w e m a y w a n t t o o p e n - c o d e i t i n o r d e r t o s e p a r a t e t h e
* load f r o m t h e w r t e e , t h u s l i m i t i n g t h e l a t e n c y c a u s e d b y t h e d e p e n d e n c y
* but a t t h i s p o i n t , I ' l l f a v o r c o d e c l a r i t y u n t i l w e h a v e a n e a r t o f i n a l
* implementation
* /
# define I N T S _ R E S T O R E _ H A R D \
ld r11 ,_ M S R ( r1 ) ; \
wrtee r11 ;
/* XXX FIXME: Restore r14/r15 when necessary */
# define B A D _ S T A C K _ T R A M P O L I N E ( n ) \
exc_ ## n # # _ b a d _ s t a c k : \
li r1 ,( n ) ; /* get exception number */ \
sth r1 ,P A C A _ T R A P _ S A V E ( r13 ) ; /* store trap */ \
b b a d _ s t a c k _ b o o k 3 e ; /* bad stack error */
2016-06-01 09:34:37 +03:00
/ * WARNING : If y o u c h a n g e t h e l a y o u t o f t h i s s t u b , m a k e s u r e y o u c h e c k
2010-06-08 04:58:58 +04:00
* the d e b u g e x c e p t i o n h a n d l e r w h i c h h a n d l e s s i n g l e s t e p p i n g
* into e x c e p t i o n s f r o m u s e r s p a c e , a n d t h e M M c o d e i n
* arch/ p o w e r p c / m m / t l b _ n o h a s h . c w h i c h p a t c h e s t h e b r a n c h h e r e
* and w o u l d n e e d t o b e u p d a t e d i f t h a t b r a n c h i s m o v e d
* /
2009-07-24 03:15:59 +04:00
# define E X C E P T I O N _ S T U B ( l o c , l a b e l ) \
. = interrupt_ b a s e _ b o o k 3 e + l o c ; \
nop; /* To make debug interrupts happy */ \
b e x c _ ## l a b e l # # _ b o o k 3 e ;
# define A C K _ N O N E ( r )
# define A C K _ D E C ( r ) \
lis r ,T S R _ D I S @h; \
mtspr S P R N _ T S R ,r
# define A C K _ F I T ( r ) \
lis r ,T S R _ F I S @h; \
mtspr S P R N _ T S R ,r
2010-07-14 08:12:16 +04:00
/ * Used b y a s y n c h r o n o u s i n t e r r u p t t h a t m a y h a p p e n i n t h e i d l e l o o p .
*
* This c h e c k i f t h e t h r e a d w a s i n t h e i d l e l o o p , a n d i f y e s , r e t u r n s
* to t h e c a l l e r r a t h e r t h a n t h e P C . T h i s i s t o a v o i d a r a c e i f
* interrupts h a p p e n b e f o r e t h e w a i t i n s t r u c t i o n .
* /
# define C H E C K _ N A P P I N G ( ) \
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CURRENT_ T H R E A D _ I N F O ( r11 , r1 ) ; \
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ld r10 ,T I _ L O C A L _ F L A G S ( r11 ) ; \
andi. r9 ,r10 ,_ T L F _ N A P P I N G ; \
beq+ 1 f ; \
ld r8 ,_ L I N K ( r1 ) ; \
rlwinm r7 ,r10 ,0 ,~ _ T L F _ N A P P I N G ; \
std r8 ,_ N I P ( r1 ) ; \
std r7 ,T I _ L O C A L _ F L A G S ( r11 ) ; \
1 :
2012-08-06 07:27:05 +04:00
# define M A S K A B L E _ E X C E P T I O N ( t r a p n u m , i n t n u m , l a b e l , h d l r , a c k ) \
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START_ E X C E P T I O N ( l a b e l ) ; \
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NORMAL_ E X C E P T I O N _ P R O L O G ( t r a p n u m , i n t n u m , P R O L O G _ A D D I T I O N _ M A S K A B L E ) \
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EXCEPTION_ C O M M O N ( t r a p n u m ) \
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INTS_ D I S A B L E ; \
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ack( r8 ) ; \
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CHECK_ N A P P I N G ( ) ; \
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addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D ; \
bl h d l r ; \
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b r e t _ f r o m _ e x c e p t _ l i t e ;
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/* This value is used to mark exception frames on the stack. */
.section " .toc " , " aw"
exception_marker :
.tc _ E X C _ M A R K E R [ T C ] ,S T A C K _ F R A M E _ R E G S _ M A R K E R
/ *
* And h e r e w e h a v e t h e e x c e p t i o n v e c t o r s !
* /
.text
.balign 0x1000
.globl interrupt_base_book3e
interrupt_base_book3e : /* fake trap */
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EXCEPTION_ S T U B ( 0 x00 0 , m a c h i n e _ c h e c k )
EXCEPTION_ S T U B ( 0 x02 0 , c r i t i c a l _ i n p u t ) / * 0 x01 0 0 * /
2009-07-24 03:15:59 +04:00
EXCEPTION_ S T U B ( 0 x04 0 , d e b u g _ c r i t ) / * 0 x0 d00 * /
EXCEPTION_ S T U B ( 0 x06 0 , d a t a _ s t o r a g e ) / * 0 x03 0 0 * /
EXCEPTION_ S T U B ( 0 x08 0 , i n s t r u c t i o n _ s t o r a g e ) / * 0 x04 0 0 * /
EXCEPTION_ S T U B ( 0 x0 a0 , e x t e r n a l _ i n p u t ) / * 0 x05 0 0 * /
EXCEPTION_ S T U B ( 0 x0 c0 , a l i g n m e n t ) / * 0 x06 0 0 * /
EXCEPTION_ S T U B ( 0 x0 e 0 , p r o g r a m ) / * 0 x07 0 0 * /
EXCEPTION_ S T U B ( 0 x10 0 , f p _ u n a v a i l a b l e ) / * 0 x08 0 0 * /
EXCEPTION_ S T U B ( 0 x12 0 , s y s t e m _ c a l l ) / * 0 x0 c00 * /
EXCEPTION_ S T U B ( 0 x14 0 , a p _ u n a v a i l a b l e ) / * 0 x0 f20 * /
EXCEPTION_ S T U B ( 0 x16 0 , d e c r e m e n t e r ) / * 0 x09 0 0 * /
EXCEPTION_ S T U B ( 0 x18 0 , f i x e d _ i n t e r v a l ) / * 0 x09 8 0 * /
EXCEPTION_ S T U B ( 0 x1 a0 , w a t c h d o g ) / * 0 x09 f0 * /
EXCEPTION_ S T U B ( 0 x1 c0 , d a t a _ t l b _ m i s s )
EXCEPTION_ S T U B ( 0 x1 e 0 , i n s t r u c t i o n _ t l b _ m i s s )
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EXCEPTION_ S T U B ( 0 x20 0 , a l t i v e c _ u n a v a i l a b l e )
EXCEPTION_ S T U B ( 0 x22 0 , a l t i v e c _ a s s i s t )
2011-05-10 01:26:00 +04:00
EXCEPTION_ S T U B ( 0 x26 0 , p e r f m o n )
2010-07-09 09:31:28 +04:00
EXCEPTION_ S T U B ( 0 x28 0 , d o o r b e l l )
EXCEPTION_ S T U B ( 0 x2 a0 , d o o r b e l l _ c r i t )
2011-05-10 01:26:00 +04:00
EXCEPTION_ S T U B ( 0 x2 c0 , g u e s t _ d o o r b e l l )
EXCEPTION_ S T U B ( 0 x2 e 0 , g u e s t _ d o o r b e l l _ c r i t )
EXCEPTION_ S T U B ( 0 x30 0 , h y p e r c a l l )
EXCEPTION_ S T U B ( 0 x32 0 , e h p r i v )
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EXCEPTION_ S T U B ( 0 x34 0 , l r a t _ e r r o r )
2009-07-24 03:15:59 +04:00
2015-10-07 06:48:13 +03:00
.globl __end_interrupts
__end_interrupts :
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/* Critical Input Interrupt */
START_ E X C E P T I O N ( c r i t i c a l _ i n p u t ) ;
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CRIT_ E X C E P T I O N _ P R O L O G ( 0 x10 0 , B O O K E _ I N T E R R U P T _ C R I T I C A L ,
PROLOG_ A D D I T I O N _ N O N E )
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EXCEPTION_ C O M M O N _ C R I T ( 0 x10 0 )
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bl s a v e _ n v g p r s
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bl s p e c i a l _ r e g _ s a v e
CHECK_ N A P P I N G ( ) ;
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
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bl u n k n o w n _ e x c e p t i o n
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b r e t _ f r o m _ c r i t _ e x c e p t
2009-07-24 03:15:59 +04:00
/* Machine Check Interrupt */
START_ E X C E P T I O N ( m a c h i n e _ c h e c k ) ;
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MC_ E X C E P T I O N _ P R O L O G ( 0 x00 0 , B O O K E _ I N T E R R U P T _ M A C H I N E _ C H E C K ,
2012-08-06 07:27:05 +04:00
PROLOG_ A D D I T I O N _ N O N E )
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EXCEPTION_ C O M M O N _ M C ( 0 x00 0 )
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bl s a v e _ n v g p r s
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bl s p e c i a l _ r e g _ s a v e
CHECK_ N A P P I N G ( ) ;
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
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bl m a c h i n e _ c h e c k _ e x c e p t i o n
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b r e t _ f r o m _ m c _ e x c e p t
2009-07-24 03:15:59 +04:00
/* Data Storage Interrupt */
START_ E X C E P T I O N ( d a t a _ s t o r a g e )
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NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x30 0 , B O O K E _ I N T E R R U P T _ D A T A _ S T O R A G E ,
PROLOG_ A D D I T I O N _ 2 R E G S )
2009-07-24 03:15:59 +04:00
mfspr r14 ,S P R N _ D E A R
mfspr r15 ,S P R N _ E S R
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x30 0 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2009-07-24 03:15:59 +04:00
b s t o r a g e _ f a u l t _ c o m m o n
/* Instruction Storage Interrupt */
START_ E X C E P T I O N ( i n s t r u c t i o n _ s t o r a g e ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x40 0 , B O O K E _ I N T E R R U P T _ I N S T _ S T O R A G E ,
PROLOG_ A D D I T I O N _ 2 R E G S )
2009-07-24 03:15:59 +04:00
li r15 ,0
mr r14 ,r10
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EXCEPTION_ C O M M O N ( 0 x40 0 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2009-07-24 03:15:59 +04:00
b s t o r a g e _ f a u l t _ c o m m o n
/* External Input Interrupt */
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MASKABLE_ E X C E P T I O N ( 0 x50 0 , B O O K E _ I N T E R R U P T _ E X T E R N A L ,
2014-02-04 09:06:46 +04:00
external_ i n p u t , d o _ I R Q , A C K _ N O N E )
2009-07-24 03:15:59 +04:00
/* Alignment */
START_ E X C E P T I O N ( a l i g n m e n t ) ;
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NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x60 0 , B O O K E _ I N T E R R U P T _ A L I G N M E N T ,
PROLOG_ A D D I T I O N _ 2 R E G S )
2009-07-24 03:15:59 +04:00
mfspr r14 ,S P R N _ D E A R
mfspr r15 ,S P R N _ E S R
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x60 0 )
2009-07-24 03:15:59 +04:00
b a l i g n m e n t _ m o r e / * n o r o o m , g o o u t o f l i n e * /
/* Program Interrupt */
START_ E X C E P T I O N ( p r o g r a m ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x70 0 , B O O K E _ I N T E R R U P T _ P R O G R A M ,
PROLOG_ A D D I T I O N _ 1 R E G )
2009-07-24 03:15:59 +04:00
mfspr r14 ,S P R N _ E S R
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x70 0 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2009-07-24 03:15:59 +04:00
std r14 ,_ D S I S R ( r1 )
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
ld r14 ,P A C A _ E X G E N + E X _ R 1 4 ( r13 )
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bl s a v e _ n v g p r s
bl p r o g r a m _ c h e c k _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
/* Floating Point Unavailable Interrupt */
START_ E X C E P T I O N ( f p _ u n a v a i l a b l e ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x80 0 , B O O K E _ I N T E R R U P T _ F P _ U N A V A I L ,
PROLOG_ A D D I T I O N _ N O N E )
2009-07-24 03:15:59 +04:00
/* we can probably do a shorter exception entry for that one... */
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x80 0 )
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ld r12 ,_ M S R ( r1 )
andi. r0 ,r12 ,M S R _ P R ;
beq- 1 f
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bl l o a d _ u p _ f p u
2012-03-05 03:55:04 +04:00
b f a s t _ e x c e p t i o n _ r e t u r n
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
1 : INTS_ D I S A B L E
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bl s a v e _ n v g p r s
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addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl k e r n e l _ f p _ u n a v a i l a b l e _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
2012-09-08 00:57:17 +04:00
/* Altivec Unavailable Interrupt */
START_ E X C E P T I O N ( a l t i v e c _ u n a v a i l a b l e ) ;
2014-08-20 17:09:04 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x20 0 , B O O K E _ I N T E R R U P T _ A L T I V E C _ U N A V A I L ,
2012-09-08 00:57:17 +04:00
PROLOG_ A D D I T I O N _ N O N E )
/* we can probably do a shorter exception entry for that one... */
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x20 0 )
2012-09-08 00:57:17 +04:00
# ifdef C O N F I G _ A L T I V E C
BEGIN_ F T R _ S E C T I O N
ld r12 ,_ M S R ( r1 )
andi. r0 ,r12 ,M S R _ P R ;
beq- 1 f
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bl l o a d _ u p _ a l t i v e c
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b f a s t _ e x c e p t i o n _ r e t u r n
1 :
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ A L T I V E C )
# endif
INTS_ D I S A B L E
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bl s a v e _ n v g p r s
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addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
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bl a l t i v e c _ u n a v a i l a b l e _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2012-09-08 00:57:17 +04:00
/* AltiVec Assist */
START_ E X C E P T I O N ( a l t i v e c _ a s s i s t ) ;
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NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x22 0 ,
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BOOKE_ I N T E R R U P T _ A L T I V E C _ A S S I S T ,
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PROLOG_ A D D I T I O N _ N O N E )
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EXCEPTION_ C O M M O N ( 0 x22 0 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
2012-09-08 00:57:17 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
# ifdef C O N F I G _ A L T I V E C
BEGIN_ F T R _ S E C T I O N
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bl a l t i v e c _ a s s i s t _ e x c e p t i o n
2012-09-08 00:57:17 +04:00
END_ F T R _ S E C T I O N _ I F S E T ( C P U _ F T R _ A L T I V E C )
# else
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bl u n k n o w n _ e x c e p t i o n
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# endif
2014-02-04 09:04:35 +04:00
b r e t _ f r o m _ e x c e p t
2012-09-08 00:57:17 +04:00
2009-07-24 03:15:59 +04:00
/* Decrementer Interrupt */
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MASKABLE_ E X C E P T I O N ( 0 x90 0 , B O O K E _ I N T E R R U P T _ D E C R E M E N T E R ,
2014-02-04 09:06:46 +04:00
decrementer, t i m e r _ i n t e r r u p t , A C K _ D E C )
2009-07-24 03:15:59 +04:00
/* Fixed Interval Timer Interrupt */
2012-08-06 07:27:05 +04:00
MASKABLE_ E X C E P T I O N ( 0 x98 0 , B O O K E _ I N T E R R U P T _ F I T ,
2014-02-04 09:06:46 +04:00
fixed_ i n t e r v a l , u n k n o w n _ e x c e p t i o n , A C K _ F I T )
2009-07-24 03:15:59 +04:00
/* Watchdog Timer Interrupt */
START_ E X C E P T I O N ( w a t c h d o g ) ;
2012-08-06 07:27:05 +04:00
CRIT_ E X C E P T I O N _ P R O L O G ( 0 x9 f0 , B O O K E _ I N T E R R U P T _ W A T C H D O G ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-11 02:29:38 +04:00
EXCEPTION_ C O M M O N _ C R I T ( 0 x9 f0 )
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bl s a v e _ n v g p r s
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bl s p e c i a l _ r e g _ s a v e
CHECK_ N A P P I N G ( ) ;
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
# ifdef C O N F I G _ B O O K E _ W D T
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bl W a t c h d o g E x c e p t i o n
2014-03-11 02:29:38 +04:00
# else
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
2014-03-11 02:29:38 +04:00
# endif
b r e t _ f r o m _ c r i t _ e x c e p t
2009-07-24 03:15:59 +04:00
/* System Call Interrupt */
START_ E X C E P T I O N ( s y s t e m _ c a l l )
mr r9 ,r13 / * k e e p a c o p y o f u s e r l a n d r13 * /
mfspr r11 ,S P R N _ S R R 0 / * g e t r e t u r n a d d r e s s * /
mfspr r12 ,S P R N _ S R R 1 / * g e t p r e v i o u s M S R * /
mfspr r13 ,S P R N _ S P R G _ P A C A / * g e t o u r P A C A * /
b s y s t e m _ c a l l _ c o m m o n
2011-03-31 05:57:33 +04:00
/* Auxiliary Processor Unavailable Interrupt */
2009-07-24 03:15:59 +04:00
START_ E X C E P T I O N ( a p _ u n a v a i l a b l e ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x f20 , B O O K E _ I N T E R R U P T _ A P _ U N A V A I L ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x f20 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
2012-03-01 08:47:44 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
/* Debug exception as a critical interrupt*/
START_ E X C E P T I O N ( d e b u g _ c r i t ) ;
2012-08-06 07:27:05 +04:00
CRIT_ E X C E P T I O N _ P R O L O G ( 0 x d00 , B O O K E _ I N T E R R U P T _ D E B U G ,
PROLOG_ A D D I T I O N _ 2 R E G S )
2009-07-24 03:15:59 +04:00
/ *
* If t h e r e i s a s i n g l e s t e p o r b r a n c h - t a k e n e x c e p t i o n i n a n
* exception e n t r y s e q u e n c e , i t w a s p r o b a b l y m e a n t t o a p p l y t o
* the c o d e w h e r e t h e e x c e p t i o n o c c u r r e d ( s i n c e e x c e p t i o n e n t r y
* doesn' t t u r n o f f D E a u t o m a t i c a l l y ) . W e s i m u l a t e t h e e f f e c t
* of t u r n i n g o f f D E o n e n t r y t o a n e x c e p t i o n h a n d l e r b y t u r n i n g
* off D E i n t h e C S R R 1 v a l u e a n d c l e a r i n g t h e d e b u g s t a t u s .
* /
mfspr r14 ,S P R N _ D B S R / * c h e c k s i n g l e - s t e p / b r a n c h t a k e n * /
2013-05-13 18:14:53 +04:00
andis. r15 ,r14 ,( D B S R _ I C | D B S R _ B T ) @h
2009-07-24 03:15:59 +04:00
beq+ 1 f
powerpc/64e: Fix hang when debugging programs with relocated kernel
Debug interrupts can be taken during interrupt entry, since interrupt
entry does not automatically turn them off. The kernel will check
whether the faulting instruction is between [interrupt_base_book3e,
__end_interrupts], and if so clear MSR[DE] and return.
However, when the kernel is built with CONFIG_RELOCATABLE, it can't use
LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e) and
LOAD_REG_IMMEDIATE(r15,__end_interrupts), as they ignore relocation.
Thus, if the kernel is actually running at a different address than it
was built at, the address comparison will fail, and the exception entry
code will hang at kernel_dbg_exc.
r2(toc) is also not usable here, as r2 still holds data from the
interrupted context, so LOAD_REG_ADDR() doesn't work either. So we use
the *name@got* to get the EV of two labels directly.
Test programs test.c shows as follows:
int main(int argc, char *argv[])
{
if (access("/proc/sys/kernel/perf_event_paranoid", F_OK) == -1)
printf("Kernel doesn't have perf_event support\n");
}
Steps to reproduce the bug, for example:
1) ./gdb ./test
2) (gdb) b access
3) (gdb) r
4) (gdb) s
Signed-off-by: Liu Hailong <liu.hailong6@zte.com.cn>
Signed-off-by: Jiang Xuexin <jiang.xuexin@zte.com.cn>
Reviewed-by: Jiang Biao <jiang.biao2@zte.com.cn>
Reviewed-by: Liu Song <liu.song11@zte.com.cn>
Reviewed-by: Huang Jian <huang.jian@zte.com.cn>
[scottwood: cleaned up commit message, and specified bad behavior
as a hang rather than an oops to correspond to mainline kernel behavior]
Fixes: 1cb6e0649248 ("powerpc/book3e: support CONFIG_RELOCATABLE")
Cc: <stable@vger.kernel.org> # 4.4.x-
Signed-off-by: Scott Wood <oss@buserror.net>
2017-02-07 05:35:52 +03:00
# ifdef C O N F I G _ R E L O C A T A B L E
ld r15 ,P A C A T O C ( r13 )
ld r14 ,i n t e r r u p t _ b a s e _ b o o k 3 e @got(r15)
ld r15 ,_ _ e n d _ i n t e r r u p t s @got(r15)
# else
2009-07-24 03:15:59 +04:00
LOAD_ R E G _ I M M E D I A T E ( r14 ,i n t e r r u p t _ b a s e _ b o o k 3 e )
2015-10-07 06:48:13 +03:00
LOAD_ R E G _ I M M E D I A T E ( r15 ,_ _ e n d _ i n t e r r u p t s )
powerpc/64e: Fix hang when debugging programs with relocated kernel
Debug interrupts can be taken during interrupt entry, since interrupt
entry does not automatically turn them off. The kernel will check
whether the faulting instruction is between [interrupt_base_book3e,
__end_interrupts], and if so clear MSR[DE] and return.
However, when the kernel is built with CONFIG_RELOCATABLE, it can't use
LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e) and
LOAD_REG_IMMEDIATE(r15,__end_interrupts), as they ignore relocation.
Thus, if the kernel is actually running at a different address than it
was built at, the address comparison will fail, and the exception entry
code will hang at kernel_dbg_exc.
r2(toc) is also not usable here, as r2 still holds data from the
interrupted context, so LOAD_REG_ADDR() doesn't work either. So we use
the *name@got* to get the EV of two labels directly.
Test programs test.c shows as follows:
int main(int argc, char *argv[])
{
if (access("/proc/sys/kernel/perf_event_paranoid", F_OK) == -1)
printf("Kernel doesn't have perf_event support\n");
}
Steps to reproduce the bug, for example:
1) ./gdb ./test
2) (gdb) b access
3) (gdb) r
4) (gdb) s
Signed-off-by: Liu Hailong <liu.hailong6@zte.com.cn>
Signed-off-by: Jiang Xuexin <jiang.xuexin@zte.com.cn>
Reviewed-by: Jiang Biao <jiang.biao2@zte.com.cn>
Reviewed-by: Liu Song <liu.song11@zte.com.cn>
Reviewed-by: Huang Jian <huang.jian@zte.com.cn>
[scottwood: cleaned up commit message, and specified bad behavior
as a hang rather than an oops to correspond to mainline kernel behavior]
Fixes: 1cb6e0649248 ("powerpc/book3e: support CONFIG_RELOCATABLE")
Cc: <stable@vger.kernel.org> # 4.4.x-
Signed-off-by: Scott Wood <oss@buserror.net>
2017-02-07 05:35:52 +03:00
# endif
2009-07-24 03:15:59 +04:00
cmpld c r0 ,r10 ,r14
cmpld c r1 ,r10 ,r15
blt+ c r0 ,1 f
bge+ c r1 ,1 f
/* here it looks like we got an inappropriate debug exception. */
2013-05-13 18:14:53 +04:00
lis r14 ,( D B S R _ I C | D B S R _ B T ) @h /* clear the event */
2009-07-24 03:15:59 +04:00
rlwinm r11 ,r11 ,0 ,~ M S R _ D E / * c l e a r D E i n t h e C S R R 1 v a l u e * /
mtspr S P R N _ D B S R ,r14
mtspr S P R N _ C S R R 1 ,r11
lwz r10 ,P A C A _ E X C R I T + E X _ C R ( r13 ) / * r e s t o r e r e g i s t e r s * /
ld r1 ,P A C A _ E X C R I T + E X _ R 1 ( r13 )
ld r14 ,P A C A _ E X C R I T + E X _ R 1 4 ( r13 )
ld r15 ,P A C A _ E X C R I T + E X _ R 1 5 ( r13 )
mtcr r10
ld r10 ,P A C A _ E X C R I T + E X _ R 1 0 ( r13 ) / * r e s t o r e r e g i s t e r s * /
ld r11 ,P A C A _ E X C R I T + E X _ R 1 1 ( r13 )
2014-03-11 02:29:38 +04:00
mfspr r13 ,S P R N _ S P R G _ C R I T _ S C R A T C H
2009-07-24 03:15:59 +04:00
rfci
/* Normal debug exception */
/ * XXX W e o n l y h a n d l e c o m i n g f r o m u s e r s p a c e f o r n o w s i n c e w e c a n ' t
* quite s a v e p r o p e r l y a n i n t e r r u p t e d k e r n e l s t a t e y e t
* /
1 : andi. r14 ,r11 ,M S R _ P R ; /* check for userspace again */
beq k e r n e l _ d b g _ e x c ; /* if from kernel mode */
/ * Now w e m a s h u p t h i n g s t o m a k e i t l o o k l i k e w e a r e c o m i n g o n a
* normal e x c e p t i o n
* /
mfspr r14 ,S P R N _ D B S R
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N _ C R I T ( 0 x d00 )
2009-07-24 03:15:59 +04:00
std r14 ,_ D S I S R ( r1 )
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
mr r4 ,r14
ld r14 ,P A C A _ E X C R I T + E X _ R 1 4 ( r13 )
ld r15 ,P A C A _ E X C R I T + E X _ R 1 5 ( r13 )
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
bl D e b u g E x c e p t i o n
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
kernel_dbg_exc :
b . / * N Y I * /
2011-04-06 09:18:48 +04:00
/* Debug exception as a debug interrupt*/
START_ E X C E P T I O N ( d e b u g _ d e b u g ) ;
2012-08-06 07:27:05 +04:00
DBG_ E X C E P T I O N _ P R O L O G ( 0 x d00 , B O O K E _ I N T E R R U P T _ D E B U G ,
PROLOG_ A D D I T I O N _ 2 R E G S )
2011-04-06 09:18:48 +04:00
/ *
* If t h e r e i s a s i n g l e s t e p o r b r a n c h - t a k e n e x c e p t i o n i n a n
* exception e n t r y s e q u e n c e , i t w a s p r o b a b l y m e a n t t o a p p l y t o
* the c o d e w h e r e t h e e x c e p t i o n o c c u r r e d ( s i n c e e x c e p t i o n e n t r y
* doesn' t t u r n o f f D E a u t o m a t i c a l l y ) . W e s i m u l a t e t h e e f f e c t
* of t u r n i n g o f f D E o n e n t r y t o a n e x c e p t i o n h a n d l e r b y t u r n i n g
* off D E i n t h e D S R R 1 v a l u e a n d c l e a r i n g t h e d e b u g s t a t u s .
* /
mfspr r14 ,S P R N _ D B S R / * c h e c k s i n g l e - s t e p / b r a n c h t a k e n * /
2013-05-13 18:14:53 +04:00
andis. r15 ,r14 ,( D B S R _ I C | D B S R _ B T ) @h
2011-04-06 09:18:48 +04:00
beq+ 1 f
powerpc/64e: Fix hang when debugging programs with relocated kernel
Debug interrupts can be taken during interrupt entry, since interrupt
entry does not automatically turn them off. The kernel will check
whether the faulting instruction is between [interrupt_base_book3e,
__end_interrupts], and if so clear MSR[DE] and return.
However, when the kernel is built with CONFIG_RELOCATABLE, it can't use
LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e) and
LOAD_REG_IMMEDIATE(r15,__end_interrupts), as they ignore relocation.
Thus, if the kernel is actually running at a different address than it
was built at, the address comparison will fail, and the exception entry
code will hang at kernel_dbg_exc.
r2(toc) is also not usable here, as r2 still holds data from the
interrupted context, so LOAD_REG_ADDR() doesn't work either. So we use
the *name@got* to get the EV of two labels directly.
Test programs test.c shows as follows:
int main(int argc, char *argv[])
{
if (access("/proc/sys/kernel/perf_event_paranoid", F_OK) == -1)
printf("Kernel doesn't have perf_event support\n");
}
Steps to reproduce the bug, for example:
1) ./gdb ./test
2) (gdb) b access
3) (gdb) r
4) (gdb) s
Signed-off-by: Liu Hailong <liu.hailong6@zte.com.cn>
Signed-off-by: Jiang Xuexin <jiang.xuexin@zte.com.cn>
Reviewed-by: Jiang Biao <jiang.biao2@zte.com.cn>
Reviewed-by: Liu Song <liu.song11@zte.com.cn>
Reviewed-by: Huang Jian <huang.jian@zte.com.cn>
[scottwood: cleaned up commit message, and specified bad behavior
as a hang rather than an oops to correspond to mainline kernel behavior]
Fixes: 1cb6e0649248 ("powerpc/book3e: support CONFIG_RELOCATABLE")
Cc: <stable@vger.kernel.org> # 4.4.x-
Signed-off-by: Scott Wood <oss@buserror.net>
2017-02-07 05:35:52 +03:00
# ifdef C O N F I G _ R E L O C A T A B L E
ld r15 ,P A C A T O C ( r13 )
ld r14 ,i n t e r r u p t _ b a s e _ b o o k 3 e @got(r15)
ld r15 ,_ _ e n d _ i n t e r r u p t s @got(r15)
# else
2011-04-06 09:18:48 +04:00
LOAD_ R E G _ I M M E D I A T E ( r14 ,i n t e r r u p t _ b a s e _ b o o k 3 e )
2015-10-07 06:48:13 +03:00
LOAD_ R E G _ I M M E D I A T E ( r15 ,_ _ e n d _ i n t e r r u p t s )
powerpc/64e: Fix hang when debugging programs with relocated kernel
Debug interrupts can be taken during interrupt entry, since interrupt
entry does not automatically turn them off. The kernel will check
whether the faulting instruction is between [interrupt_base_book3e,
__end_interrupts], and if so clear MSR[DE] and return.
However, when the kernel is built with CONFIG_RELOCATABLE, it can't use
LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e) and
LOAD_REG_IMMEDIATE(r15,__end_interrupts), as they ignore relocation.
Thus, if the kernel is actually running at a different address than it
was built at, the address comparison will fail, and the exception entry
code will hang at kernel_dbg_exc.
r2(toc) is also not usable here, as r2 still holds data from the
interrupted context, so LOAD_REG_ADDR() doesn't work either. So we use
the *name@got* to get the EV of two labels directly.
Test programs test.c shows as follows:
int main(int argc, char *argv[])
{
if (access("/proc/sys/kernel/perf_event_paranoid", F_OK) == -1)
printf("Kernel doesn't have perf_event support\n");
}
Steps to reproduce the bug, for example:
1) ./gdb ./test
2) (gdb) b access
3) (gdb) r
4) (gdb) s
Signed-off-by: Liu Hailong <liu.hailong6@zte.com.cn>
Signed-off-by: Jiang Xuexin <jiang.xuexin@zte.com.cn>
Reviewed-by: Jiang Biao <jiang.biao2@zte.com.cn>
Reviewed-by: Liu Song <liu.song11@zte.com.cn>
Reviewed-by: Huang Jian <huang.jian@zte.com.cn>
[scottwood: cleaned up commit message, and specified bad behavior
as a hang rather than an oops to correspond to mainline kernel behavior]
Fixes: 1cb6e0649248 ("powerpc/book3e: support CONFIG_RELOCATABLE")
Cc: <stable@vger.kernel.org> # 4.4.x-
Signed-off-by: Scott Wood <oss@buserror.net>
2017-02-07 05:35:52 +03:00
# endif
2011-04-06 09:18:48 +04:00
cmpld c r0 ,r10 ,r14
cmpld c r1 ,r10 ,r15
blt+ c r0 ,1 f
bge+ c r1 ,1 f
/* here it looks like we got an inappropriate debug exception. */
2013-05-13 18:14:53 +04:00
lis r14 ,( D B S R _ I C | D B S R _ B T ) @h /* clear the event */
2011-04-06 09:18:48 +04:00
rlwinm r11 ,r11 ,0 ,~ M S R _ D E / * c l e a r D E i n t h e D S R R 1 v a l u e * /
mtspr S P R N _ D B S R ,r14
mtspr S P R N _ D S R R 1 ,r11
lwz r10 ,P A C A _ E X D B G + E X _ C R ( r13 ) / * r e s t o r e r e g i s t e r s * /
ld r1 ,P A C A _ E X D B G + E X _ R 1 ( r13 )
ld r14 ,P A C A _ E X D B G + E X _ R 1 4 ( r13 )
ld r15 ,P A C A _ E X D B G + E X _ R 1 5 ( r13 )
mtcr r10
ld r10 ,P A C A _ E X D B G + E X _ R 1 0 ( r13 ) / * r e s t o r e r e g i s t e r s * /
ld r11 ,P A C A _ E X D B G + E X _ R 1 1 ( r13 )
mfspr r13 ,S P R N _ S P R G _ D B G _ S C R A T C H
rfdi
/* Normal debug exception */
/ * XXX W e o n l y h a n d l e c o m i n g f r o m u s e r s p a c e f o r n o w s i n c e w e c a n ' t
* quite s a v e p r o p e r l y a n i n t e r r u p t e d k e r n e l s t a t e y e t
* /
1 : andi. r14 ,r11 ,M S R _ P R ; /* check for userspace again */
beq k e r n e l _ d b g _ e x c ; /* if from kernel mode */
/ * Now w e m a s h u p t h i n g s t o m a k e i t l o o k l i k e w e a r e c o m i n g o n a
* normal e x c e p t i o n
* /
mfspr r14 ,S P R N _ D B S R
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N _ D B G ( 0 x d08 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2011-04-06 09:18:48 +04:00
std r14 ,_ D S I S R ( r1 )
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
mr r4 ,r14
ld r14 ,P A C A _ E X D B G + E X _ R 1 4 ( r13 )
ld r15 ,P A C A _ E X D B G + E X _ R 1 5 ( r13 )
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
bl D e b u g E x c e p t i o n
b r e t _ f r o m _ e x c e p t
2011-04-06 09:18:48 +04:00
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
START_ E X C E P T I O N ( p e r f m o n ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x26 0 , B O O K E _ I N T E R R U P T _ P E R F O R M A N C E _ M O N I T O R ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x26 0 )
2014-03-13 03:22:58 +04:00
INTS_ D I S A B L E
2013-09-26 12:23:56 +04:00
CHECK_ N A P P I N G ( )
2011-06-22 15:19:49 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl p e r f o r m a n c e _ m o n i t o r _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t _ l i t e
2010-07-09 09:31:28 +04:00
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
/* Doorbell interrupt */
2012-08-06 07:27:05 +04:00
MASKABLE_ E X C E P T I O N ( 0 x28 0 , B O O K E _ I N T E R R U P T _ D O O R B E L L ,
2014-02-04 09:06:46 +04:00
doorbell, d o o r b e l l _ e x c e p t i o n , A C K _ N O N E )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
2010-07-09 09:31:28 +04:00
/* Doorbell critical Interrupt */
START_ E X C E P T I O N ( d o o r b e l l _ c r i t ) ;
2012-08-06 07:27:05 +04:00
CRIT_ E X C E P T I O N _ P R O L O G ( 0 x2 a0 , B O O K E _ I N T E R R U P T _ D O O R B E L L _ C R I T I C A L ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-11 02:29:38 +04:00
EXCEPTION_ C O M M O N _ C R I T ( 0 x2 a0 )
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
2014-03-11 02:29:38 +04:00
bl s p e c i a l _ r e g _ s a v e
CHECK_ N A P P I N G ( ) ;
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
2014-03-11 02:29:38 +04:00
b r e t _ f r o m _ c r i t _ e x c e p t
2010-07-09 09:31:28 +04:00
2012-08-06 07:27:04 +04:00
/ *
* Guest d o o r b e l l i n t e r r u p t
* This g e n e r a l e x c e p t i o n u s e G S R R x s a v e / r e s t o r e r e g i s t e r s
* /
START_ E X C E P T I O N ( g u e s t _ d o o r b e l l ) ;
2012-08-06 07:27:05 +04:00
GDBELL_ E X C E P T I O N _ P R O L O G ( 0 x2 c0 , B O O K E _ I N T E R R U P T _ G U E S T _ D B E L L ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x2 c0 )
2012-08-06 07:27:04 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
2012-08-06 07:27:04 +04:00
INTS_ R E S T O R E _ H A R D
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2011-05-10 01:26:00 +04:00
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
/* Guest Doorbell critical Interrupt */
START_ E X C E P T I O N ( g u e s t _ d o o r b e l l _ c r i t ) ;
2012-08-06 07:27:05 +04:00
CRIT_ E X C E P T I O N _ P R O L O G ( 0 x2 e 0 , B O O K E _ I N T E R R U P T _ G U E S T _ D B E L L _ C R I T ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-11 02:29:38 +04:00
EXCEPTION_ C O M M O N _ C R I T ( 0 x2 e 0 )
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
2014-03-11 02:29:38 +04:00
bl s p e c i a l _ r e g _ s a v e
CHECK_ N A P P I N G ( ) ;
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
2014-03-11 02:29:38 +04:00
b r e t _ f r o m _ c r i t _ e x c e p t
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
/* Hypervisor call */
START_ E X C E P T I O N ( h y p e r c a l l ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x31 0 , B O O K E _ I N T E R R U P T _ H V _ S Y S C A L L ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x31 0 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
INTS_ R E S T O R E _ H A R D
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
/* Embedded Hypervisor priviledged */
START_ E X C E P T I O N ( e h p r i v ) ;
2012-08-06 07:27:05 +04:00
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x32 0 , B O O K E _ I N T E R R U P T _ H V _ P R I V ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x32 0 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
INTS_ R E S T O R E _ H A R D
2014-02-04 09:04:35 +04:00
bl u n k n o w n _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
2013-08-08 16:56:09 +04:00
/* LRAT Error interrupt */
START_ E X C E P T I O N ( l r a t _ e r r o r ) ;
NORMAL_ E X C E P T I O N _ P R O L O G ( 0 x34 0 , B O O K E _ I N T E R R U P T _ L R A T _ E R R O R ,
PROLOG_ A D D I T I O N _ N O N E )
2014-03-13 04:07:51 +04:00
EXCEPTION_ C O M M O N ( 0 x34 0 )
2013-08-08 16:56:09 +04:00
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2016-11-23 16:02:09 +03:00
bl s a v e _ n v g p r s
2013-08-08 16:56:09 +04:00
INTS_ R E S T O R E _ H A R D
2016-11-23 16:02:09 +03:00
bl u n k n o w n _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2013-08-08 16:56:09 +04:00
2009-07-24 03:15:59 +04:00
/ *
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
* An i n t e r r u p t c a m e i n w h i l e s o f t - d i s a b l e d ; We mark paca->irq_happened
* accordingly a n d i f t h e i n t e r r u p t i s l e v e l s e n s i t i v e , w e h a r d d i s a b l e
2018-02-03 10:17:50 +03:00
* hard d i s a b l e ( f u l l _ m a s k ) c o r r e s p o n d s t o P A C A _ I R Q _ M U S T _ H A R D _ M A S K , s o
* keep t h e s e i n s y n c h .
2009-07-24 03:15:59 +04:00
* /
2011-06-22 15:19:49 +04:00
2012-08-06 07:27:06 +04:00
.macro masked_interrupt_book3e paca_ i r q f u l l _ m a s k
lbz r10 ,P A C A I R Q H A P P E N E D ( r13 )
2018-06-03 15:24:32 +03:00
.if \ full_ m a s k = = 1
ori r10 ,r10 ,\ p a c a _ i r q | P A C A _ I R Q _ H A R D _ D I S
.else
2012-08-06 07:27:06 +04:00
ori r10 ,r10 ,\ p a c a _ i r q
2018-06-03 15:24:32 +03:00
.endif
2012-08-06 07:27:06 +04:00
stb r10 ,P A C A I R Q H A P P E N E D ( r13 )
.if \ full_ m a s k = = 1
rldicl r10 ,r11 ,4 8 ,1 / * c l e a r M S R _ E E * /
rotldi r11 ,r10 ,1 6
mtspr S P R N _ S R R 1 ,r11
.endif
lwz r11 ,P A C A _ E X G E N + E X _ C R ( r13 )
mtcr r11
ld r10 ,P A C A _ E X G E N + E X _ R 1 0 ( r13 )
ld r11 ,P A C A _ E X G E N + E X _ R 1 1 ( r13 )
mfspr r13 ,S P R N _ S P R G _ G E N _ S C R A T C H
rfi
b .
.endm
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
masked_interrupt_book3e_0x500 :
2012-08-06 07:27:06 +04:00
/ / XXX W h e n a d d i n g s u p p o r t f o r E P R , u s e P A C A _ I R Q _ E E _ E D G E
masked_ i n t e r r u p t _ b o o k 3 e P A C A _ I R Q _ E E 1
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
masked_interrupt_book3e_0x900 :
2012-08-06 07:27:06 +04:00
ACK_ D E C ( r10 ) ;
masked_ i n t e r r u p t _ b o o k 3 e P A C A _ I R Q _ D E C 0
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
masked_interrupt_book3e_0x980 :
2012-08-06 07:27:06 +04:00
ACK_ F I T ( r10 ) ;
masked_ i n t e r r u p t _ b o o k 3 e P A C A _ I R Q _ D E C 0
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
masked_interrupt_book3e_0x280 :
masked_interrupt_book3e_0x2c0 :
2012-08-06 07:27:06 +04:00
masked_ i n t e r r u p t _ b o o k 3 e P A C A _ I R Q _ D B E L L 0
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
/ *
* Called f r o m a r c h _ l o c a l _ i r q _ e n a b l e w h e n a n i n t e r r u p t n e e d s
* to b e r e s e n t . r3 c o n t a i n s e i t h e r 0 x50 0 ,0 x90 0 ,0 x26 0 o r 0 x28 0
* to i n d i c a t e t h e k i n d o f i n t e r r u p t . M S R : E E i s a l r e a d y o f f .
* We g e n e r a t e a s t a c k f r a m e l i k e i f a r e a l i n t e r r u p t h a d h a p p e n e d .
*
* Note : While M S R : E E i s o f f , w e n e e d t o m a k e s u r e t h a t _ M S R
* in t h e g e n e r a t e d f r a m e h a s E E s e t t o 1 o r t h e e x c e p t i o n
* handler w i l l n o t p r o p e r l y r e - e n a b l e t h e m .
* /
_ GLOBAL( _ _ r e p l a y _ i n t e r r u p t )
/ * We a r e g o i n g t o j u m p t o t h e e x c e p t i o n c o m m o n c o d e w h i c h
* will r e t r i e v e v a r i o u s r e g i s t e r v a l u e s f r o m t h e P A C A w h i c h
* we d o n ' t g i v e a d a m n a b o u t .
* /
mflr r10
mfmsr r11
mfcr r4
mtspr S P R N _ S P R G _ G E N _ S C R A T C H ,r13 ;
std r1 ,P A C A _ E X G E N + E X _ R 1 ( r13 ) ;
stw r4 ,P A C A _ E X G E N + E X _ C R ( r13 ) ;
ori r11 ,r11 ,M S R _ E E
subi r1 ,r1 ,I N T _ F R A M E _ S I Z E ;
cmpwi c r0 ,r3 ,0 x50 0
beq e x c _ 0 x50 0 _ c o m m o n
cmpwi c r0 ,r3 ,0 x90 0
beq e x c _ 0 x90 0 _ c o m m o n
cmpwi c r0 ,r3 ,0 x28 0
beq e x c _ 0 x28 0 _ c o m m o n
blr
2009-07-24 03:15:59 +04:00
/ *
* This i s c a l l e d f r o m 0 x30 0 a n d 0 x40 0 h a n d l e r s a f t e r t h e p r o l o g s w i t h
* r1 4 a n d r15 c o n t a i n i n g t h e f a u l t a d d r e s s a n d e r r o r c o d e , w i t h t h e
* original v a l u e s s t a s h e d a w a y i n t h e P A C A
* /
storage_fault_common :
std r14 ,_ D A R ( r1 )
std r15 ,_ D S I S R ( r1 )
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
mr r4 ,r14
mr r5 ,r15
ld r14 ,P A C A _ E X G E N + E X _ R 1 4 ( r13 )
ld r15 ,P A C A _ E X G E N + E X _ R 1 5 ( r13 )
2014-02-04 09:04:35 +04:00
bl d o _ p a g e _ f a u l t
2009-07-24 03:15:59 +04:00
cmpdi r3 ,0
bne- 1 f
2014-02-04 09:04:35 +04:00
b r e t _ f r o m _ e x c e p t _ l i t e
1 : bl s a v e _ n v g p r s
2009-07-24 03:15:59 +04:00
mr r5 ,r3
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
ld r4 ,_ D A R ( r1 )
2014-02-04 09:04:35 +04:00
bl b a d _ p a g e _ f a u l t
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
/ *
* Alignment e x c e p t i o n d o e s n ' t f i t e n t i r e l y i n t h e 0 x10 0 b y t e s s o i t
* continues h e r e .
* /
alignment_more :
std r14 ,_ D A R ( r1 )
std r15 ,_ D S I S R ( r1 )
addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
ld r14 ,P A C A _ E X G E N + E X _ R 1 4 ( r13 )
ld r15 ,P A C A _ E X G E N + E X _ R 1 5 ( r13 )
2014-02-04 09:04:35 +04:00
bl s a v e _ n v g p r s
2009-07-24 03:15:59 +04:00
INTS_ R E S T O R E _ H A R D
2014-02-04 09:04:35 +04:00
bl a l i g n m e n t _ e x c e p t i o n
b r e t _ f r o m _ e x c e p t
2009-07-24 03:15:59 +04:00
/ *
* We b r a n c h h e r e f r o m e n t r y _ 6 4 . S f o r t h e l a s t s t a g e o f t h e e x c e p t i o n
* return c o d e p a t h . M S R : E E i s e x p e c t e d t o b e o f f a t t h a t p o i n t
* /
_ GLOBAL( e x c e p t i o n _ r e t u r n _ b o o k 3 e )
b 1 f
/ * This i s t h e r e t u r n f r o m l o a d _ u p _ f p u f a s t p a t h w h i c h c o u l d d o w i t h
* less G P R r e s t o r e s i n f a c t , b u t f o r n o w w e h a v e a s i n g l e r e t u r n p a t h
* /
.globl fast_exception_return
fast_exception_return :
wrteei 0
1 : mr r0 ,r13
ld r10 ,_ M S R ( r1 )
REST_ 4 G P R S ( 2 , r1 )
andi. r6 ,r10 ,M S R _ P R
REST_ 2 G P R S ( 6 , r1 )
beq 1 f
2016-05-17 09:33:46 +03:00
ACCOUNT_ C P U _ U S E R _ E X I T ( r13 , r10 , r11 )
2009-07-24 03:15:59 +04:00
ld r0 ,G P R 1 3 ( r1 )
1 : stdcx. r0 ,0 ,r1 / * t o c l e a r t h e r e s e r v a t i o n * /
ld r8 ,_ C C R ( r1 )
ld r9 ,_ L I N K ( r1 )
ld r10 ,_ C T R ( r1 )
ld r11 ,_ X E R ( r1 )
mtcr r8
mtlr r9
mtctr r10
mtxer r11
REST_ 2 G P R S ( 8 , r1 )
ld r10 ,G P R 1 0 ( r1 )
ld r11 ,G P R 1 1 ( r1 )
ld r12 ,G P R 1 2 ( r1 )
mtspr S P R N _ S P R G _ G E N _ S C R A T C H ,r0
std r10 ,P A C A _ E X G E N + E X _ R 1 0 ( r13 ) ;
std r11 ,P A C A _ E X G E N + E X _ R 1 1 ( r13 ) ;
ld r10 ,_ N I P ( r1 )
ld r11 ,_ M S R ( r1 )
ld r0 ,G P R 0 ( r1 )
ld r1 ,G P R 1 ( r1 )
mtspr S P R N _ S R R 0 ,r10
mtspr S P R N _ S R R 1 ,r11
ld r10 ,P A C A _ E X G E N + E X _ R 1 0 ( r13 )
ld r11 ,P A C A _ E X G E N + E X _ R 1 1 ( r13 )
mfspr r13 ,S P R N _ S P R G _ G E N _ S C R A T C H
rfi
/ *
* Trampolines u s e d w h e n s p o t t i n g a b a d k e r n e l s t a c k p o i n t e r i n
* the e x c e p t i o n e n t r y c o d e .
*
* TODO : move s o m e b i t s l i k e S R R 0 r e a d t o t r a m p o l i n e , p a s s P A C A
* index a r o u n d , e t c . . . t o h a n d l e c r i t & m c h e c k
* /
BAD_ S T A C K _ T R A M P O L I N E ( 0 x00 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x10 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x20 0 )
2012-09-08 00:57:17 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x22 0 )
2011-05-10 01:26:00 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x26 0 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x28 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x2 a0 )
2011-05-10 01:26:00 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x2 c0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x2 e 0 )
2009-07-24 03:15:59 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x30 0 )
2011-05-10 01:26:00 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x31 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x32 0 )
2013-08-08 16:56:09 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x34 0 )
2009-07-24 03:15:59 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x40 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x50 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x60 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x70 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x80 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x90 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x98 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x9 f0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x a00 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x b00 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x c00 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x d00 )
powerpc: Rework lazy-interrupt handling
The current implementation of lazy interrupts handling has some
issues that this tries to address.
We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.
We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).
This removes the need to play with the decrementer to try to create
fake interrupts, among others.
In addition, this adds a few refinements:
- We no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
- Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.
- On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)
- We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.
Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
v2:
- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
to retrigger an interrupt without preventing hard-enable
v3:
- Fix or vs. ori bug on Book3E
- Fix enabling of interrupts for some exceptions on Book3E
v4:
- Fix resend of doorbells on return from interrupt on Book3E
v5:
- Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.
v6:
- 32-bit compile fix
- more compile fixes with various .config combos
- factor out the asm code to soft-disable interrupts
- remove the C wrapper around preempt_schedule_irq
v7:
- Fix a bug with hard irq state tracking on native power7
2012-03-06 11:27:59 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x d08 )
2009-07-24 03:15:59 +04:00
BAD_ S T A C K _ T R A M P O L I N E ( 0 x e 0 0 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x f00 )
BAD_ S T A C K _ T R A M P O L I N E ( 0 x f20 )
.globl bad_stack_book3e
bad_stack_book3e :
/* XXX: Needs to make SPRN_SPRG_GEN depend on exception type */
mfspr r10 ,S P R N _ S R R 0 ; /* read SRR0 before touching stack */
ld r1 ,P A C A E M E R G S P ( r13 )
subi r1 ,r1 ,6 4 + I N T _ F R A M E _ S I Z E
std r10 ,_ N I P ( r1 )
std r11 ,_ M S R ( r1 )
ld r10 ,P A C A _ E X G E N + E X _ R 1 ( r13 ) / * F I X M E f o r c r i t & m c h e c k * /
lwz r11 ,P A C A _ E X G E N + E X _ C R ( r13 ) / * F I X M E f o r c r i t & m c h e c k * /
std r10 ,G P R 1 ( r1 )
std r11 ,_ C C R ( r1 )
mfspr r10 ,S P R N _ D E A R
mfspr r11 ,S P R N _ E S R
std r10 ,_ D A R ( r1 )
std r11 ,_ D S I S R ( r1 )
std r0 ,G P R 0 ( r1 ) ; /* save r0 in stackframe */ \
std r2 ,G P R 2 ( r1 ) ; /* save r2 in stackframe */ \
SAVE_ 4 G P R S ( 3 , r1 ) ; /* save r3 - r6 in stackframe */ \
SAVE_ 2 G P R S ( 7 , r1 ) ; /* save r7, r8 in stackframe */ \
std r9 ,G P R 9 ( r1 ) ; /* save r9 in stackframe */ \
ld r3 ,P A C A _ E X G E N + E X _ R 1 0 ( r13 ) ;/* get back r10 */ \
ld r4 ,P A C A _ E X G E N + E X _ R 1 1 ( r13 ) ;/* get back r11 */ \
mfspr r5 ,S P R N _ S P R G _ G E N _ S C R A T C H ;/* get back r13 XXX can be wrong */ \
std r3 ,G P R 1 0 ( r1 ) ; /* save r10 to stackframe */ \
std r4 ,G P R 1 1 ( r1 ) ; /* save r11 to stackframe */ \
std r12 ,G P R 1 2 ( r1 ) ; /* save r12 in stackframe */ \
std r5 ,G P R 1 3 ( r1 ) ; /* save it to stackframe */ \
mflr r10
mfctr r11
mfxer r12
std r10 ,_ L I N K ( r1 )
std r11 ,_ C T R ( r1 )
std r12 ,_ X E R ( r1 )
SAVE_ 1 0 G P R S ( 1 4 ,r1 )
SAVE_ 8 G P R S ( 2 4 ,r1 )
lhz r12 ,P A C A _ T R A P _ S A V E ( r13 )
std r12 ,_ T R A P ( r1 )
addi r11 ,r1 ,I N T _ F R A M E _ S I Z E
std r11 ,0 ( r1 )
li r12 ,0
std r12 ,0 ( r11 )
ld r2 ,P A C A T O C ( r13 )
1 : addi r3 ,r1 ,S T A C K _ F R A M E _ O V E R H E A D
2014-02-04 09:04:35 +04:00
bl k e r n e l _ b a d _ s t a c k
2009-07-24 03:15:59 +04:00
b 1 b
/ *
* Setup t h e i n i t i a l T L B f o r a c o r e . T h i s c u r r e n t i m p l e m e n t a t i o n
* assume t h a t w h a t e v e r w e a r e r u n n i n g o f f w i l l n o t c o n f l i c t w i t h
* the n e w m a p p i n g a t P A G E _ O F F S E T .
* /
_ GLOBAL( i n i t i a l _ t l b _ b o o k 3 e )
2009-08-18 23:08:33 +04:00
/* Look for the first TLB with IPROT set */
mfspr r4 ,S P R N _ T L B 0 C F G
andi. r3 ,r4 ,T L B n C F G _ I P R O T
lis r3 ,M A S 0 _ T L B S E L ( 0 ) @h
bne f o u n d _ i p r o t
mfspr r4 ,S P R N _ T L B 1 C F G
andi. r3 ,r4 ,T L B n C F G _ I P R O T
lis r3 ,M A S 0 _ T L B S E L ( 1 ) @h
bne f o u n d _ i p r o t
mfspr r4 ,S P R N _ T L B 2 C F G
andi. r3 ,r4 ,T L B n C F G _ I P R O T
lis r3 ,M A S 0 _ T L B S E L ( 2 ) @h
bne f o u n d _ i p r o t
lis r3 ,M A S 0 _ T L B S E L ( 3 ) @h
mfspr r4 ,S P R N _ T L B 3 C F G
/* fall through */
found_iprot :
andi. r5 ,r4 ,T L B n C F G _ H E S
bne h a v e _ h e s
mflr r8 / * s a v e L R * /
/ * 1 . Find t h e i n d e x o f t h e e n t r y w e ' r e e x e c u t i n g i n
*
* r3 = M A S 0 _ T L B S E L ( f o r t h e i p r o t a r r a y )
* r4 = S P R N _ T L B n C F G
* /
bl i n v s t r / * F i n d o u r a d d r e s s * /
invstr : mflr r6 / * M a k e i t a c c e s s i b l e * /
mfmsr r7
rlwinm r5 ,r7 ,2 7 ,3 1 ,3 1 / * e x t r a c t M S R [ I S ] * /
mfspr r7 ,S P R N _ P I D
slwi r7 ,r7 ,1 6
or r7 ,r7 ,r5
mtspr S P R N _ M A S 6 ,r7
tlbsx 0 ,r6 / * s e a r c h M S R [ I S ] , S P I D =PID * /
mfspr r3 ,S P R N _ M A S 0
rlwinm r5 ,r3 ,1 6 ,2 0 ,3 1 / * E x t r a c t M A S 0 ( E n t r y ) * /
mfspr r7 ,S P R N _ M A S 1 / * I n s u r e I P R O T s e t * /
oris r7 ,r7 ,M A S 1 _ I P R O T @h
mtspr S P R N _ M A S 1 ,r7
tlbwe
/ * 2 . Invalidate a l l e n t r i e s e x c e p t t h e e n t r y w e ' r e e x e c u t i n g i n
*
* r3 = M A S 0 w / T L B S E L & E S E L f o r t h e e n t r y w e a r e r u n n i n g i n
* r4 = S P R N _ T L B n C F G
* r5 = E S E L o f e n t r y w e a r e r u n n i n g i n
* /
andi. r4 ,r4 ,T L B n C F G _ N _ E N T R Y / * E x t r a c t # e n t r i e s * /
li r6 ,0 / * S e t E n t r y c o u n t e r t o 0 * /
1 : mr r7 ,r3 / * S e t M A S 0 ( T L B S E L ) * /
rlwimi r7 ,r6 ,1 6 ,4 ,1 5 / * S e t u p M A S 0 = T L B S E L | E S E L ( r6 ) * /
mtspr S P R N _ M A S 0 ,r7
tlbre
mfspr r7 ,S P R N _ M A S 1
rlwinm r7 ,r7 ,0 ,2 ,3 1 / * C l e a r M A S 1 V a l i d a n d I P R O T * /
cmpw r5 ,r6
beq s k p i n v / * D o n t u p d a t e t h e c u r r e n t e x e c u t i o n T L B * /
mtspr S P R N _ M A S 1 ,r7
tlbwe
isync
skpinv : addi r6 ,r6 ,1 / * I n c r e m e n t * /
cmpw r6 ,r4 / * A r e w e d o n e ? * /
bne 1 b / * I f n o t , r e p e a t * /
/* Invalidate all TLBs */
2012-06-25 17:33:25 +04:00
PPC_ T L B I L X _ A L L ( 0 ,R 0 )
2009-08-18 23:08:33 +04:00
sync
isync
/ * 3 . Setup a t e m p m a p p i n g a n d j u m p t o i t
*
* r3 = M A S 0 w / T L B S E L & E S E L f o r t h e e n t r y w e a r e r u n n i n g i n
* r5 = E S E L o f e n t r y w e a r e r u n n i n g i n
* /
andi. r7 ,r5 ,0 x1 / * F i n d a n e n t r y n o t u s e d a n d i s n o n - z e r o * /
addi r7 ,r7 ,0 x1
mr r4 ,r3 / * S e t M A S 0 ( T L B S E L ) = 1 * /
mtspr S P R N _ M A S 0 ,r4
tlbre
rlwimi r4 ,r7 ,1 6 ,4 ,1 5 / * S e t u p M A S 0 = T L B S E L | E S E L ( r7 ) * /
mtspr S P R N _ M A S 0 ,r4
mfspr r7 ,S P R N _ M A S 1
xori r6 ,r7 ,M A S 1 _ T S / * S e t u p T M P m a p p i n g i n t h e o t h e r A d d r e s s s p a c e * /
mtspr S P R N _ M A S 1 ,r6
tlbwe
mfmsr r6
xori r6 ,r6 ,M S R _ I S
mtspr S P R N _ S R R 1 ,r6
bl 1 f / * F i n d o u r a d d r e s s * /
1 : mflr r6
addi r6 ,r6 ,( 2 f - 1 b )
mtspr S P R N _ S R R 0 ,r6
rfi
2 :
/ * 4 . Clear o u t P I D s & S e a r c h i n f o
*
* r3 = M A S 0 w / T L B S E L & E S E L f o r t h e e n t r y w e s t a r t e d i n
* r4 = M A S 0 w / T L B S E L & E S E L f o r t h e t e m p m a p p i n g
* r5 = M A S 3
* /
li r6 ,0
mtspr S P R N _ M A S 6 ,r6
mtspr S P R N _ P I D ,r6
/ * 5 . Invalidate m a p p i n g w e s t a r t e d i n
*
* r3 = M A S 0 w / T L B S E L & E S E L f o r t h e e n t r y w e s t a r t e d i n
* r4 = M A S 0 w / T L B S E L & E S E L f o r t h e t e m p m a p p i n g
* r5 = M A S 3
* /
mtspr S P R N _ M A S 0 ,r3
tlbre
mfspr r6 ,S P R N _ M A S 1
2013-03-14 18:55:11 +04:00
rlwinm r6 ,r6 ,0 ,2 ,3 1 / * c l e a r I P R O T a n d V A L I D * /
2009-08-18 23:08:33 +04:00
mtspr S P R N _ M A S 1 ,r6
tlbwe
sync
isync
2015-07-18 22:24:58 +03:00
/ *
* The m a p p i n g o n l y n e e d s t o b e c a c h e - c o h e r e n t o n S M P , e x c e p t o n
* Freescale e 5 0 0 m c d e r i v a t i v e s w h e r e i t ' s a l s o n e e d e d f o r c o h e r e n t D M A .
* /
# if d e f i n e d ( C O N F I G _ S M P ) | | d e f i n e d ( C O N F I G _ P P C _ E 5 0 0 M C )
# define M _ I F _ N E E D E D M A S 2 _ M
2009-08-18 23:08:33 +04:00
# else
2015-07-18 22:24:58 +03:00
# define M _ I F _ N E E D E D 0
2009-08-18 23:08:33 +04:00
# endif
/ * 6 . Setup K E R N E L B A S E m a p p i n g i n T L B [ 0 ]
*
* r3 = M A S 0 w / T L B S E L & E S E L f o r t h e e n t r y w e s t a r t e d i n
* r4 = M A S 0 w / T L B S E L & E S E L f o r t h e t e m p m a p p i n g
* r5 = M A S 3
* /
rlwinm r3 ,r3 ,0 ,1 6 ,3 / * c l e a r E S E L * /
mtspr S P R N _ M A S 0 ,r3
lis r6 ,( M A S 1 _ V A L I D | M A S 1 _ I P R O T ) @h
ori r6 ,r6 ,( M A S 1 _ T S I Z E ( B O O K 3 E _ P A G E S Z _ 1 G B ) ) @l
mtspr S P R N _ M A S 1 ,r6
2015-07-18 22:24:58 +03:00
LOAD_ R E G _ I M M E D I A T E ( r6 , P A G E _ O F F S E T | M _ I F _ N E E D E D )
2009-08-18 23:08:33 +04:00
mtspr S P R N _ M A S 2 ,r6
rlwinm r5 ,r5 ,0 ,0 ,2 5
ori r5 ,r5 ,M A S 3 _ S R | M A S 3 _ S W | M A S 3 _ S X
mtspr S P R N _ M A S 3 ,r5
li r5 ,- 1
rlwinm r5 ,r5 ,0 ,0 ,2 5
tlbwe
/ * 7 . Jump t o K E R N E L B A S E m a p p i n g
*
* r4 = M A S 0 w / T L B S E L & E S E L f o r t h e t e m p m a p p i n g
* /
/* Now we branch the new virtual address mapped by this entry */
2015-10-07 06:48:15 +03:00
bl 1 f / * F i n d o u r a d d r e s s * /
1 : mflr r6
addi r6 ,r6 ,( 2 f - 1 b )
tovirt( r6 ,r6 )
2009-08-18 23:08:33 +04:00
lis r7 ,M S R _ K E R N E L @h
ori r7 ,r7 ,M S R _ K E R N E L @l
mtspr S P R N _ S R R 0 ,r6
mtspr S P R N _ S R R 1 ,r7
rfi / * s t a r t e x e c u t i o n o u t o f T L B 1 [ 0 ] e n t r y * /
2 :
/ * 8 . Clear o u t t h e t e m p m a p p i n g
*
* r4 = M A S 0 w / T L B S E L & E S E L f o r t h e e n t r y w e a r e r u n n i n g i n
* /
mtspr S P R N _ M A S 0 ,r4
tlbre
mfspr r5 ,S P R N _ M A S 1
2013-03-14 18:55:11 +04:00
rlwinm r5 ,r5 ,0 ,2 ,3 1 / * c l e a r I P R O T a n d V A L I D * /
2009-08-18 23:08:33 +04:00
mtspr S P R N _ M A S 1 ,r5
tlbwe
sync
isync
/* We translate LR and return */
tovirt( r8 ,r8 )
mtlr r8
blr
have_hes :
2009-07-24 03:15:59 +04:00
/ * Setup M A S 0 ,1 ,2 ,3 a n d 7 f o r t l b w e o f a 1 G e n t r y t h a t m a p s t h e
* kernel l i n e a r m a p p i n g . W e a l s o s e t M A S 8 o n c e f o r a l l h e r e t h o u g h
* that w i l l h a v e t o b e m a d e d e p e n d e n t o n w h e t h e r w e a r e r u n n i n g u n d e r
* a h y p e r v i s o r I s u p p o s e .
* /
2011-04-15 02:32:06 +04:00
/ * BEWARE, M A G I C
* This c o d e i s c a l l e d a s a n o r d i n a r y f u n c t i o n o n t h e b o o t C P U . B u t t o
* avoid d u p l i c a t i o n , t h i s c o d e i s a l s o u s e d i n S C O M b r i n g u p o f
* secondary C P U s . W e r e a d t h e c o d e b e t w e e n t h e i n i t i a l _ t l b _ c o d e _ s t a r t
* and i n i t i a l _ t l b _ c o d e _ e n d l a b e l s o n e i n s t r u c t i o n a t a t i m e a n d R A M i t
* into t h e n e w c o r e v i a S C O M . T h a t d o e s n ' t p r o c e s s b r a n c h e s , s o t h e r e
* must b e n o n e b e t w e e n t h o s e t w o l a b e l s . I t a l s o m e a n s i f t h i s c o d e
* ever t a k e s a n y p a r a m e t e r s , t h e S C O M c o d e m u s t a l s o b e u p d a t e d t o
* provide t h e m .
* /
.globl a2_tlbinit_code_start
a2_tlbinit_code_start :
2011-04-15 02:32:04 +04:00
ori r11 ,r3 ,M A S 0 _ W Q _ A L L W A Y S
oris r11 ,r11 ,M A S 0 _ E S E L ( 3 ) @h /* Use way 3: workaround A2 erratum 376 */
mtspr S P R N _ M A S 0 ,r11
2009-07-24 03:15:59 +04:00
lis r3 ,( M A S 1 _ V A L I D | M A S 1 _ I P R O T ) @h
ori r3 ,r3 ,B O O K 3 E _ P A G E S Z _ 1 G B < < M A S 1 _ T S I Z E _ S H I F T
mtspr S P R N _ M A S 1 ,r3
LOAD_ R E G _ I M M E D I A T E ( r3 , P A G E _ O F F S E T | M A S 2 _ M )
mtspr S P R N _ M A S 2 ,r3
li r3 ,M A S 3 _ S R | M A S 3 _ S W | M A S 3 _ S X
mtspr S P R N _ M A S 7 _ M A S 3 ,r3
li r3 ,0
mtspr S P R N _ M A S 8 ,r3
/* Write the TLB entry */
tlbwe
2011-04-15 02:32:06 +04:00
.globl a2_tlbinit_after_linear_map
a2_tlbinit_after_linear_map :
2009-07-24 03:15:59 +04:00
/* Now we branch the new virtual address mapped by this entry */
LOAD_ R E G _ I M M E D I A T E ( r3 ,1 f )
mtctr r3
bctr
1 : / * We a r e n o w r u n n i n g a t P A G E _ O F F S E T , c l e a n t h e T L B o f e v e r y t h i n g
2011-04-15 02:32:05 +04:00
* else ( i n c l u d i n g I P R O T e d t h i n g s l e f t b y f i r m w a r e )
* r4 = T L B n C F G
* r3 = c u r r e n t a d d r e s s ( m o r e o r l e s s )
2009-07-24 03:15:59 +04:00
* /
2011-04-15 02:32:05 +04:00
li r5 ,0
mtspr S P R N _ M A S 6 ,r5
tlbsx 0 ,r3
rlwinm r9 ,r4 ,0 ,T L B n C F G _ N _ E N T R Y
rlwinm r10 ,r4 ,8 ,0 x f f
addi r10 ,r10 ,- 1 / * G e t i n n e r l o o p m a s k * /
li r3 ,1
mfspr r5 ,S P R N _ M A S 1
rlwinm r5 ,r5 ,0 ,( ~ ( M A S 1 _ V A L I D | M A S 1 _ I P R O T ) )
mfspr r6 ,S P R N _ M A S 2
rldicr r6 ,r6 ,0 ,5 1 / * E x t r a c t E P N * /
mfspr r7 ,S P R N _ M A S 0
rlwinm r7 ,r7 ,0 ,0 x f f f f0 f f f / * C l e a r H E S a n d W Q * /
rlwinm r8 ,r7 ,1 6 ,0 x f f f / * E x t r a c t E S E L * /
2 : add r4 ,r3 ,r8
and r4 ,r4 ,r10
rlwimi r7 ,r4 ,1 6 ,M A S 0 _ E S E L _ M A S K
mtspr S P R N _ M A S 0 ,r7
mtspr S P R N _ M A S 1 ,r5
mtspr S P R N _ M A S 2 ,r6
tlbwe
addi r3 ,r3 ,1
and. r4 ,r3 ,r10
bne 3 f
addis r6 ,r6 ,( 1 < < 3 0 ) @h
3 :
cmpw r3 ,r9
blt 2 b
2011-04-15 02:32:06 +04:00
.globl a2_tlbinit_after_iprot_flush
a2_tlbinit_after_iprot_flush :
2012-06-25 17:33:25 +04:00
PPC_ T L B I L X ( 0 ,0 ,R 0 )
2009-07-24 03:15:59 +04:00
sync
isync
2011-04-15 02:32:06 +04:00
.globl a2_tlbinit_code_end
a2_tlbinit_code_end :
2009-07-24 03:15:59 +04:00
/* We translate LR and return */
mflr r3
tovirt( r3 ,r3 )
mtlr r3
blr
/ *
* Main e n t r y ( b o o t C P U , t h r e a d 0 )
*
* We e n t e r h e r e f r o m h e a d _ 6 4 . S , p o s s i b l y a f t e r t h e p r o m _ i n i t t r a m p o l i n e
* with r3 a n d r4 a l r e a d y s a v e d t o r31 a n d 3 0 r e s p e c t i v e l y a n d i n 6 4 b i t s
* mode. A n y t h i n g e l s e i s a s i t w a s l e f t b y t h e b o o t l o a d e r
*
* Initial r e q u i r e m e n t s o f t h i s p o r t :
*
* - Kernel l o a d e d a t 0 p h y s i c a l
* - A g o o d l u m p o f m e m o r y m a p p e d 0 : 0 b y U T L B e n t r y 0
* - MSR : IS & M S R : D S s e t t o 0
*
* Note t h a t s o m e o f t h e a b o v e r e q u i r e m e n t s w i l l b e r e l a x e d i n t h e f u t u r e
* as t h e k e r n e l b e c o m e s s m a r t e r a t d e a l i n g w i t h d i f f e r e n t i n i t i a l c o n d i t i o n s
* but f o r n o w y o u h a v e t o b e c a r e f u l
* /
_ GLOBAL( s t a r t _ i n i t i a l i z a t i o n _ b o o k 3 e )
mflr r28
/ * First, w e n e e d t o s e t u p s o m e i n i t i a l T L B s t o m a p t h e k e r n e l
* text, d a t a a n d b s s a t P A G E _ O F F S E T . W e d o n ' t h a v e a r e a l m o d e
* and a l w a y s u s e A S 0 , s o w e j u s t s e t i t u p t o m a t c h o u r l i n k
* address a n d n e v e r u s e 0 b a s e d a d d r e s s e s .
* /
2014-02-04 09:04:35 +04:00
bl i n i t i a l _ t l b _ b o o k 3 e
2009-07-24 03:15:59 +04:00
/* Init global core bits */
2014-02-04 09:04:35 +04:00
bl i n i t _ c o r e _ b o o k 3 e
2009-07-24 03:15:59 +04:00
/* Init per-thread bits */
2014-02-04 09:04:35 +04:00
bl i n i t _ t h r e a d _ b o o k 3 e
2009-07-24 03:15:59 +04:00
/* Return to common init code */
tovirt( r28 ,r28 )
mtlr r28
blr
/ *
* Secondary c o r e / p r o c e s s o r e n t r y
*
* This i s e n t e r e d f o r t h r e a d 0 o f a s e c o n d a r y c o r e , a l l o t h e r t h r e a d s
* are e x p e c t e d t o b e s t o p p e d . I t ' s s i m i l a r t o s t a r t _ i n i t i a l i z a t i o n _ b o o k 3 e
* except t h a t i t ' s g e n e r a l l y e n t e r e d f r o m t h e h o l d i n g l o o p i n h e a d _ 6 4 . S
* after C P U s h a v e b e e n g a t h e r e d b y O p e n F i r m w a r e .
*
* We a s s u m e w e a r e i n 3 2 b i t s m o d e r u n n i n g w i t h w h a t e v e r T L B e n t r y w a s
* set f o r u s b y t h e f i r m w a r e o r P O R e n g i n e .
* /
_ GLOBAL( b o o k 3 e _ s e c o n d a r y _ c o r e _ i n i t _ t l b _ s e t )
li r4 ,1
2014-02-04 09:04:35 +04:00
b g e n e r i c _ s e c o n d a r y _ s m p _ i n i t
2009-07-24 03:15:59 +04:00
_ GLOBAL( b o o k 3 e _ s e c o n d a r y _ c o r e _ i n i t )
mflr r28
/* Do we need to setup initial TLB entry ? */
cmplwi r4 ,0
bne 2 f
/* Setup TLB for this core */
2014-02-04 09:04:35 +04:00
bl i n i t i a l _ t l b _ b o o k 3 e
2009-07-24 03:15:59 +04:00
/ * We c a n r e t u r n f r o m t h e a b o v e r u n n i n g a t a d i f f e r e n t
* address, s o r e c a l c u l a t e r2 ( T O C )
* /
2014-02-04 09:04:35 +04:00
bl r e l a t i v e _ t o c
2009-07-24 03:15:59 +04:00
/* Init global core bits */
2014-02-04 09:04:35 +04:00
2 : bl i n i t _ c o r e _ b o o k 3 e
2009-07-24 03:15:59 +04:00
/* Init per-thread bits */
2014-02-04 09:04:35 +04:00
3 : bl i n i t _ t h r e a d _ b o o k 3 e
2009-07-24 03:15:59 +04:00
/ * Return t o c o m m o n i n i t c o d e a t p r o p e r v i r t u a l a d d r e s s .
*
* Due t o v a r i o u s p r e v i o u s a s s u m p t i o n s , w e k n o w w e e n t e r e d t h i s
* function a t e i t h e r t h e f i n a l P A G E _ O F F S E T m a p p i n g o r u s i n g a
* 1 : 1 mapping a t 0 , s o w e d o n ' t b o t h e r d o i n g a c o m p l i c a t e d c h e c k
* here, w e j u s t e n s u r e t h e r e t u r n a d d r e s s h a s t h e r i g h t t o p b i t s .
*
* Note t h a t i f w e e v e r w a n t t o b e s m a r t e r a b o u t w h e r e w e c a n b e
* started f r o m , w e h a v e t o b e c a r e f u l t h a t b y t h e t i m e w e r e a c h
* the c o d e b e l o w w e m a y a l r e a d y b e r u n n i n g a t a d i f f e r e n t l o c a t i o n
* than t h e o n e w e w e r e c a l l e d f r o m s i n c e i n i t i a l _ t l b _ b o o k 3 e c a n
* have m o v e d u s a l r e a d y .
* /
cmpdi c r0 ,r28 ,0
blt 1 f
lis r3 ,P A G E _ O F F S E T @highest
sldi r3 ,r3 ,3 2
or r28 ,r28 ,r3
1 : mtlr r28
blr
_ GLOBAL( b o o k 3 e _ s e c o n d a r y _ t h r e a d _ i n i t )
mflr r28
b 3 b
2015-10-07 06:48:15 +03:00
.globl init_core_book3e
2014-02-04 09:06:11 +04:00
init_core_book3e :
2009-07-24 03:15:59 +04:00
/* Establish the interrupt vector base */
2015-10-07 06:48:15 +03:00
tovirt( r2 ,r2 )
LOAD_ R E G _ A D D R ( r3 , i n t e r r u p t _ b a s e _ b o o k 3 e )
2009-07-24 03:15:59 +04:00
mtspr S P R N _ I V P R ,r3
sync
blr
2014-02-04 09:06:11 +04:00
init_thread_book3e :
2009-07-24 03:15:59 +04:00
lis r3 ,( S P R N _ E P C R _ I C M | S P R N _ E P C R _ G I C M ) @h
mtspr S P R N _ E P C R ,r3
/* Make sure interrupts are off */
wrteei 0
2009-08-18 23:08:31 +04:00
/* disable all timers and clear out status */
li r3 ,0
2009-07-24 03:15:59 +04:00
mtspr S P R N _ T C R ,r3
2009-08-18 23:08:31 +04:00
mfspr r3 ,S P R N _ T S R
mtspr S P R N _ T S R ,r3
2009-07-24 03:15:59 +04:00
blr
2009-08-18 23:08:32 +04:00
_ GLOBAL( _ _ s e t u p _ b a s e _ i v o r s )
SET_ I V O R ( 0 , 0 x02 0 ) / * C r i t i c a l I n p u t * /
SET_ I V O R ( 1 , 0 x00 0 ) / * M a c h i n e C h e c k * /
SET_ I V O R ( 2 , 0 x06 0 ) / * D a t a S t o r a g e * /
SET_ I V O R ( 3 , 0 x08 0 ) / * I n s t r u c t i o n S t o r a g e * /
SET_ I V O R ( 4 , 0 x0 a0 ) / * E x t e r n a l I n p u t * /
SET_ I V O R ( 5 , 0 x0 c0 ) / * A l i g n m e n t * /
SET_ I V O R ( 6 , 0 x0 e 0 ) / * P r o g r a m * /
SET_ I V O R ( 7 , 0 x10 0 ) / * F P U n a v a i l a b l e * /
SET_ I V O R ( 8 , 0 x12 0 ) / * S y s t e m C a l l * /
SET_ I V O R ( 9 , 0 x14 0 ) / * A u x i l i a r y P r o c e s s o r U n a v a i l a b l e * /
SET_ I V O R ( 1 0 , 0 x16 0 ) / * D e c r e m e n t e r * /
SET_ I V O R ( 1 1 , 0 x18 0 ) / * F i x e d I n t e r v a l T i m e r * /
SET_ I V O R ( 1 2 , 0 x1 a0 ) / * W a t c h d o g T i m e r * /
SET_ I V O R ( 1 3 , 0 x1 c0 ) / * D a t a T L B E r r o r * /
SET_ I V O R ( 1 4 , 0 x1 e 0 ) / * I n s t r u c t i o n T L B E r r o r * /
SET_ I V O R ( 1 5 , 0 x04 0 ) / * D e b u g * /
2009-07-24 03:15:59 +04:00
2009-08-18 23:08:32 +04:00
sync
2009-07-24 03:15:59 +04:00
2009-08-18 23:08:32 +04:00
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2011-05-10 01:26:00 +04:00
2012-09-08 00:57:17 +04:00
_ GLOBAL( s e t u p _ a l t i v e c _ i v o r s )
SET_ I V O R ( 3 2 , 0 x20 0 ) / * A l t i V e c U n a v a i l a b l e * /
SET_ I V O R ( 3 3 , 0 x22 0 ) / * A l t i V e c A s s i s t * /
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2011-05-10 01:26:00 +04:00
_ GLOBAL( s e t u p _ p e r f m o n _ i v o r )
SET_ I V O R ( 3 5 , 0 x26 0 ) / * P e r f o r m a n c e M o n i t o r * /
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_ GLOBAL( s e t u p _ d o o r b e l l _ i v o r s )
SET_ I V O R ( 3 6 , 0 x28 0 ) / * P r o c e s s o r D o o r b e l l * /
SET_ I V O R ( 3 7 , 0 x2 a0 ) / * P r o c e s s o r D o o r b e l l C r i t * /
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_ GLOBAL( s e t u p _ e h v _ i v o r s )
SET_ I V O R ( 4 0 , 0 x30 0 ) / * E m b e d d e d H y p e r v i s o r S y s t e m C a l l * /
SET_ I V O R ( 4 1 , 0 x32 0 ) / * E m b e d d e d H y p e r v i s o r P r i v i l e g e * /
2012-07-09 17:01:51 +04:00
SET_ I V O R ( 3 8 , 0 x2 c0 ) / * G u e s t P r o c e s s o r D o o r b e l l * /
SET_ I V O R ( 3 9 , 0 x2 e 0 ) / * G u e s t P r o c e s s o r D o o r b e l l C r i t / M C * /
2011-05-10 01:26:00 +04:00
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2013-08-08 16:56:09 +04:00
_ GLOBAL( s e t u p _ l r a t _ i v o r )
SET_ I V O R ( 4 2 , 0 x34 0 ) / * L R A T E r r o r * /
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