2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/enable_source
2015-05-13 19:34:09 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Enable/disable tracing on this specific trace entiry.
Enabling a source implies the source has been configured
properly and a sink has been identidifed for it. The path
of coresight components linking the source to the sink is
configured and managed automatically by the coresight framework.
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What: /sys/bus/coresight/devices/etm<N>/cpu
2015-05-13 19:34:09 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) The CPU this tracing entity is associated with.
2015-05-13 19:34:10 +03:00
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What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of PE comparator inputs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of address comparator pairs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_cntr
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of counters that are available for
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tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates how many external inputs are implemented.
2015-05-13 19:34:10 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/numcidc
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of Context ID comparators that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/numvmidc
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of VMID comparators that are available
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for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nrseqstate
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of sequencer states that are
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implemented.
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What: /sys/bus/coresight/devices/etm<N>/nr_resource
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of resource selection pairs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_ss_cmp
2015-05-13 19:34:10 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Indicates the number of single-shot comparator controls that
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are available for tracing.
2015-05-13 19:34:11 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/reset
2015-05-13 19:34:11 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Write) Cancels all configuration on a trace unit and set it back
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to its boot configuration.
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What: /sys/bus/coresight/devices/etm<N>/mode
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Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls various modes supported by this ETM, for example
P0 instruction tracing, branch broadcast, cycle counting and
context ID tracing.
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What: /sys/bus/coresight/devices/etm<N>/pe
2015-05-13 19:34:11 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls which PE to trace.
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What: /sys/bus/coresight/devices/etm<N>/event
2015-05-13 19:34:11 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls the tracing of arbitrary events from bank 0 to 3.
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What: /sys/bus/coresight/devices/etm<N>/event_instren
2015-05-13 19:34:11 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls the behavior of the events in bank 0 to 3.
2015-05-13 19:34:12 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/event_ts
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Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls the insertion of global timestamps in the trace
streams.
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What: /sys/bus/coresight/devices/etm<N>/syncfreq
2015-05-13 19:34:12 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls how often trace synchronization requests occur.
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What: /sys/bus/coresight/devices/etm<N>/cyc_threshold
2015-05-13 19:34:12 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Sets the threshold value for cycle counting.
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What: /sys/bus/coresight/devices/etm<N>/bb_ctrl
2015-05-13 19:34:12 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls which regions in the memory map are enabled to
use branch broadcasting.
2015-05-13 19:34:13 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/event_vinst
2015-05-13 19:34:13 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls instruction trace filtering.
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What: /sys/bus/coresight/devices/etm<N>/s_exlevel_vinst
2015-05-13 19:34:13 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) In Secure state, each bit controls whether instruction
tracing is enabled for the corresponding exception level.
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What: /sys/bus/coresight/devices/etm<N>/ns_exlevel_vinst
2015-05-13 19:34:13 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) In non-secure state, each bit controls whether instruction
tracing is enabled for the corresponding exception level.
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2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/addr_idx
2015-05-13 19:34:14 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select which address comparator or pair (of comparators) to
work with.
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What: /sys/bus/coresight/devices/etm<N>/addr_instdatatype
2015-05-13 19:34:14 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls what type of comparison the trace unit performs.
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What: /sys/bus/coresight/devices/etm<N>/addr_single
2015-05-13 19:34:14 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Used to setup single address comparator values.
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What: /sys/bus/coresight/devices/etm<N>/addr_range
2015-05-13 19:34:14 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Used to setup address range comparator values.
2015-05-13 19:34:15 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/seq_idx
2015-05-13 19:34:15 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select which sequensor.
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What: /sys/bus/coresight/devices/etm<N>/seq_state
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Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Use this to set, or read, the sequencer state.
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What: /sys/bus/coresight/devices/etm<N>/seq_event
2015-05-13 19:34:15 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Moves the sequencer state to a specific state.
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What: /sys/bus/coresight/devices/etm<N>/seq_reset_event
2015-05-13 19:34:15 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Moves the sequencer to state 0 when a programmed event
occurs.
2015-05-13 19:34:16 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/cntr_idx
2015-05-13 19:34:16 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select which counter unit to work with.
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What: /sys/bus/coresight/devices/etm<N>/cntrldvr
2015-05-13 19:34:16 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) This sets or returns the reload count value of the
specific counter.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/cntr_val
2015-05-13 19:34:16 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) This sets or returns the current count value of the
specific counter.
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What: /sys/bus/coresight/devices/etm<N>/cntr_ctrl
2015-05-13 19:34:16 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls the operation of the selected counter.
2015-05-13 19:34:17 +03:00
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What: /sys/bus/coresight/devices/etm<N>/res_idx
2015-05-13 19:34:17 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select which resource selection unit to work with.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/res_ctrl
2015-05-13 19:34:17 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Controls the selection of the resources in the trace unit.
2015-05-13 19:34:18 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/ctxid_idx
2015-05-13 19:34:18 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select which context ID comparator to work with.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/ctxid_pid
2015-05-13 19:34:18 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Get/Set the context ID comparator value to trigger on.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/ctxid_masks
2015-05-13 19:34:18 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Mask for all 8 context ID comparator value
registers (if implemented).
2015-05-13 19:34:19 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/vmid_idx
2015-05-13 19:34:19 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select which virtual machine ID comparator to work with.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/vmid_val
2015-05-13 19:34:19 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Get/Set the virtual machine ID comparator value to
trigger on.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/vmid_masks
2015-05-13 19:34:19 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Mask for all 8 virtual machine ID comparator value
registers (if implemented).
2015-05-13 19:34:20 +03:00
2019-10-31 20:58:32 +03:00
What: /sys/bus/coresight/devices/etm<N>/addr_exlevel_s_ns
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Set the Exception Level matching bits for secure and
non-secure exception levels.
What: /sys/bus/coresight/devices/etm<N>/vinst_pe_cmp_start_stop
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Access the start stop control register for PE input
comparators.
What: /sys/bus/coresight/devices/etm<N>/addr_cmp_view
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the current settings for the selected address
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comparator.
What: /sys/bus/coresight/devices/etm<N>/sshot_idx
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Select the single shot control register to access.
What: /sys/bus/coresight/devices/etm<N>/sshot_ctrl
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Access the selected single shot control register.
What: /sys/bus/coresight/devices/etm<N>/sshot_status
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the current value of the selected single shot
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status register.
What: /sys/bus/coresight/devices/etm<N>/sshot_pe_ctrl
Date: December 2019
KernelVersion: 5.5
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Access the selected single show PE comparator control
register.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the OS Lock Status Register (0x304).
2015-05-13 19:34:20 +03:00
The value it taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdcr
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Power Down Control Register
2015-05-13 19:34:20 +03:00
(0x310). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdsr
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Power Down Status Register
2015-05-13 19:34:20 +03:00
(0x314). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trclsr
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the SW Lock Status Register
2015-05-13 19:34:20 +03:00
(0xFB4). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcauthstatus
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Authentication Status Register
2015-05-13 19:34:20 +03:00
(0xFB8). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevid
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Device ID Register
2015-05-13 19:34:20 +03:00
(0xFC8). The value is taken directly from the HW.
2021-02-01 21:13:42 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevarch
Date: January 2021
KernelVersion: 5.12
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (Read) Print the content of the Device Architecture Register
(offset 0xFBC). The value is taken directly read
from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Device Type Register
2015-05-13 19:34:20 +03:00
(0xFCC). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr0
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Peripheral ID0 Register
2015-05-13 19:34:20 +03:00
(0xFE0). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr1
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Peripheral ID1 Register
2015-05-13 19:34:20 +03:00
(0xFE4). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr2
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Peripheral ID2 Register
2015-05-13 19:34:20 +03:00
(0xFE8). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr3
2015-05-13 19:34:20 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the Peripheral ID3 Register
2015-05-13 19:34:20 +03:00
(0xFEC). The value is taken directly from the HW.
2015-05-13 19:34:21 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcconfig
2016-04-05 20:53:43 +03:00
Date: February 2016
KernelVersion: 4.07
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the trace configuration register
2016-04-05 20:53:43 +03:00
(0x010) as currently set by SW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/mgmt/trctraceid
2016-04-05 20:53:43 +03:00
Date: February 2016
KernelVersion: 4.07
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Print the content of the trace ID register (0x040).
2016-04-05 20:53:43 +03:00
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr0
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the tracing capabilities of the trace unit (0x1E0).
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The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr1
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the tracing capabilities of the trace unit (0x1E4).
2015-05-13 19:34:21 +03:00
The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr2
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the maximum size of the data value, data address,
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VMID, context ID and instuction address in the trace unit
(0x1E8). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr3
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the value associated with various resources
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available to the trace unit. See the Trace Macrocell
architecture specification for more details (0x1E8).
The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr4
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns how many resources the trace unit supports (0x1F0).
2015-05-13 19:34:21 +03:00
The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr5
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns how many resources the trace unit supports (0x1F4).
2015-05-13 19:34:21 +03:00
The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr8
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the maximum speculation depth of the instruction
2015-05-13 19:34:21 +03:00
trace stream. (0x180). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr9
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the number of P0 right-hand keys that the trace unit
2015-05-13 19:34:21 +03:00
can use (0x184). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr10
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the number of P1 right-hand keys that the trace unit
2015-05-13 19:34:21 +03:00
can use (0x188). The value is taken directly from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr11
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the number of special P1 right-hand keys that the
2015-05-13 19:34:21 +03:00
trace unit can use (0x18C). The value is taken directly from
the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr12
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the number of conditional P1 right-hand keys that
2015-05-13 19:34:21 +03:00
the trace unit can use (0x190). The value is taken directly
from the HW.
2019-10-31 20:58:31 +03:00
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr13
2015-05-13 19:34:21 +03:00
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
2020-10-30 10:40:51 +03:00
Description: (Read) Returns the number of special conditional P1 right-hand keys
2015-05-13 19:34:21 +03:00
that the trace unit can use (0x194). The value is taken
directly from the HW.