2013-06-19 00:29:34 +09:00
* Samsung Exynos5420 Clock Controller
The Exynos5420 clock controller generates and supplies clock to various
2014-05-19 22:15:08 +09:00
controllers within the Exynos5420 SoC and for the Exynos5800 SoC.
2013-06-19 00:29:34 +09:00
Required Properties:
2013-11-18 12:46:12 +01:00
- compatible: should be one of the following.
2013-06-19 00:29:34 +09:00
- "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC.
2014-05-19 22:15:08 +09:00
- "samsung,exynos5800-clock" - controller compatible with Exynos5800 SoC.
2013-06-19 00:29:34 +09:00
- reg: physical base address of the controller and length of memory mapped
region.
- #clock-cells: should be 1.
2014-02-26 09:53:30 +09:00
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume.
2013-06-19 00:29:34 +09:00
2014-02-26 09:53:30 +09:00
All available clocks are defined as preprocessor macros in
dt-bindings/clock/exynos5420.h header and can be used in device
tree sources.
2013-08-29 11:07:09 +05:30
2013-06-19 00:29:34 +09:00
Example 1: An example of a clock controller node is listed below.
2017-11-29 21:55:15 +01:00
clock: clock-controller@10010000 {
2013-06-19 00:29:34 +09:00
compatible = "samsung,exynos5420-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
};
Example 2: UART controller node that consumes the clock generated by the clock
controller. Refer to the standard clock bindings for information
about 'clocks' and 'clock-names' property.
serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
interrupts = <0 54 0>;
2014-02-26 09:53:30 +09:00
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
2013-06-19 00:29:34 +09:00
clock-names = "uart", "clk_uart_baud0";
};