36 lines
1.3 KiB
Plaintext
36 lines
1.3 KiB
Plaintext
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NVIDIA Tegra210 Boot and Power Management Processor (BPMP)
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The Boot and Power Management Processor (BPMP) is a co-processor found
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in Tegra210 SoC. It is designed to handle the early stages of the boot
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process as well as to assisting in entering deep low power state
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(suspend to ram), and also offloading DRAM memory clock scaling on
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some platforms. The binding document defines the resources that would
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be used by the BPMP T210 firmware driver, which can create the
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interprocessor communication (IPC) between the CPU and BPMP.
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Required properties:
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- compatible
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Array of strings
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One of:
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- "nvidia,tegra210-bpmp"
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- reg: physical base address and length for HW synchornization primitives
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1) base address and length to Tegra 'atomics' hardware
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2) base address and length to Tegra 'semaphore' hardware
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- interrupts: specifies the interrupt number for receiving messages ("rx")
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and for triggering messages ("tx")
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Optional properties:
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- #clock-cells : Should be 1 for platforms where DRAM clock control is
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offloaded to bpmp.
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Example:
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bpmp@70016000 {
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compatible = "nvidia,tegra210-bpmp";
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reg = <0x0 0x70016000 0x0 0x2000
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0x0 0x60001000 0x0 0x1000>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "tx", "rx";
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};
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