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/*
* SAMSUNG EXYNOS5440 SoC device tree source
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "samsung,exynos5440";
interrupt-parent = <&gic>;
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clock: clock-controller@0x160000 {
compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x1000>;
#clock-cells = <1>;
};
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gic:interrupt-controller@2E0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
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reg = <0x2E1000 0x1000>,
<0x2E2000 0x1000>,
<0x2E4000 0x2000>,
<0x2E6000 0x2000>;
interrupts = <1 9 0xf04>;
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};
cpus {
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#address-cells = <1>;
#size-cells = <0>;
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cpu@0 {
compatible = "arm,cortex-a15";
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reg = <0>;
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};
cpu@1 {
compatible = "arm,cortex-a15";
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reg = <1>;
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};
cpu@2 {
compatible = "arm,cortex-a15";
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reg = <2>;
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};
cpu@3 {
compatible = "arm,cortex-a15";
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reg = <3>;
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};
};
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timer {
compatible = "arm,cortex-a15-timer",
"arm,armv7-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
clock-frequency = <50000000>;
};
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serial@B0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <0 2 0>;
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clocks = <&clock 21>, <&clock 21>;
clock-names = "uart", "clk_uart_baud0";
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};
serial@C0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <0 3 0>;
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clocks = <&clock 21>, <&clock 21>;
clock-names = "uart", "clk_uart_baud0";
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};
spi {
compatible = "samsung,exynos4210-spi";
reg = <0xD0000 0x1000>;
interrupts = <0 4 0>;
tx-dma-channel = <&pdma0 5>; /* preliminary */
rx-dma-channel = <&pdma0 4>; /* preliminary */
#address-cells = <1>;
#size-cells = <0>;
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clocks = <&clock 21>, <&clock 16>;
clock-names = "spi", "spi_busclk0";
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};
pinctrl {
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compatible = "samsung,exynos5440-pinctrl";
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reg = <0xE0000 0x1000>;
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interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
<0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
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interrupt-controller;
#interrupt-cells = <2>;
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#gpio-cells = <2>;
fan: fan {
samsung,exynos5440-pin-function = <1>;
};
hdd_led0: hdd_led0 {
samsung,exynos5440-pin-function = <2>;
};
hdd_led1: hdd_led1 {
samsung,exynos5440-pin-function = <3>;
};
uart1: uart1 {
samsung,exynos5440-pin-function = <4>;
};
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};
i2c@F0000 {
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compatible = "samsung,exynos5440-i2c";
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reg = <0xF0000 0x1000>;
interrupts = <0 5 0>;
#address-cells = <1>;
#size-cells = <0>;
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clocks = <&clock 21>;
clock-names = "i2c";
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};
i2c@100000 {
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compatible = "samsung,exynos5440-i2c";
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reg = <0x100000 0x1000>;
interrupts = <0 6 0>;
#address-cells = <1>;
#size-cells = <0>;
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clocks = <&clock 21>;
clock-names = "i2c";
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};
watchdog {
compatible = "samsung,s3c2410-wdt";
reg = <0x110000 0x1000>;
interrupts = <0 1 0>;
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clocks = <&clock 21>;
clock-names = "watchdog";
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};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus";
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@121A0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x120000 0x1000>;
interrupts = <0 34 0>;
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clocks = <&clock 21>;
clock-names = "apb_pclk";
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#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
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};
pdma1: pdma@121B0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121000 0x1000>;
interrupts = <0 35 0>;
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clocks = <&clock 21>;
clock-names = "apb_pclk";
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#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
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};
};
rtc {
compatible = "samsung,s3c6410-rtc";
reg = <0x130000 0x1000>;
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interrupts = <0 17 0>, <0 16 0>;
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clocks = <&clock 21>;
clock-names = "rtc";
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};
};