2010-04-01 12:30:19 +01:00
/*
* arch / arm / mach - spear3xx / include / mach / spear . h
*
* SPEAr3xx Machine family specific definition
*
* Copyright ( C ) 2009 ST Microelectronics
2012-06-20 12:53:02 -07:00
* Viresh Kumar < viresh . linux @ gmail . com >
2010-04-01 12:30:19 +01:00
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed " as is " without any
* warranty of any kind , whether express or implied .
*/
# ifndef __MACH_SPEAR3XX_H
# define __MACH_SPEAR3XX_H
2011-03-07 05:57:08 +01:00
# include <asm/memory.h>
2010-04-01 12:30:19 +01:00
/* ICM1 - Low speed connection */
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
2012-03-23 00:17:43 +05:30
# define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000)
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
2012-03-23 00:17:43 +05:30
# define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
2010-04-01 12:30:19 +01:00
/* ML1 - Multi Layer CPU Subsystem */
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
2012-04-11 17:30:11 +00:00
# define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
2010-04-01 12:30:19 +01:00
/* ICM3 - Basic Subsystem */
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
2012-03-23 00:17:43 +05:30
# define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
# define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
2012-03-23 00:17:43 +05:30
# define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
2011-03-07 05:57:08 +01:00
# define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
2012-03-23 00:17:43 +05:30
# define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
2010-04-01 12:30:19 +01:00
/* Debug uart for linux, will be used for debug and uncompress messages */
# define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
# define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
/* Sysctl base for spear platform */
# define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
# define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
2012-04-10 09:02:35 +05:30
/* SPEAr320 Macros */
# define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
# define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000)
# define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
# define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
# define SPEAR320_UARTX_PCLK_MASK 0x1
# define SPEAR320_UART2_PCLK_SHIFT 8
# define SPEAR320_UART3_PCLK_SHIFT 9
# define SPEAR320_UART4_PCLK_SHIFT 10
# define SPEAR320_UART5_PCLK_SHIFT 11
# define SPEAR320_UART6_PCLK_SHIFT 12
# define SPEAR320_RS485_PCLK_SHIFT 13
2010-04-01 12:30:19 +01:00
# endif /* __MACH_SPEAR3XX_H */