2019-06-04 10:11:33 +02:00
// SPDX-License-Identifier: GPL-2.0-only
2017-06-12 11:01:45 -06:00
/*
* es8316 . c - - es8316 ALSA SoC audio driver
* Copyright Everest Semiconductor Co . , Ltd
*
* Authors : David Yang < yangxiaohua @ everest - semi . com > ,
* Daniel Drake < drake @ endlessm . com >
*/
# include <linux/module.h>
# include <linux/acpi.h>
2019-09-04 01:53:20 +09:00
# include <linux/clk.h>
2017-06-12 11:01:45 -06:00
# include <linux/delay.h>
# include <linux/i2c.h>
# include <linux/mod_devicetable.h>
2019-01-03 14:45:26 +01:00
# include <linux/mutex.h>
2017-06-12 11:01:45 -06:00
# include <linux/regmap.h>
# include <sound/pcm.h>
# include <sound/pcm_params.h>
# include <sound/soc.h>
# include <sound/soc-dapm.h>
# include <sound/tlv.h>
2019-01-03 14:45:26 +01:00
# include <sound/jack.h>
2017-06-12 11:01:45 -06:00
# include "es8316.h"
/* In slave mode at single speed, the codec is documented as accepting 5
* MCLK / LRCK ratios , but we also add ratio 400 , which is commonly used on
* Intel Cherry Trail platforms ( 19.2 MHz MCLK , 48 kHz LRCK ) .
*/
static const unsigned int supported_mclk_lrck_ratios [ ] = {
2023-06-29 13:24:42 +02:00
256 , 384 , 400 , 500 , 512 , 768 , 1024
2017-06-12 11:01:45 -06:00
} ;
struct es8316_priv {
2019-01-03 14:45:26 +01:00
struct mutex lock ;
2019-09-04 01:53:20 +09:00
struct clk * mclk ;
2019-01-03 14:45:26 +01:00
struct regmap * regmap ;
struct snd_soc_component * component ;
struct snd_soc_jack * jack ;
int irq ;
2017-06-12 11:01:45 -06:00
unsigned int sysclk ;
2023-08-30 01:01:13 +03:00
unsigned int allowed_rates [ ARRAY_SIZE ( supported_mclk_lrck_ratios ) ] ;
2017-06-12 11:01:45 -06:00
struct snd_pcm_hw_constraint_list sysclk_constraints ;
2019-03-29 22:50:43 +01:00
bool jd_inverted ;
2017-06-12 11:01:45 -06:00
} ;
/*
* ES8316 controls
*/
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE ( dac_vol_tlv , - 9600 , 50 , 1 ) ;
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE ( adc_vol_tlv , - 9600 , 50 , 1 ) ;
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE ( alc_max_gain_tlv , - 650 , 150 , 0 ) ;
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE ( alc_min_gain_tlv , - 1200 , 150 , 0 ) ;
2023-05-30 21:11:38 +03:00
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE ( alc_target_tlv ,
0 , 10 , TLV_DB_SCALE_ITEM ( - 1650 , 150 , 0 ) ,
11 , 11 , TLV_DB_SCALE_ITEM ( - 150 , 0 , 0 ) ,
) ;
2019-08-27 00:38:59 +09:00
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE ( hpmixer_gain_tlv ,
0 , 4 , TLV_DB_SCALE_ITEM ( - 1200 , 150 , 0 ) ,
8 , 11 , TLV_DB_SCALE_ITEM ( - 450 , 150 , 0 ) ,
) ;
2017-06-12 11:01:45 -06:00
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE ( adc_pga_gain_tlv ,
0 , 0 , TLV_DB_SCALE_ITEM ( - 350 , 0 , 0 ) ,
1 , 1 , TLV_DB_SCALE_ITEM ( 0 , 0 , 0 ) ,
2 , 2 , TLV_DB_SCALE_ITEM ( 250 , 0 , 0 ) ,
3 , 3 , TLV_DB_SCALE_ITEM ( 450 , 0 , 0 ) ,
2021-02-28 17:04:41 +01:00
4 , 7 , TLV_DB_SCALE_ITEM ( 700 , 300 , 0 ) ,
8 , 10 , TLV_DB_SCALE_ITEM ( 1800 , 300 , 0 ) ,
2017-06-12 11:01:45 -06:00
) ;
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE ( hpout_vol_tlv ,
0 , 0 , TLV_DB_SCALE_ITEM ( - 4800 , 0 , 0 ) ,
1 , 3 , TLV_DB_SCALE_ITEM ( - 2400 , 1200 , 0 ) ,
) ;
static const char * const ng_type_txt [ ] =
{ " Constant PGA Gain " , " Mute ADC Output " } ;
static const struct soc_enum ng_type =
SOC_ENUM_SINGLE ( ES8316_ADC_ALC_NG , 6 , 2 , ng_type_txt ) ;
static const char * const adcpol_txt [ ] = { " Normal " , " Invert " } ;
static const struct soc_enum adcpol =
SOC_ENUM_SINGLE ( ES8316_ADC_MUTE , 1 , 2 , adcpol_txt ) ;
static const char * const dacpol_txt [ ] =
{ " Normal " , " R Invert " , " L Invert " , " L + R Invert " } ;
static const struct soc_enum dacpol =
SOC_ENUM_SINGLE ( ES8316_DAC_SET1 , 0 , 4 , dacpol_txt ) ;
static const struct snd_kcontrol_new es8316_snd_controls [ ] = {
SOC_DOUBLE_TLV ( " Headphone Playback Volume " , ES8316_CPHP_ICAL_VOL ,
4 , 0 , 3 , 1 , hpout_vol_tlv ) ,
SOC_DOUBLE_TLV ( " Headphone Mixer Volume " , ES8316_HPMIX_VOL ,
2019-08-27 00:39:00 +09:00
4 , 0 , 11 , 0 , hpmixer_gain_tlv ) ,
2017-06-12 11:01:45 -06:00
SOC_ENUM ( " Playback Polarity " , dacpol ) ,
SOC_DOUBLE_R_TLV ( " DAC Playback Volume " , ES8316_DAC_VOLL ,
ES8316_DAC_VOLR , 0 , 0xc0 , 1 , dac_vol_tlv ) ,
SOC_SINGLE ( " DAC Soft Ramp Switch " , ES8316_DAC_SET1 , 4 , 1 , 1 ) ,
SOC_SINGLE ( " DAC Soft Ramp Rate " , ES8316_DAC_SET1 , 2 , 4 , 0 ) ,
SOC_SINGLE ( " DAC Notch Filter Switch " , ES8316_DAC_SET2 , 6 , 1 , 0 ) ,
SOC_SINGLE ( " DAC Double Fs Switch " , ES8316_DAC_SET2 , 7 , 1 , 0 ) ,
SOC_SINGLE ( " DAC Stereo Enhancement " , ES8316_DAC_SET3 , 0 , 7 , 0 ) ,
2019-01-03 14:45:27 +01:00
SOC_SINGLE ( " DAC Mono Mix Switch " , ES8316_DAC_SET3 , 3 , 1 , 0 ) ,
2017-06-12 11:01:45 -06:00
SOC_ENUM ( " Capture Polarity " , adcpol ) ,
SOC_SINGLE ( " Mic Boost Switch " , ES8316_ADC_D2SEPGA , 0 , 1 , 0 ) ,
SOC_SINGLE_TLV ( " ADC Capture Volume " , ES8316_ADC_VOLUME ,
0 , 0xc0 , 1 , adc_vol_tlv ) ,
SOC_SINGLE_TLV ( " ADC PGA Gain Volume " , ES8316_ADC_PGAGAIN ,
4 , 10 , 0 , adc_pga_gain_tlv ) ,
SOC_SINGLE ( " ADC Soft Ramp Switch " , ES8316_ADC_MUTE , 4 , 1 , 0 ) ,
SOC_SINGLE ( " ADC Double Fs Switch " , ES8316_ADC_DMIC , 4 , 1 , 0 ) ,
SOC_SINGLE ( " ALC Capture Switch " , ES8316_ADC_ALC1 , 6 , 1 , 0 ) ,
SOC_SINGLE_TLV ( " ALC Capture Max Volume " , ES8316_ADC_ALC1 , 0 , 28 , 0 ,
alc_max_gain_tlv ) ,
SOC_SINGLE_TLV ( " ALC Capture Min Volume " , ES8316_ADC_ALC2 , 0 , 28 , 0 ,
alc_min_gain_tlv ) ,
2023-05-30 21:11:38 +03:00
SOC_SINGLE_TLV ( " ALC Capture Target Volume " , ES8316_ADC_ALC3 , 4 , 11 , 0 ,
2017-06-12 11:01:45 -06:00
alc_target_tlv ) ,
SOC_SINGLE ( " ALC Capture Hold Time " , ES8316_ADC_ALC3 , 0 , 10 , 0 ) ,
SOC_SINGLE ( " ALC Capture Decay Time " , ES8316_ADC_ALC4 , 4 , 10 , 0 ) ,
SOC_SINGLE ( " ALC Capture Attack Time " , ES8316_ADC_ALC4 , 0 , 10 , 0 ) ,
SOC_SINGLE ( " ALC Capture Noise Gate Switch " , ES8316_ADC_ALC_NG ,
5 , 1 , 0 ) ,
SOC_SINGLE ( " ALC Capture Noise Gate Threshold " , ES8316_ADC_ALC_NG ,
0 , 31 , 0 ) ,
SOC_ENUM ( " ALC Capture Noise Gate Type " , ng_type ) ,
} ;
/* Analog Input Mux */
static const char * const es8316_analog_in_txt [ ] = {
" lin1-rin1 " ,
" lin2-rin2 " ,
" lin1-rin1 with 20db Boost " ,
" lin2-rin2 with 20db Boost "
} ;
static const unsigned int es8316_analog_in_values [ ] = { 0 , 1 , 2 , 3 } ;
static const struct soc_enum es8316_analog_input_enum =
SOC_VALUE_ENUM_SINGLE ( ES8316_ADC_PDN_LINSEL , 4 , 3 ,
ARRAY_SIZE ( es8316_analog_in_txt ) ,
es8316_analog_in_txt ,
es8316_analog_in_values ) ;
static const struct snd_kcontrol_new es8316_analog_in_mux_controls =
SOC_DAPM_ENUM ( " Route " , es8316_analog_input_enum ) ;
static const char * const es8316_dmic_txt [ ] = {
" dmic disable " ,
" dmic data at high level " ,
" dmic data at low level " ,
} ;
2023-07-19 13:47:22 +08:00
static const unsigned int es8316_dmic_values [ ] = { 0 , 2 , 3 } ;
2017-06-12 11:01:45 -06:00
static const struct soc_enum es8316_dmic_src_enum =
SOC_VALUE_ENUM_SINGLE ( ES8316_ADC_DMIC , 0 , 3 ,
ARRAY_SIZE ( es8316_dmic_txt ) ,
es8316_dmic_txt ,
es8316_dmic_values ) ;
static const struct snd_kcontrol_new es8316_dmic_src_controls =
SOC_DAPM_ENUM ( " Route " , es8316_dmic_src_enum ) ;
/* hp mixer mux */
static const char * const es8316_hpmux_texts [ ] = {
" lin1-rin1 " ,
" lin2-rin2 " ,
" lin-rin with Boost " ,
" lin-rin with Boost and PGA "
} ;
static SOC_ENUM_SINGLE_DECL ( es8316_left_hpmux_enum , ES8316_HPMIX_SEL ,
4 , es8316_hpmux_texts ) ;
static const struct snd_kcontrol_new es8316_left_hpmux_controls =
SOC_DAPM_ENUM ( " Route " , es8316_left_hpmux_enum ) ;
static SOC_ENUM_SINGLE_DECL ( es8316_right_hpmux_enum , ES8316_HPMIX_SEL ,
0 , es8316_hpmux_texts ) ;
static const struct snd_kcontrol_new es8316_right_hpmux_controls =
SOC_DAPM_ENUM ( " Route " , es8316_right_hpmux_enum ) ;
/* headphone Output Mixer */
static const struct snd_kcontrol_new es8316_out_left_mix [ ] = {
SOC_DAPM_SINGLE ( " LLIN Switch " , ES8316_HPMIX_SWITCH , 6 , 1 , 0 ) ,
SOC_DAPM_SINGLE ( " Left DAC Switch " , ES8316_HPMIX_SWITCH , 7 , 1 , 0 ) ,
} ;
static const struct snd_kcontrol_new es8316_out_right_mix [ ] = {
SOC_DAPM_SINGLE ( " RLIN Switch " , ES8316_HPMIX_SWITCH , 2 , 1 , 0 ) ,
SOC_DAPM_SINGLE ( " Right DAC Switch " , ES8316_HPMIX_SWITCH , 3 , 1 , 0 ) ,
} ;
/* DAC data source mux */
static const char * const es8316_dacsrc_texts [ ] = {
" LDATA TO LDAC, RDATA TO RDAC " ,
" LDATA TO LDAC, LDATA TO RDAC " ,
" RDATA TO LDAC, RDATA TO RDAC " ,
" RDATA TO LDAC, LDATA TO RDAC " ,
} ;
static SOC_ENUM_SINGLE_DECL ( es8316_dacsrc_mux_enum , ES8316_DAC_SET1 ,
6 , es8316_dacsrc_texts ) ;
static const struct snd_kcontrol_new es8316_dacsrc_mux_controls =
SOC_DAPM_ENUM ( " Route " , es8316_dacsrc_mux_enum ) ;
static const struct snd_soc_dapm_widget es8316_dapm_widgets [ ] = {
SND_SOC_DAPM_SUPPLY ( " Bias " , ES8316_SYS_PDN , 3 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " Analog power " , ES8316_SYS_PDN , 4 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " Mic Bias " , ES8316_SYS_PDN , 5 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_INPUT ( " DMIC " ) ,
SND_SOC_DAPM_INPUT ( " MIC1 " ) ,
SND_SOC_DAPM_INPUT ( " MIC2 " ) ,
/* Input Mux */
SND_SOC_DAPM_MUX ( " Differential Mux " , SND_SOC_NOPM , 0 , 0 ,
& es8316_analog_in_mux_controls ) ,
SND_SOC_DAPM_SUPPLY ( " ADC Vref " , ES8316_SYS_PDN , 1 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " ADC bias " , ES8316_SYS_PDN , 2 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " ADC Clock " , ES8316_CLKMGR_CLKSW , 3 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_PGA ( " Line input PGA " , ES8316_ADC_PDN_LINSEL ,
7 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_ADC ( " Mono ADC " , NULL , ES8316_ADC_PDN_LINSEL , 6 , 1 ) ,
SND_SOC_DAPM_MUX ( " Digital Mic Mux " , SND_SOC_NOPM , 0 , 0 ,
& es8316_dmic_src_controls ) ,
/* Digital Interface */
SND_SOC_DAPM_AIF_OUT ( " I2S OUT " , " I2S1 Capture " , 1 ,
ES8316_SERDATA_ADC , 6 , 1 ) ,
SND_SOC_DAPM_AIF_IN ( " I2S IN " , " I2S1 Playback " , 0 ,
SND_SOC_NOPM , 0 , 0 ) ,
SND_SOC_DAPM_MUX ( " DAC Source Mux " , SND_SOC_NOPM , 0 , 0 ,
& es8316_dacsrc_mux_controls ) ,
SND_SOC_DAPM_SUPPLY ( " DAC Vref " , ES8316_SYS_PDN , 0 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " DAC Clock " , ES8316_CLKMGR_CLKSW , 2 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_DAC ( " Right DAC " , NULL , ES8316_DAC_PDN , 0 , 1 ) ,
SND_SOC_DAPM_DAC ( " Left DAC " , NULL , ES8316_DAC_PDN , 4 , 1 ) ,
/* Headphone Output Side */
SND_SOC_DAPM_MUX ( " Left Headphone Mux " , SND_SOC_NOPM , 0 , 0 ,
& es8316_left_hpmux_controls ) ,
SND_SOC_DAPM_MUX ( " Right Headphone Mux " , SND_SOC_NOPM , 0 , 0 ,
& es8316_right_hpmux_controls ) ,
SND_SOC_DAPM_MIXER ( " Left Headphone Mixer " , ES8316_HPMIX_PDN ,
5 , 1 , & es8316_out_left_mix [ 0 ] ,
ARRAY_SIZE ( es8316_out_left_mix ) ) ,
SND_SOC_DAPM_MIXER ( " Right Headphone Mixer " , ES8316_HPMIX_PDN ,
1 , 1 , & es8316_out_right_mix [ 0 ] ,
ARRAY_SIZE ( es8316_out_right_mix ) ) ,
SND_SOC_DAPM_PGA ( " Left Headphone Mixer Out " , ES8316_HPMIX_PDN ,
4 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_PGA ( " Right Headphone Mixer Out " , ES8316_HPMIX_PDN ,
0 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_OUT_DRV ( " Left Headphone Charge Pump " , ES8316_CPHP_OUTEN ,
6 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_OUT_DRV ( " Right Headphone Charge Pump " , ES8316_CPHP_OUTEN ,
2 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " Headphone Charge Pump " , ES8316_CPHP_PDN2 ,
5 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " Headphone Charge Pump Clock " , ES8316_CLKMGR_CLKSW ,
4 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_OUT_DRV ( " Left Headphone Driver " , ES8316_CPHP_OUTEN ,
5 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_OUT_DRV ( " Right Headphone Driver " , ES8316_CPHP_OUTEN ,
1 , 0 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " Headphone Out " , ES8316_CPHP_PDN1 , 2 , 1 , NULL , 0 ) ,
/* pdn_Lical and pdn_Rical bits are documented as Reserved, but must
* be explicitly unset in order to enable HP output
*/
SND_SOC_DAPM_SUPPLY ( " Left Headphone ical " , ES8316_CPHP_ICAL_VOL ,
7 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_SUPPLY ( " Right Headphone ical " , ES8316_CPHP_ICAL_VOL ,
3 , 1 , NULL , 0 ) ,
SND_SOC_DAPM_OUTPUT ( " HPOL " ) ,
SND_SOC_DAPM_OUTPUT ( " HPOR " ) ,
} ;
static const struct snd_soc_dapm_route es8316_dapm_routes [ ] = {
/* Recording */
{ " MIC1 " , NULL , " Mic Bias " } ,
{ " MIC2 " , NULL , " Mic Bias " } ,
{ " MIC1 " , NULL , " Bias " } ,
{ " MIC2 " , NULL , " Bias " } ,
{ " MIC1 " , NULL , " Analog power " } ,
{ " MIC2 " , NULL , " Analog power " } ,
{ " Differential Mux " , " lin1-rin1 " , " MIC1 " } ,
{ " Differential Mux " , " lin2-rin2 " , " MIC2 " } ,
{ " Line input PGA " , NULL , " Differential Mux " } ,
{ " Mono ADC " , NULL , " ADC Clock " } ,
{ " Mono ADC " , NULL , " ADC Vref " } ,
{ " Mono ADC " , NULL , " ADC bias " } ,
{ " Mono ADC " , NULL , " Line input PGA " } ,
/* It's not clear why, but to avoid recording only silence,
* the DAC clock must be running for the ADC to work .
*/
{ " Mono ADC " , NULL , " DAC Clock " } ,
{ " Digital Mic Mux " , " dmic disable " , " Mono ADC " } ,
{ " I2S OUT " , NULL , " Digital Mic Mux " } ,
/* Playback */
{ " DAC Source Mux " , " LDATA TO LDAC, RDATA TO RDAC " , " I2S IN " } ,
{ " Left DAC " , NULL , " DAC Clock " } ,
{ " Right DAC " , NULL , " DAC Clock " } ,
{ " Left DAC " , NULL , " DAC Vref " } ,
{ " Right DAC " , NULL , " DAC Vref " } ,
{ " Left DAC " , NULL , " DAC Source Mux " } ,
{ " Right DAC " , NULL , " DAC Source Mux " } ,
{ " Left Headphone Mux " , " lin-rin with Boost and PGA " , " Line input PGA " } ,
{ " Right Headphone Mux " , " lin-rin with Boost and PGA " , " Line input PGA " } ,
{ " Left Headphone Mixer " , " LLIN Switch " , " Left Headphone Mux " } ,
{ " Left Headphone Mixer " , " Left DAC Switch " , " Left DAC " } ,
{ " Right Headphone Mixer " , " RLIN Switch " , " Right Headphone Mux " } ,
{ " Right Headphone Mixer " , " Right DAC Switch " , " Right DAC " } ,
{ " Left Headphone Mixer Out " , NULL , " Left Headphone Mixer " } ,
{ " Right Headphone Mixer Out " , NULL , " Right Headphone Mixer " } ,
{ " Left Headphone Charge Pump " , NULL , " Left Headphone Mixer Out " } ,
{ " Right Headphone Charge Pump " , NULL , " Right Headphone Mixer Out " } ,
{ " Left Headphone Charge Pump " , NULL , " Headphone Charge Pump " } ,
{ " Right Headphone Charge Pump " , NULL , " Headphone Charge Pump " } ,
{ " Left Headphone Charge Pump " , NULL , " Headphone Charge Pump Clock " } ,
{ " Right Headphone Charge Pump " , NULL , " Headphone Charge Pump Clock " } ,
{ " Left Headphone Driver " , NULL , " Left Headphone Charge Pump " } ,
{ " Right Headphone Driver " , NULL , " Right Headphone Charge Pump " } ,
{ " HPOL " , NULL , " Left Headphone Driver " } ,
{ " HPOR " , NULL , " Right Headphone Driver " } ,
{ " HPOL " , NULL , " Left Headphone ical " } ,
{ " HPOR " , NULL , " Right Headphone ical " } ,
{ " Headphone Out " , NULL , " Bias " } ,
{ " Headphone Out " , NULL , " Analog power " } ,
{ " HPOL " , NULL , " Headphone Out " } ,
{ " HPOR " , NULL , " Headphone Out " } ,
} ;
static int es8316_set_dai_sysclk ( struct snd_soc_dai * codec_dai ,
int clk_id , unsigned int freq , int dir )
{
2018-01-29 04:32:16 +00:00
struct snd_soc_component * component = codec_dai - > component ;
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2019-09-04 01:53:20 +09:00
int i , ret ;
2017-06-12 11:01:45 -06:00
int count = 0 ;
es8316 - > sysclk = freq ;
ASoC: es8316: Do not set rate constraints for unsupported MCLKs
When using the codec through the generic audio graph card, there are at
least two calls of es8316_set_dai_sysclk(), with the effect of limiting
the allowed sample rates according to the MCLK/LRCK ratios supported by
the codec:
1. During audio card setup, to set the initial MCLK - see
asoc_simple_init_dai().
2. Before opening a stream, to update MCLK, according to the stream
sample rate and the multiplication factor - see
asoc_simple_hw_params().
In some cases the initial MCLK might be set to a frequency that doesn't
match any of the supported ratios, e.g. 12287999 instead of 12288000,
which is only 1 Hz below the supported clock, as that is what the
hardware reports. This creates an empty list of rate constraints, which
is further passed to snd_pcm_hw_constraint_list() via
es8316_pcm_startup(), and causes the following error on the very first
access of the sound card:
$ speaker-test -D hw:Analog,0 -F S16_LE -c 2 -t wav
Broken configuration for playback: no configurations available: Invalid argument
Setting of hwparams failed: Invalid argument
Note that all subsequent retries succeed thanks to the updated MCLK set
at point 2 above, which uses a computed frequency value instead of a
reading from the hardware registers. Normally this would have mitigated
the issue, but es8316_pcm_startup() executes before the 2nd call to
es8316_set_dai_sysclk(), hence it cannot make use of the updated
constraints.
Since es8316_pcm_hw_params() performs anyway a final validation of MCLK
against the stream sample rate and the supported MCLK/LRCK ratios, fix
the issue by ensuring that sysclk_constraints list is only set when at
least one supported sample rate is autodetected by the codec.
Fixes: b8b88b70875a ("ASoC: add es8316 codec driver")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20230530181140.483936-3-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-05-30 21:11:39 +03:00
es8316 - > sysclk_constraints . list = NULL ;
es8316 - > sysclk_constraints . count = 0 ;
2017-06-12 11:01:45 -06:00
ASoC: es8316: Do not set rate constraints for unsupported MCLKs
When using the codec through the generic audio graph card, there are at
least two calls of es8316_set_dai_sysclk(), with the effect of limiting
the allowed sample rates according to the MCLK/LRCK ratios supported by
the codec:
1. During audio card setup, to set the initial MCLK - see
asoc_simple_init_dai().
2. Before opening a stream, to update MCLK, according to the stream
sample rate and the multiplication factor - see
asoc_simple_hw_params().
In some cases the initial MCLK might be set to a frequency that doesn't
match any of the supported ratios, e.g. 12287999 instead of 12288000,
which is only 1 Hz below the supported clock, as that is what the
hardware reports. This creates an empty list of rate constraints, which
is further passed to snd_pcm_hw_constraint_list() via
es8316_pcm_startup(), and causes the following error on the very first
access of the sound card:
$ speaker-test -D hw:Analog,0 -F S16_LE -c 2 -t wav
Broken configuration for playback: no configurations available: Invalid argument
Setting of hwparams failed: Invalid argument
Note that all subsequent retries succeed thanks to the updated MCLK set
at point 2 above, which uses a computed frequency value instead of a
reading from the hardware registers. Normally this would have mitigated
the issue, but es8316_pcm_startup() executes before the 2nd call to
es8316_set_dai_sysclk(), hence it cannot make use of the updated
constraints.
Since es8316_pcm_hw_params() performs anyway a final validation of MCLK
against the stream sample rate and the supported MCLK/LRCK ratios, fix
the issue by ensuring that sysclk_constraints list is only set when at
least one supported sample rate is autodetected by the codec.
Fixes: b8b88b70875a ("ASoC: add es8316 codec driver")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20230530181140.483936-3-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-05-30 21:11:39 +03:00
if ( freq = = 0 )
2017-06-12 11:01:45 -06:00
return 0 ;
2019-09-08 01:36:52 +09:00
ret = clk_set_rate ( es8316 - > mclk , freq ) ;
if ( ret )
return ret ;
2017-06-12 11:01:45 -06:00
/* Limit supported sample rates to ones that can be autodetected
* by the codec running in slave mode .
*/
2023-08-30 01:01:13 +03:00
for ( i = 0 ; i < ARRAY_SIZE ( supported_mclk_lrck_ratios ) ; i + + ) {
2017-06-12 11:01:45 -06:00
const unsigned int ratio = supported_mclk_lrck_ratios [ i ] ;
if ( freq % ratio = = 0 )
es8316 - > allowed_rates [ count + + ] = freq / ratio ;
}
ASoC: es8316: Do not set rate constraints for unsupported MCLKs
When using the codec through the generic audio graph card, there are at
least two calls of es8316_set_dai_sysclk(), with the effect of limiting
the allowed sample rates according to the MCLK/LRCK ratios supported by
the codec:
1. During audio card setup, to set the initial MCLK - see
asoc_simple_init_dai().
2. Before opening a stream, to update MCLK, according to the stream
sample rate and the multiplication factor - see
asoc_simple_hw_params().
In some cases the initial MCLK might be set to a frequency that doesn't
match any of the supported ratios, e.g. 12287999 instead of 12288000,
which is only 1 Hz below the supported clock, as that is what the
hardware reports. This creates an empty list of rate constraints, which
is further passed to snd_pcm_hw_constraint_list() via
es8316_pcm_startup(), and causes the following error on the very first
access of the sound card:
$ speaker-test -D hw:Analog,0 -F S16_LE -c 2 -t wav
Broken configuration for playback: no configurations available: Invalid argument
Setting of hwparams failed: Invalid argument
Note that all subsequent retries succeed thanks to the updated MCLK set
at point 2 above, which uses a computed frequency value instead of a
reading from the hardware registers. Normally this would have mitigated
the issue, but es8316_pcm_startup() executes before the 2nd call to
es8316_set_dai_sysclk(), hence it cannot make use of the updated
constraints.
Since es8316_pcm_hw_params() performs anyway a final validation of MCLK
against the stream sample rate and the supported MCLK/LRCK ratios, fix
the issue by ensuring that sysclk_constraints list is only set when at
least one supported sample rate is autodetected by the codec.
Fixes: b8b88b70875a ("ASoC: add es8316 codec driver")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20230530181140.483936-3-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-05-30 21:11:39 +03:00
if ( count ) {
es8316 - > sysclk_constraints . list = es8316 - > allowed_rates ;
es8316 - > sysclk_constraints . count = count ;
}
2017-06-12 11:01:45 -06:00
return 0 ;
}
static int es8316_set_dai_fmt ( struct snd_soc_dai * codec_dai ,
unsigned int fmt )
{
2018-01-29 04:32:16 +00:00
struct snd_soc_component * component = codec_dai - > component ;
2017-06-12 11:01:45 -06:00
u8 serdata1 = 0 ;
u8 serdata2 = 0 ;
u8 clksw ;
u8 mask ;
2022-07-04 09:24:16 +08:00
if ( ( fmt & SND_SOC_DAIFMT_MASTER_MASK ) = = SND_SOC_DAIFMT_CBP_CFP )
serdata1 | = ES8316_SERDATA1_MASTER ;
2017-06-12 11:01:45 -06:00
if ( ( fmt & SND_SOC_DAIFMT_FORMAT_MASK ) ! = SND_SOC_DAIFMT_I2S ) {
2018-01-29 04:32:16 +00:00
dev_err ( component - > dev , " Codec driver only supports I2S format \n " ) ;
2017-06-12 11:01:45 -06:00
return - EINVAL ;
}
/* Clock inversion */
switch ( fmt & SND_SOC_DAIFMT_INV_MASK ) {
case SND_SOC_DAIFMT_NB_NF :
break ;
case SND_SOC_DAIFMT_IB_IF :
serdata1 | = ES8316_SERDATA1_BCLK_INV ;
serdata2 | = ES8316_SERDATA2_ADCLRP ;
break ;
case SND_SOC_DAIFMT_IB_NF :
serdata1 | = ES8316_SERDATA1_BCLK_INV ;
break ;
case SND_SOC_DAIFMT_NB_IF :
serdata2 | = ES8316_SERDATA2_ADCLRP ;
break ;
default :
return - EINVAL ;
}
mask = ES8316_SERDATA1_MASTER | ES8316_SERDATA1_BCLK_INV ;
2018-01-29 04:32:16 +00:00
snd_soc_component_update_bits ( component , ES8316_SERDATA1 , mask , serdata1 ) ;
2017-06-12 11:01:45 -06:00
mask = ES8316_SERDATA2_FMT_MASK | ES8316_SERDATA2_ADCLRP ;
2018-01-29 04:32:16 +00:00
snd_soc_component_update_bits ( component , ES8316_SERDATA_ADC , mask , serdata2 ) ;
snd_soc_component_update_bits ( component , ES8316_SERDATA_DAC , mask , serdata2 ) ;
2017-06-12 11:01:45 -06:00
/* Enable BCLK and MCLK inputs in slave mode */
clksw = ES8316_CLKMGR_CLKSW_MCLK_ON | ES8316_CLKMGR_CLKSW_BCLK_ON ;
2018-01-29 04:32:16 +00:00
snd_soc_component_update_bits ( component , ES8316_CLKMGR_CLKSW , clksw , clksw ) ;
2017-06-12 11:01:45 -06:00
return 0 ;
}
static int es8316_pcm_startup ( struct snd_pcm_substream * substream ,
struct snd_soc_dai * dai )
{
2018-01-29 04:32:16 +00:00
struct snd_soc_component * component = dai - > component ;
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2017-06-12 11:01:45 -06:00
ASoC: es8316: support fixed and variable both clock rates
This patch supports some type of machine drivers that set 0 to mclk
when sound device goes to idle state. After applied this patch,
sysclk == 0 means there is no constraint of sound rate and other
values will set constraints which is derived by sysclk setting.
Original code refuses sysclk == 0 setting. But some boards and SoC
(such as RockPro64 and RockChip I2S) has connected SoC MCLK out to
ES8316 MCLK in. In this case, SoC side I2S will choose suitable
frequency of MCLK such as fs * mclk-fs when user starts playing or
capturing.
Bad scenario as follows (mclk-fs = 256):
- Initialize sysclk by correct value (Ex. 12.288MHz)
- ES8316 set constraints of PCM rate by sysclk
48kHz (1/256), 32kHz (1/384), 30.720kHz (1/400),
24kHz (1/512), 16kHz (1/768), 12kHz (1/1024)
- Play 48kHz sound, it's acceptable
- Sysclk is not changed
- Play 32kHz sound, it's acceptable
- Set sysclk by 8.192MHz (= fs * mclk-fs = 32k * 256)
- ES8316 set constraints of PCM rate by sysclk
32kHz (1/256), 21.33kHz (1/384), 20.48kHz (1/400),
16kHz (1/512), 10.66kHz (1/768), 8kHz (1/1024)
- Play 48kHz again, but it's NOT acceptable because constraints
list does not allow 48kHz
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20190907163653.9382-2-katsuhiro@katsuster.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-08 01:36:53 +09:00
if ( es8316 - > sysclk_constraints . list )
snd_pcm_hw_constraint_list ( substream - > runtime , 0 ,
SNDRV_PCM_HW_PARAM_RATE ,
& es8316 - > sysclk_constraints ) ;
2017-06-12 11:01:45 -06:00
return 0 ;
}
static int es8316_pcm_hw_params ( struct snd_pcm_substream * substream ,
struct snd_pcm_hw_params * params ,
struct snd_soc_dai * dai )
{
2018-01-29 04:32:16 +00:00
struct snd_soc_component * component = dai - > component ;
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2017-06-12 11:01:45 -06:00
u8 wordlen = 0 ;
2022-07-04 09:24:16 +08:00
u8 bclk_divider ;
u16 lrck_divider ;
ASoC: es8316: support fixed and variable both clock rates
This patch supports some type of machine drivers that set 0 to mclk
when sound device goes to idle state. After applied this patch,
sysclk == 0 means there is no constraint of sound rate and other
values will set constraints which is derived by sysclk setting.
Original code refuses sysclk == 0 setting. But some boards and SoC
(such as RockPro64 and RockChip I2S) has connected SoC MCLK out to
ES8316 MCLK in. In this case, SoC side I2S will choose suitable
frequency of MCLK such as fs * mclk-fs when user starts playing or
capturing.
Bad scenario as follows (mclk-fs = 256):
- Initialize sysclk by correct value (Ex. 12.288MHz)
- ES8316 set constraints of PCM rate by sysclk
48kHz (1/256), 32kHz (1/384), 30.720kHz (1/400),
24kHz (1/512), 16kHz (1/768), 12kHz (1/1024)
- Play 48kHz sound, it's acceptable
- Sysclk is not changed
- Play 32kHz sound, it's acceptable
- Set sysclk by 8.192MHz (= fs * mclk-fs = 32k * 256)
- ES8316 set constraints of PCM rate by sysclk
32kHz (1/256), 21.33kHz (1/384), 20.48kHz (1/400),
16kHz (1/512), 10.66kHz (1/768), 8kHz (1/1024)
- Play 48kHz again, but it's NOT acceptable because constraints
list does not allow 48kHz
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20190907163653.9382-2-katsuhiro@katsuster.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-08 01:36:53 +09:00
int i ;
2023-08-30 01:01:14 +03:00
unsigned int clk = es8316 - > sysclk / 2 ;
bool clk_valid = false ;
/* We will start with halved sysclk and see if we can use it
* for proper clocking . This is to minimise the risk of running
* the CODEC with a too high frequency . We have an SKU where
* the sysclk frequency is 48 Mhz and this causes the sound to be
* sped up . If we can run with a halved sysclk , we will use it ,
* if we can ' t use it , then full sysclk will be used .
*/
do {
/* Validate supported sample rates that are autodetected from MCLK */
for ( i = 0 ; i < ARRAY_SIZE ( supported_mclk_lrck_ratios ) ; i + + ) {
const unsigned int ratio = supported_mclk_lrck_ratios [ i ] ;
if ( clk % ratio ! = 0 )
continue ;
if ( clk / ratio = = params_rate ( params ) )
break ;
}
if ( i = = ARRAY_SIZE ( supported_mclk_lrck_ratios ) ) {
if ( clk = = es8316 - > sysclk )
return - EINVAL ;
clk = es8316 - > sysclk ;
} else {
clk_valid = true ;
}
} while ( ! clk_valid ) ;
if ( clk ! = es8316 - > sysclk ) {
snd_soc_component_update_bits ( component , ES8316_CLKMGR_CLKSW ,
ES8316_CLKMGR_CLKSW_MCLK_DIV ,
ES8316_CLKMGR_CLKSW_MCLK_DIV ) ;
2017-06-12 11:01:45 -06:00
}
2023-08-30 01:01:14 +03:00
lrck_divider = clk / params_rate ( params ) ;
2022-07-04 09:24:16 +08:00
bclk_divider = lrck_divider / 4 ;
2017-06-12 11:01:45 -06:00
switch ( params_format ( params ) ) {
case SNDRV_PCM_FORMAT_S16_LE :
wordlen = ES8316_SERDATA2_LEN_16 ;
2022-07-04 09:24:16 +08:00
bclk_divider / = 16 ;
2017-06-12 11:01:45 -06:00
break ;
case SNDRV_PCM_FORMAT_S20_3LE :
wordlen = ES8316_SERDATA2_LEN_20 ;
2022-07-04 09:24:16 +08:00
bclk_divider / = 20 ;
2017-06-12 11:01:45 -06:00
break ;
case SNDRV_PCM_FORMAT_S24_LE :
2023-06-29 13:24:43 +02:00
case SNDRV_PCM_FORMAT_S24_3LE :
2017-06-12 11:01:45 -06:00
wordlen = ES8316_SERDATA2_LEN_24 ;
2022-07-04 09:24:16 +08:00
bclk_divider / = 24 ;
2017-06-12 11:01:45 -06:00
break ;
case SNDRV_PCM_FORMAT_S32_LE :
wordlen = ES8316_SERDATA2_LEN_32 ;
2022-07-04 09:24:16 +08:00
bclk_divider / = 32 ;
2017-06-12 11:01:45 -06:00
break ;
default :
return - EINVAL ;
}
2018-01-29 04:32:16 +00:00
snd_soc_component_update_bits ( component , ES8316_SERDATA_DAC ,
2017-06-12 11:01:45 -06:00
ES8316_SERDATA2_LEN_MASK , wordlen ) ;
2018-01-29 04:32:16 +00:00
snd_soc_component_update_bits ( component , ES8316_SERDATA_ADC ,
2017-06-12 11:01:45 -06:00
ES8316_SERDATA2_LEN_MASK , wordlen ) ;
2022-07-04 09:24:16 +08:00
snd_soc_component_update_bits ( component , ES8316_SERDATA1 , 0x1f , bclk_divider ) ;
snd_soc_component_update_bits ( component , ES8316_CLKMGR_ADCDIV1 , 0x0f , lrck_divider > > 8 ) ;
snd_soc_component_update_bits ( component , ES8316_CLKMGR_ADCDIV2 , 0xff , lrck_divider & 0xff ) ;
snd_soc_component_update_bits ( component , ES8316_CLKMGR_DACDIV1 , 0x0f , lrck_divider > > 8 ) ;
snd_soc_component_update_bits ( component , ES8316_CLKMGR_DACDIV2 , 0xff , lrck_divider & 0xff ) ;
2017-06-12 11:01:45 -06:00
return 0 ;
}
2020-07-09 10:56:57 +09:00
static int es8316_mute ( struct snd_soc_dai * dai , int mute , int direction )
2017-06-12 11:01:45 -06:00
{
2018-01-29 04:32:16 +00:00
snd_soc_component_update_bits ( dai - > component , ES8316_DAC_SET1 , 0x20 ,
2017-06-12 11:01:45 -06:00
mute ? 0x20 : 0 ) ;
return 0 ;
}
# define ES8316_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2023-08-30 01:01:12 +03:00
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE )
2017-06-12 11:01:45 -06:00
2017-08-18 17:35:59 +05:30
static const struct snd_soc_dai_ops es8316_ops = {
2017-06-12 11:01:45 -06:00
. startup = es8316_pcm_startup ,
. hw_params = es8316_pcm_hw_params ,
. set_fmt = es8316_set_dai_fmt ,
. set_sysclk = es8316_set_dai_sysclk ,
2020-07-09 10:56:57 +09:00
. mute_stream = es8316_mute ,
. no_capture_mute = 1 ,
2017-06-12 11:01:45 -06:00
} ;
static struct snd_soc_dai_driver es8316_dai = {
. name = " ES8316 HiFi " ,
. playback = {
. stream_name = " Playback " ,
. channels_min = 1 ,
. channels_max = 2 ,
. rates = SNDRV_PCM_RATE_8000_48000 ,
. formats = ES8316_FORMATS ,
} ,
. capture = {
. stream_name = " Capture " ,
. channels_min = 1 ,
. channels_max = 2 ,
. rates = SNDRV_PCM_RATE_8000_48000 ,
. formats = ES8316_FORMATS ,
} ,
. ops = & es8316_ops ,
2021-01-15 13:54:39 +09:00
. symmetric_rate = 1 ,
2017-06-12 11:01:45 -06:00
} ;
2019-01-03 14:45:26 +01:00
static void es8316_enable_micbias_for_mic_gnd_short_detect (
struct snd_soc_component * component )
{
struct snd_soc_dapm_context * dapm = snd_soc_component_get_dapm ( component ) ;
snd_soc_dapm_mutex_lock ( dapm ) ;
snd_soc_dapm_force_enable_pin_unlocked ( dapm , " Bias " ) ;
snd_soc_dapm_force_enable_pin_unlocked ( dapm , " Analog power " ) ;
snd_soc_dapm_force_enable_pin_unlocked ( dapm , " Mic Bias " ) ;
snd_soc_dapm_sync_unlocked ( dapm ) ;
snd_soc_dapm_mutex_unlock ( dapm ) ;
msleep ( 20 ) ;
}
static void es8316_disable_micbias_for_mic_gnd_short_detect (
struct snd_soc_component * component )
{
struct snd_soc_dapm_context * dapm = snd_soc_component_get_dapm ( component ) ;
snd_soc_dapm_mutex_lock ( dapm ) ;
snd_soc_dapm_disable_pin_unlocked ( dapm , " Mic Bias " ) ;
snd_soc_dapm_disable_pin_unlocked ( dapm , " Analog power " ) ;
snd_soc_dapm_disable_pin_unlocked ( dapm , " Bias " ) ;
snd_soc_dapm_sync_unlocked ( dapm ) ;
snd_soc_dapm_mutex_unlock ( dapm ) ;
}
static irqreturn_t es8316_irq ( int irq , void * data )
{
struct es8316_priv * es8316 = data ;
struct snd_soc_component * comp = es8316 - > component ;
unsigned int flags ;
mutex_lock ( & es8316 - > lock ) ;
regmap_read ( es8316 - > regmap , ES8316_GPIO_FLAG , & flags ) ;
if ( flags = = 0x00 )
goto out ; /* Powered-down / reset */
/* Catch spurious IRQ before set_jack is called */
if ( ! es8316 - > jack )
goto out ;
2019-03-29 22:50:43 +01:00
if ( es8316 - > jd_inverted )
flags ^ = ES8316_GPIO_FLAG_HP_NOT_INSERTED ;
2019-01-03 14:45:26 +01:00
dev_dbg ( comp - > dev , " gpio flags %#04x \n " , flags ) ;
if ( flags & ES8316_GPIO_FLAG_HP_NOT_INSERTED ) {
/* Jack removed, or spurious IRQ? */
if ( es8316 - > jack - > status & SND_JACK_MICROPHONE )
es8316_disable_micbias_for_mic_gnd_short_detect ( comp ) ;
if ( es8316 - > jack - > status & SND_JACK_HEADPHONE ) {
snd_soc_jack_report ( es8316 - > jack , 0 ,
SND_JACK_HEADSET | SND_JACK_BTN_0 ) ;
dev_dbg ( comp - > dev , " jack unplugged \n " ) ;
}
} else if ( ! ( es8316 - > jack - > status & SND_JACK_HEADPHONE ) ) {
/* Jack inserted, determine type */
es8316_enable_micbias_for_mic_gnd_short_detect ( comp ) ;
regmap_read ( es8316 - > regmap , ES8316_GPIO_FLAG , & flags ) ;
2019-03-29 22:50:43 +01:00
if ( es8316 - > jd_inverted )
flags ^ = ES8316_GPIO_FLAG_HP_NOT_INSERTED ;
2019-01-03 14:45:26 +01:00
dev_dbg ( comp - > dev , " gpio flags %#04x \n " , flags ) ;
if ( flags & ES8316_GPIO_FLAG_HP_NOT_INSERTED ) {
/* Jack unplugged underneath us */
es8316_disable_micbias_for_mic_gnd_short_detect ( comp ) ;
} else if ( flags & ES8316_GPIO_FLAG_GM_NOT_SHORTED ) {
/* Open, headset */
snd_soc_jack_report ( es8316 - > jack ,
SND_JACK_HEADSET ,
SND_JACK_HEADSET ) ;
/* Keep mic-gnd-short detection on for button press */
} else {
/* Shorted, headphones */
snd_soc_jack_report ( es8316 - > jack ,
SND_JACK_HEADPHONE ,
SND_JACK_HEADSET ) ;
/* No longer need mic-gnd-short detection */
es8316_disable_micbias_for_mic_gnd_short_detect ( comp ) ;
}
} else if ( es8316 - > jack - > status & SND_JACK_MICROPHONE ) {
/* Interrupt while jack inserted, report button state */
if ( flags & ES8316_GPIO_FLAG_GM_NOT_SHORTED ) {
/* Open, button release */
snd_soc_jack_report ( es8316 - > jack , 0 , SND_JACK_BTN_0 ) ;
} else {
/* Short, button press */
snd_soc_jack_report ( es8316 - > jack ,
SND_JACK_BTN_0 ,
SND_JACK_BTN_0 ) ;
}
}
out :
mutex_unlock ( & es8316 - > lock ) ;
return IRQ_HANDLED ;
}
static void es8316_enable_jack_detect ( struct snd_soc_component * component ,
struct snd_soc_jack * jack )
{
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2019-03-29 22:50:43 +01:00
/*
* Init es8316 - > jd_inverted here and not in the probe , as we cannot
* guarantee that the bytchr - es8316 driver , which might set this
* property , will probe before us .
*/
es8316 - > jd_inverted = device_property_read_bool ( component - > dev ,
" everest,jack-detect-inverted " ) ;
2019-01-03 14:45:26 +01:00
mutex_lock ( & es8316 - > lock ) ;
es8316 - > jack = jack ;
if ( es8316 - > jack - > status & SND_JACK_MICROPHONE )
es8316_enable_micbias_for_mic_gnd_short_detect ( component ) ;
snd_soc_component_update_bits ( component , ES8316_GPIO_DEBOUNCE ,
ES8316_GPIO_ENABLE_INTERRUPT ,
ES8316_GPIO_ENABLE_INTERRUPT ) ;
mutex_unlock ( & es8316 - > lock ) ;
/* Enable irq and sync initial jack state */
enable_irq ( es8316 - > irq ) ;
es8316_irq ( es8316 - > irq , es8316 ) ;
}
static void es8316_disable_jack_detect ( struct snd_soc_component * component )
{
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2021-01-12 11:17:25 +01:00
if ( ! es8316 - > jack )
return ; /* Already disabled (or never enabled) */
2019-01-03 14:45:26 +01:00
disable_irq ( es8316 - > irq ) ;
mutex_lock ( & es8316 - > lock ) ;
snd_soc_component_update_bits ( component , ES8316_GPIO_DEBOUNCE ,
ES8316_GPIO_ENABLE_INTERRUPT , 0 ) ;
if ( es8316 - > jack - > status & SND_JACK_MICROPHONE ) {
es8316_disable_micbias_for_mic_gnd_short_detect ( component ) ;
snd_soc_jack_report ( es8316 - > jack , 0 , SND_JACK_BTN_0 ) ;
}
es8316 - > jack = NULL ;
mutex_unlock ( & es8316 - > lock ) ;
}
static int es8316_set_jack ( struct snd_soc_component * component ,
struct snd_soc_jack * jack , void * data )
{
if ( jack )
es8316_enable_jack_detect ( component , jack ) ;
else
es8316_disable_jack_detect ( component ) ;
return 0 ;
}
2018-01-29 04:32:16 +00:00
static int es8316_probe ( struct snd_soc_component * component )
2017-06-12 11:01:45 -06:00
{
2019-01-03 14:45:26 +01:00
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2019-09-04 01:53:20 +09:00
int ret ;
2019-01-03 14:45:26 +01:00
es8316 - > component = component ;
2019-09-08 01:36:52 +09:00
es8316 - > mclk = devm_clk_get_optional ( component - > dev , " mclk " ) ;
2019-09-04 01:53:20 +09:00
if ( IS_ERR ( es8316 - > mclk ) ) {
2019-09-08 01:36:52 +09:00
dev_err ( component - > dev , " unable to get mclk \n " ) ;
return PTR_ERR ( es8316 - > mclk ) ;
2019-09-04 01:53:20 +09:00
}
2019-09-08 01:36:52 +09:00
if ( ! es8316 - > mclk )
dev_warn ( component - > dev , " assuming static mclk \n " ) ;
2019-09-04 01:53:20 +09:00
2019-09-08 01:36:52 +09:00
ret = clk_prepare_enable ( es8316 - > mclk ) ;
if ( ret ) {
dev_err ( component - > dev , " unable to enable mclk \n " ) ;
return ret ;
2019-09-04 01:53:20 +09:00
}
2017-06-12 11:01:45 -06:00
/* Reset codec and enable current state machine */
2018-01-29 04:32:16 +00:00
snd_soc_component_write ( component , ES8316_RESET , 0x3f ) ;
2017-06-12 11:01:45 -06:00
usleep_range ( 5000 , 5500 ) ;
2018-01-29 04:32:16 +00:00
snd_soc_component_write ( component , ES8316_RESET , ES8316_RESET_CSM_ON ) ;
2017-06-12 11:01:45 -06:00
msleep ( 30 ) ;
/*
* Documentation is unclear , but this value from the vendor driver is
* needed otherwise audio output is silent .
*/
2018-01-29 04:32:16 +00:00
snd_soc_component_write ( component , ES8316_SYS_VMIDSEL , 0xff ) ;
2017-06-12 11:01:45 -06:00
/*
* Documentation for this register is unclear and incomplete ,
* but here is a vendor - provided value that improves volume
* and quality for Intel CHT platforms .
*/
2018-01-29 04:32:16 +00:00
snd_soc_component_write ( component , ES8316_CLKMGR_ADCOSR , 0x32 ) ;
2017-06-12 11:01:45 -06:00
return 0 ;
}
2019-09-04 01:53:20 +09:00
static void es8316_remove ( struct snd_soc_component * component )
{
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
2019-09-08 01:36:52 +09:00
clk_disable_unprepare ( es8316 - > mclk ) ;
2019-09-04 01:53:20 +09:00
}
2022-08-25 09:49:52 +08:00
static int es8316_resume ( struct snd_soc_component * component )
{
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
regcache_cache_only ( es8316 - > regmap , false ) ;
regcache_sync ( es8316 - > regmap ) ;
return 0 ;
}
static int es8316_suspend ( struct snd_soc_component * component )
{
struct es8316_priv * es8316 = snd_soc_component_get_drvdata ( component ) ;
regcache_cache_only ( es8316 - > regmap , true ) ;
regcache_mark_dirty ( es8316 - > regmap ) ;
return 0 ;
}
2018-01-29 04:32:16 +00:00
static const struct snd_soc_component_driver soc_component_dev_es8316 = {
. probe = es8316_probe ,
2019-09-04 01:53:20 +09:00
. remove = es8316_remove ,
2022-08-25 09:49:52 +08:00
. resume = es8316_resume ,
. suspend = es8316_suspend ,
2019-01-03 14:45:26 +01:00
. set_jack = es8316_set_jack ,
2018-01-29 04:32:16 +00:00
. controls = es8316_snd_controls ,
. num_controls = ARRAY_SIZE ( es8316_snd_controls ) ,
. dapm_widgets = es8316_dapm_widgets ,
. num_dapm_widgets = ARRAY_SIZE ( es8316_dapm_widgets ) ,
. dapm_routes = es8316_dapm_routes ,
. num_dapm_routes = ARRAY_SIZE ( es8316_dapm_routes ) ,
. use_pmdown_time = 1 ,
. endianness = 1 ,
2017-06-12 11:01:45 -06:00
} ;
2023-04-19 19:45:06 +01:00
static bool es8316_volatile_reg ( struct device * dev , unsigned int reg )
{
switch ( reg ) {
case ES8316_GPIO_FLAG :
return true ;
default :
return false ;
}
}
2019-01-03 14:45:26 +01:00
2017-06-12 11:01:45 -06:00
static const struct regmap_config es8316_regmap = {
. reg_bits = 8 ,
. val_bits = 8 ,
2022-09-22 11:59:12 +02:00
. use_single_read = true ,
. use_single_write = true ,
2017-06-12 11:01:45 -06:00
. max_register = 0x53 ,
2023-04-19 19:45:06 +01:00
. volatile_reg = es8316_volatile_reg ,
2023-06-10 12:16:37 +01:00
. cache_type = REGCACHE_MAPLE ,
2017-06-12 11:01:45 -06:00
} ;
2022-04-05 18:58:25 +02:00
static int es8316_i2c_probe ( struct i2c_client * i2c_client )
2017-06-12 11:01:45 -06:00
{
2019-01-03 14:45:26 +01:00
struct device * dev = & i2c_client - > dev ;
2017-06-12 11:01:45 -06:00
struct es8316_priv * es8316 ;
2019-01-03 14:45:26 +01:00
int ret ;
2017-06-12 11:01:45 -06:00
es8316 = devm_kzalloc ( & i2c_client - > dev , sizeof ( struct es8316_priv ) ,
GFP_KERNEL ) ;
if ( es8316 = = NULL )
return - ENOMEM ;
i2c_set_clientdata ( i2c_client , es8316 ) ;
2019-01-03 14:45:26 +01:00
es8316 - > regmap = devm_regmap_init_i2c ( i2c_client , & es8316_regmap ) ;
if ( IS_ERR ( es8316 - > regmap ) )
return PTR_ERR ( es8316 - > regmap ) ;
es8316 - > irq = i2c_client - > irq ;
mutex_init ( & es8316 - > lock ) ;
2023-03-28 12:49:01 +03:00
if ( es8316 - > irq > 0 ) {
ret = devm_request_threaded_irq ( dev , es8316 - > irq , NULL , es8316_irq ,
IRQF_TRIGGER_HIGH | IRQF_ONESHOT | IRQF_NO_AUTOEN ,
" es8316 " , es8316 ) ;
if ( ret ) {
dev_warn ( dev , " Failed to get IRQ %d: %d \n " , es8316 - > irq , ret ) ;
es8316 - > irq = - ENXIO ;
}
2019-01-03 14:45:26 +01:00
}
2017-06-12 11:01:45 -06:00
2018-01-29 04:32:16 +00:00
return devm_snd_soc_register_component ( & i2c_client - > dev ,
& soc_component_dev_es8316 ,
2017-06-12 11:01:45 -06:00
& es8316_dai , 1 ) ;
}
static const struct i2c_device_id es8316_i2c_id [ ] = {
{ " es8316 " , 0 } ,
{ }
} ;
MODULE_DEVICE_TABLE ( i2c , es8316_i2c_id ) ;
2020-11-25 17:44:33 +01:00
# ifdef CONFIG_OF
2017-06-12 11:01:45 -06:00
static const struct of_device_id es8316_of_match [ ] = {
{ . compatible = " everest,es8316 " , } ,
{ } ,
} ;
MODULE_DEVICE_TABLE ( of , es8316_of_match ) ;
2020-11-25 17:44:33 +01:00
# endif
2017-06-12 11:01:45 -06:00
2020-07-07 14:06:10 -05:00
# ifdef CONFIG_ACPI
2017-06-12 11:01:45 -06:00
static const struct acpi_device_id es8316_acpi_match [ ] = {
{ " ESSX8316 " , 0 } ,
2021-10-29 09:11:09 +08:00
{ " ESSX8336 " , 0 } ,
2017-06-12 11:01:45 -06:00
{ } ,
} ;
MODULE_DEVICE_TABLE ( acpi , es8316_acpi_match ) ;
2020-07-07 14:06:10 -05:00
# endif
2017-06-12 11:01:45 -06:00
static struct i2c_driver es8316_i2c_driver = {
. driver = {
. name = " es8316 " ,
. acpi_match_table = ACPI_PTR ( es8316_acpi_match ) ,
. of_match_table = of_match_ptr ( es8316_of_match ) ,
} ,
2023-04-25 11:57:16 +02:00
. probe = es8316_i2c_probe ,
2017-06-12 11:01:45 -06:00
. id_table = es8316_i2c_id ,
} ;
module_i2c_driver ( es8316_i2c_driver ) ;
MODULE_DESCRIPTION ( " Everest Semi ES8316 ALSA SoC Codec Driver " ) ;
MODULE_AUTHOR ( " David Yang <yangxiaohua@everest-semi.com> " ) ;
MODULE_LICENSE ( " GPL v2 " ) ;