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/ * pci_sun4v_asm : Hypervisor c a l l s f o r P C I s u p p o r t .
*
* Copyright ( C ) 2 0 0 6 D a v i d S . M i l l e r < d a v e m @davemloft.net>
* /
# include < a s m / h y p e r v i s o r . h >
/ * % o0 : devhandle
* % o1 : tsbid
* % o2 : num t t e s
* % o3 : io_ a t t r i b u t e s
* % o4 : io_ p a g e _ l i s t p h y s a d d r e s s
*
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* returns % o 0 : - s t a t u s i f s t a t u s w a s n o n - z e r o , e l s e
* % o0 : num p a g e s m a p p e d
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* /
.globl pci_sun4v_iommu_map
pci_sun4v_iommu_map :
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mov % o 5 , % g 1
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mov H V _ F A S T _ P C I _ I O M M U _ M A P , % o 5
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ta H V _ F A S T _ T R A P
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brnz,p n % o 0 , 1 f
sub % g 0 , % o 0 , % o 0
mov % o 1 , % o 0
1 : retl
nop
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/ * % o0 : devhandle
* % o1 : tsbid
* % o2 : num t t e s
*
* returns % o 0 : n u m t t e s d e m a p p e d
* /
.globl pci_sun4v_iommu_demap
pci_sun4v_iommu_demap :
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mov H V _ F A S T _ P C I _ I O M M U _ D E M A P , % o 5
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ta H V _ F A S T _ T R A P
retl
mov % o 1 , % o 0
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/ * % o0 : devhandle
* % o1 : tsbid
* % o2 : & io_ a t t r i b u t e s
* % o3 : & real_ a d d r e s s
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_iommu_getmap
pci_sun4v_iommu_getmap :
mov % o 2 , % o 4
mov H V _ F A S T _ P C I _ I O M M U _ G E T M A P , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 4 ]
stx % o 2 , [ % o 3 ]
retl
mov % o 0 , % o 0
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/ * % o0 : devhandle
* % o1 : pci_ d e v i c e
* % o2 : pci_ c o n f i g _ o f f s e t
* % o3 : size
*
* returns % o 0 : d a t a
*
* If t h e r e i s a n e r r o r , t h e d a t a w i l l b e r e t u r n e d
* as a l l 1 ' s .
* /
.globl pci_sun4v_config_get
pci_sun4v_config_get :
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mov H V _ F A S T _ P C I _ C O N F I G _ G E T , % o 5
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ta H V _ F A S T _ T R A P
brnz,a ,p n % o 1 , 1 f
mov - 1 , % o 2
1 : retl
mov % o 2 , % o 0
/ * % o0 : devhandle
* % o1 : pci_ d e v i c e
* % o2 : pci_ c o n f i g _ o f f s e t
* % o3 : size
* % o4 : data
*
* returns % o 0 : s t a t u s
*
* status w i l l b e z e r o i f t h e o p e r a t i o n c o m p l e t e d
* successfully, e l s e - 1 i f n o t
* /
.globl pci_sun4v_config_put
pci_sun4v_config_put :
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mov H V _ F A S T _ P C I _ C O N F I G _ P U T , % o 5
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ta H V _ F A S T _ T R A P
brnz,a ,p n % o 1 , 1 f
mov - 1 , % o 1
1 : retl
mov % o 1 , % o 0
[SPARC64]: Add PCI MSI support on Niagara.
This is kind of hokey, we could use the hardware provided facilities
much better.
MSIs are assosciated with MSI Queues. MSI Queues generate interrupts
when any MSI assosciated with it is signalled. This suggests a
two-tiered IRQ dispatch scheme:
MSI Queue interrupt --> queue interrupt handler
MSI dispatch --> driver interrupt handler
But we just get one-level under Linux currently. What I'd like to do
is possibly stick the IRQ actions into a per-MSI-Queue data structure,
and dispatch them form there, but the generic IRQ layer doesn't
provide a way to do that right now.
So, the current kludge is to "ACK" the interrupt by processing the
MSI Queue data structures and ACK'ing them, then we run the actual
handler like normal.
We are wasting a lot of useful information, for example the MSI data
and address are provided with ever MSI, as well as a system tick if
available. If we could pass this into the IRQ handler it could help
with certain things, in particular for PCI-Express error messages.
The MSI entries on sparc64 also tell you exactly which bus/device/fn
sent the MSI, which would be great for error handling when no
registered IRQ handler can service the interrupt.
We override the disable/enable IRQ chip methods in sun4v_msi, so we
have to call {mask,unmask}_msi_irq() directly from there. This is
another ugly wart.
Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-10 17:41:02 -08:00
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : msiq p h y s a d d r e s s
* % o3 : num e n t r i e s
*
* returns % o 0 : s t a t u s
*
* status w i l l b e z e r o i f t h e o p e r a t i o n c o m p l e t e d
* successfully, e l s e - 1 i f n o t
* /
.globl pci_sun4v_msiq_conf
pci_sun4v_msiq_conf :
mov H V _ F A S T _ P C I _ M S I Q _ C O N F , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : & msiq_ p h y s _ a d d r
* % o3 : & msiq_ n u m _ e n t r i e s
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_info
pci_sun4v_msiq_info :
mov % o 2 , % o 4
mov H V _ F A S T _ P C I _ M S I Q _ I N F O , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 4 ]
stx % o 2 , [ % o 3 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : & valid
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_getvalid
pci_sun4v_msiq_getvalid :
mov H V _ F A S T _ P C I _ M S I Q _ G E T V A L I D , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : valid
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_setvalid
pci_sun4v_msiq_setvalid :
mov H V _ F A S T _ P C I _ M S I Q _ S E T V A L I D , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : & state
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_getstate
pci_sun4v_msiq_getstate :
mov H V _ F A S T _ P C I _ M S I Q _ G E T S T A T E , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : state
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_setstate
pci_sun4v_msiq_setstate :
mov H V _ F A S T _ P C I _ M S I Q _ S E T S T A T E , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : & head
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_gethead
pci_sun4v_msiq_gethead :
mov H V _ F A S T _ P C I _ M S I Q _ G E T H E A D , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : head
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_sethead
pci_sun4v_msiq_sethead :
mov H V _ F A S T _ P C I _ M S I Q _ S E T H E A D , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msiqid
* % o2 : & tail
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msiq_gettail
pci_sun4v_msiq_gettail :
mov H V _ F A S T _ P C I _ M S I Q _ G E T T A I L , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : & valid
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msi_getvalid
pci_sun4v_msi_getvalid :
mov H V _ F A S T _ P C I _ M S I _ G E T V A L I D , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : valid
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msi_setvalid
pci_sun4v_msi_setvalid :
mov H V _ F A S T _ P C I _ M S I _ S E T V A L I D , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : & msiq
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msi_getmsiq
pci_sun4v_msi_getmsiq :
mov H V _ F A S T _ P C I _ M S I _ G E T M S I Q , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : msitype
* % o3 : msiq
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msi_setmsiq
pci_sun4v_msi_setmsiq :
mov H V _ F A S T _ P C I _ M S I _ S E T M S I Q , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : & state
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msi_getstate
pci_sun4v_msi_getstate :
mov H V _ F A S T _ P C I _ M S I _ G E T S T A T E , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : state
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msi_setstate
pci_sun4v_msi_setstate :
mov H V _ F A S T _ P C I _ M S I _ S E T S T A T E , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : & msiq
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msg_getmsiq
pci_sun4v_msg_getmsiq :
mov H V _ F A S T _ P C I _ M S G _ G E T M S I Q , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : msiq
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msg_setmsiq
pci_sun4v_msg_setmsiq :
mov H V _ F A S T _ P C I _ M S G _ S E T M S I Q , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : & valid
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msg_getvalid
pci_sun4v_msg_getvalid :
mov H V _ F A S T _ P C I _ M S G _ G E T V A L I D , % o 5
ta H V _ F A S T _ T R A P
stx % o 1 , [ % o 2 ]
retl
mov % o 0 , % o 0
/ * % o0 : devhandle
* % o1 : msinum
* % o2 : valid
*
* returns % o 0 : s t a t u s
* /
.globl pci_sun4v_msg_setvalid
pci_sun4v_msg_setvalid :
mov H V _ F A S T _ P C I _ M S G _ S E T V A L I D , % o 5
ta H V _ F A S T _ T R A P
retl
mov % o 0 , % o 0
