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linux/arch/riscv/Kconfig.socs

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arch: riscv: add config option for building SiFive's SoC resource Create a config option for building SiFive SoC specific resources e.g. SiFive device tree, platform drivers... Signed-off-by: Loys Ollivier <lollivier@baylibre.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-06-17 21:29:48 +02:00
menu "SoC selection"
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_MICROCHIP_POLARFIRE
def_bool SOC_MICROCHIP_POLARFIRE
RISC-V: Add Microchip PolarFire SoC kconfig option Add Microchip PolarFire kconfig option which selects SoC specific and common drivers that is required for this SoC. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-03-03 12:02:49 -08:00
config SOC_MICROCHIP_POLARFIRE
bool "Microchip PolarFire SoCs"
help
This enables support for Microchip PolarFire SoC platforms.
riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option Add ARCH_RENESAS config option to allow selecting the Renesas RISC-V SoCs. We currently have the newly added RZ/Five (R9A07G043) RISC-V based SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Guo Ren <guoren@kernel.org> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20221028165921.94487-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-10-28 17:59:17 +01:00
config ARCH_RENESAS
bool "Renesas RISC-V SoCs"
help
This enables support for the RISC-V based Renesas SoCs.
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_SIFIVE
def_bool SOC_SIFIVE
arch: riscv: add config option for building SiFive's SoC resource Create a config option for building SiFive SoC specific resources e.g. SiFive device tree, platform drivers... Signed-off-by: Loys Ollivier <lollivier@baylibre.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-06-17 21:29:48 +02:00
config SOC_SIFIVE
riscv: Fix Kconfig indentation Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> [paul.walmsley@sifive.com: use two leading spaces for help text to align with common arch/ practice] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-11-21 04:20:57 +01:00
bool "SiFive SoCs"
riscv: alternative only works on !XIP_KERNEL The alternative mechanism needs runtime code patching, it can't work on XIP_KERNEL. And the errata workarounds are implemented via the alternative mechanism. So add !XIP_KERNEL dependency for alternative and erratas. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Fixes: 44c922572952 ("RISC-V: enable XIP") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-02-11 00:49:43 +08:00
select ERRATA_SIFIVE if !XIP_KERNEL
riscv: Fix Kconfig indentation Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> [paul.walmsley@sifive.com: use two leading spaces for help text to align with common arch/ practice] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-11-21 04:20:57 +01:00
help
This enables support for SiFive SoC platform hardware.
arch: riscv: add config option for building SiFive's SoC resource Create a config option for building SiFive SoC specific resources e.g. SiFive device tree, platform drivers... Signed-off-by: Loys Ollivier <lollivier@baylibre.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-06-17 21:29:48 +02:00
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_STARFIVE
def_bool SOC_STARFIVE
RISC-V: Add StarFive SoC Kconfig option Add StarFive Kconfig option to select SoC specific and common drivers required for these SoCs. Select subsystems required to boot so the required drivers gets enabled by default. Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-10-10 16:10:32 +02:00
config SOC_STARFIVE
bool "StarFive SoCs"
select PINCTRL
select RESET_CONTROLLER
help
This enables support for StarFive SoC platform hardware.
riscv: Add the Allwinner SoC family Kconfig option Allwinner manufactures the sunxi family of application processors. This includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8 SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs. The first SoC in the sun20i series is D1, containing a single T-HEAD C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM. Most peripherals are shared across the entire chip family. In fact, the ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible with the D1s. This means many existing device drivers can be reused. To facilitate this reuse, name the symbol ARCH_SUNXI, since that is what the existing drivers have as their dependency. Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230126045738.47903-11-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-01-25 22:57:37 -06:00
config ARCH_SUNXI
bool "Allwinner sun20i SoCs"
depends on MMU && !XIP_KERNEL
select ERRATA_THEAD
select SUN4I_TIMER
help
This enables support for Allwinner sun20i platform hardware,
including boards based on the D1 and D1s SoCs.
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_VIRT
def_bool SOC_VIRT
RISC-V: Kconfig: Remove trailing whitespace Remove trailing whitespace that hurts my eyes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/080aa959266ad842a8e7efca7111f1350c6a065a.1673424858.git.geert+renesas@glider.be Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-01-11 09:15:33 +01:00
RISC-V: Add kconfig option for QEMU virt machine We add kconfig option for QEMU virt machine and select all required VIRTIO drivers using this kconfig option. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2019-12-03 03:49:31 +00:00
config SOC_VIRT
riscv: Fix unmet direct dependencies built based on SOC_VIRT Fix unmet direct dependencies Warning and fix Kconfig indent. WARNING: unmet direct dependencies detected for POWER_RESET_SYSCON Depends on [n]: POWER_RESET [=n] && OF [=y] && HAS_IOMEM [=y] Selected by [y]: - SOC_VIRT [=y] WARNING: unmet direct dependencies detected for POWER_RESET_SYSCON_POWEROFF Depends on [n]: POWER_RESET [=n] && OF [=y] && HAS_IOMEM [=y] Selected by [y]: - SOC_VIRT [=y] WARNING: unmet direct dependencies detected for RTC_DRV_GOLDFISH Depends on [n]: RTC_CLASS [=n] && OF [=y] && HAS_IOMEM [=y] && (GOLDFISH [=y] || COMPILE_TEST [=n]) Selected by [y]: - SOC_VIRT [=y] Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-05-11 10:19:52 +08:00
bool "QEMU Virt Machine"
RISC-V: Remove CLINT related code from timer and arch Right now the RISC-V timer driver is convoluted to support: 1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for clocksource and SBI timer calls for clockevent device. 2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO counter register for clocksource and CLINT MMIO compare register for clockevent device. We now have a separate CLINT timer driver which also provide CLINT based IPI operations so let's remove CLINT MMIO related code from arch/riscv directory and RISC-V timer driver. Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: Emil Renner Berhing <kernel@esmil.dk> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-08-17 18:12:50 +05:30
select CLINT_TIMER if RISCV_M_MODE
riscv: Fix unmet direct dependencies built based on SOC_VIRT Fix unmet direct dependencies Warning and fix Kconfig indent. WARNING: unmet direct dependencies detected for POWER_RESET_SYSCON Depends on [n]: POWER_RESET [=n] && OF [=y] && HAS_IOMEM [=y] Selected by [y]: - SOC_VIRT [=y] WARNING: unmet direct dependencies detected for POWER_RESET_SYSCON_POWEROFF Depends on [n]: POWER_RESET [=n] && OF [=y] && HAS_IOMEM [=y] Selected by [y]: - SOC_VIRT [=y] WARNING: unmet direct dependencies detected for RTC_DRV_GOLDFISH Depends on [n]: RTC_CLASS [=n] && OF [=y] && HAS_IOMEM [=y] && (GOLDFISH [=y] || COMPILE_TEST [=n]) Selected by [y]: - SOC_VIRT [=y] Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-05-11 10:19:52 +08:00
select POWER_RESET
select POWER_RESET_SYSCON
select POWER_RESET_SYSCON_POWEROFF
select GOLDFISH
select RTC_DRV_GOLDFISH if RTC_CLASS
RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test SBI HSM Supend on QEMU. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-02-10 11:19:47 +05:30
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
RISC-V: cpuidle: fix Kconfig select for RISCV_SBI_CPUIDLE There can be lots of build errors when building cpuidle-riscv-sbi.o. They are all caused by a kconfig problem with this warning: WARNING: unmet direct dependencies detected for RISCV_SBI_CPUIDLE Depends on [n]: CPU_IDLE [=y] && RISCV [=y] && RISCV_SBI [=n] Selected by [y]: - SOC_VIRT [=y] && CPU_IDLE [=y] so make the 'select' of RISCV_SBI_CPUIDLE also depend on RISCV_SBI. Fixes: c5179ef1ca0c ("RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Anup Patel <anup@brainfault.org> Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-04-09 15:53:17 -07:00
select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
riscv: Fix unmet direct dependencies built based on SOC_VIRT Fix unmet direct dependencies Warning and fix Kconfig indent. WARNING: unmet direct dependencies detected for POWER_RESET_SYSCON Depends on [n]: POWER_RESET [=n] && OF [=y] && HAS_IOMEM [=y] Selected by [y]: - SOC_VIRT [=y] WARNING: unmet direct dependencies detected for POWER_RESET_SYSCON_POWEROFF Depends on [n]: POWER_RESET [=n] && OF [=y] && HAS_IOMEM [=y] Selected by [y]: - SOC_VIRT [=y] WARNING: unmet direct dependencies detected for RTC_DRV_GOLDFISH Depends on [n]: RTC_CLASS [=n] && OF [=y] && HAS_IOMEM [=y] && (GOLDFISH [=y] || COMPILE_TEST [=n]) Selected by [y]: - SOC_VIRT [=y] Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-05-11 10:19:52 +08:00
help
This enables support for QEMU Virt Machine.
RISC-V: Add kconfig option for QEMU virt machine We add kconfig option for QEMU virt machine and select all required VIRTIO drivers using this kconfig option. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2019-12-03 03:49:31 +00:00
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_CANAAN
def_bool SOC_CANAAN
riscv: Use vendor name for K210 SoC support Rename configuration options and directories related to the Kendryte K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte" branding name. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:38 +09:00
config SOC_CANAAN
bool "Canaan Kendryte K210 SoC"
riscv: Add Kendryte K210 SoC support Add support for the Kendryte K210 RISC-V SoC. For now, this support only provides a simple sysctl driver allowing to setup the CPU and uart clock. This support is enabled through the new Kconfig option SOC_KENDRYTE and defines the config option CONFIG_K210_SYSCTL to enable the K210 SoC sysctl driver compilation. The sysctl driver also registers an early SoC initialization function allowing enabling the general purpose use of the 2MB of SRAM normally reserved for the SoC AI engine. This initialization function is automatically called before the dt early initialization using the flat dt root node compatible property matching the value "kendryte,k210". Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> [Palmer: Add missing endmenu in Kconfig.socs] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-16 09:47:39 +09:00
depends on !MMU
RISC-V: Remove CLINT related code from timer and arch Right now the RISC-V timer driver is convoluted to support: 1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for clocksource and SBI timer calls for clockevent device. 2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO counter register for clocksource and CLINT MMIO compare register for clockevent device. We now have a separate CLINT timer driver which also provide CLINT based IPI operations so let's remove CLINT MMIO related code from arch/riscv directory and RISC-V timer driver. Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: Emil Renner Berhing <kernel@esmil.dk> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-08-17 18:12:50 +05:30
select CLINT_TIMER if RISCV_M_MODE
riscv: Add Canaan Kendryte K210 reset controller Add a reset controller driver for the Canaan Kendryte K210 SoC. This driver relies on its syscon compatible parent node (sysctl) for its register mapping. Default this driver compilation to y when the SOC_CANAAN option is selected. The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210 SOC RESET CONTROLLER DRIVER" with myself listed as maintainer for this driver. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:47 +09:00
select ARCH_HAS_RESET_CONTROLLER
pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver Add the pinctrl-k210.c pinctrl driver for the Canaan Kendryte K210 field programmable IO array (FPIOA) to allow configuring the SoC pin functions. The K210 has 48 programmable pins which can take any of 256 possible functions. This patch is inspired from the k210 pinctrl driver for the u-boot project and contains many direct contributions from Sean Anderson. The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210 SOC FPIOA DRIVER" with myself listed as maintainer for this driver. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Signed-off-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-12 09:58:40 +09:00
select PINCTRL
riscv: Fix compilation error with Canaan SoC When CONFIG_SOC_CANAAN is selected, the K210 sysctl driver is always compiled. Since this driver early init function calls the function k210_clk_early_init() implemented by the K210 clk driver, this driver must also always be selected for compilation ot avoid build failures. Avoid such build failures by always selecting CONFIG_COMMON_CLK and CONFIG_COMMON_CLK_K210 when CONFIG_SOC_CANAAN is enabled. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Fixes: c6ca7616f7d5 ("clk: Add RISC-V Canaan Kendryte K210 clock driver") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-03-11 19:24:24 +09:00
select COMMON_CLK
riscv: Add Kendryte K210 SoC support Add support for the Kendryte K210 RISC-V SoC. For now, this support only provides a simple sysctl driver allowing to setup the CPU and uart clock. This support is enabled through the new Kconfig option SOC_KENDRYTE and defines the config option CONFIG_K210_SYSCTL to enable the K210 SoC sysctl driver compilation. The sysctl driver also registers an early SoC initialization function allowing enabling the general purpose use of the 2MB of SRAM normally reserved for the SoC AI engine. This initialization function is automatically called before the dt early initialization using the flat dt root node compatible property matching the value "kendryte,k210". Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> [Palmer: Add missing endmenu in Kconfig.socs] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-16 09:47:39 +09:00
help
riscv: Use vendor name for K210 SoC support Rename configuration options and directories related to the Kendryte K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte" branding name. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:38 +09:00
This enables support for Canaan Kendryte K210 SoC platform hardware.
riscv: Add Kendryte K210 SoC support Add support for the Kendryte K210 RISC-V SoC. For now, this support only provides a simple sysctl driver allowing to setup the CPU and uart clock. This support is enabled through the new Kconfig option SOC_KENDRYTE and defines the config option CONFIG_K210_SYSCTL to enable the K210 SoC sysctl driver compilation. The sysctl driver also registers an early SoC initialization function allowing enabling the general purpose use of the 2MB of SRAM normally reserved for the SoC AI engine. This initialization function is automatically called before the dt early initialization using the flat dt root node compatible property matching the value "kendryte,k210". Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> [Palmer: Add missing endmenu in Kconfig.socs] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-16 09:47:39 +09:00
RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN While we cannot yet drop the SOC_ prefixed symbols, we can convert uses of these symbols within Kconfig.socs to the ARCH_ variants. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20 21:17:06 +00:00
if ARCH_CANAAN
riscv: K210: Add a built-in device tree The K210's bootloader does not provide a device tree. Give the ability to providea builtin one with the SOC_KENDRYTE_K210_BUILTIN_DTB option. If selected, this option result in the definition of a builtin DTB entry in the k210 sysctl driver. If defined, the builtin DTB entry points to the default k210.dts device tree file and is keyed with the vendor ID 0x4B5, the arch ID 0xE59889E6A5A04149 ("Canaan AI" in UTF-8 coded Chinese) and the impl ID 0x4D41495832303030 ("MAIX200"). These values are reported by the SiPEED MAIXDUINO board, the SiPEED MAIX Go board and the SiPEED Dan Dock board. [Thanks to Damien for the K210 IDs] Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-04-14 13:43:25 +09:00
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_CANAAN_K210_DTB_BUILTIN
def_bool SOC_CANAAN_K210_DTB_BUILTIN
riscv: Use vendor name for K210 SoC support Rename configuration options and directories related to the Kendryte K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte" branding name. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:38 +09:00
config SOC_CANAAN_K210_DTB_BUILTIN
bool "Builtin device tree for the Canaan Kendryte K210"
RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN While we cannot yet drop the SOC_ prefixed symbols, we can convert uses of these symbols within Kconfig.socs to the ARCH_ variants. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20 21:17:06 +00:00
depends on ARCH_CANAAN
riscv: K210: Add a built-in device tree The K210's bootloader does not provide a device tree. Give the ability to providea builtin one with the SOC_KENDRYTE_K210_BUILTIN_DTB option. If selected, this option result in the definition of a builtin DTB entry in the k210 sysctl driver. If defined, the builtin DTB entry points to the default k210.dts device tree file and is keyed with the vendor ID 0x4B5, the arch ID 0xE59889E6A5A04149 ("Canaan AI" in UTF-8 coded Chinese) and the impl ID 0x4D41495832303030 ("MAIX200"). These values are reported by the SiPEED MAIXDUINO board, the SiPEED MAIX Go board and the SiPEED Dan Dock board. [Thanks to Damien for the K210 IDs] Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-04-14 13:43:25 +09:00
default y
select OF
select BUILTIN_DTB
help
riscv: Fix builtin DTB handling All SiPeed K210 MAIX boards have the exact same vendor, arch and implementation IDs, preventing differentiation to select the correct device tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. This result in this macro to be useless and mandates changing the code of the sysctl driver to change the builtin device tree suitable for the target board. Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro since it is used only for the K210 support. The code searching the builtin DTBs using the vendor, arch an implementation IDs is also removed. Support for builtin DTB falls back to the simpler and more traditional handling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarly to other architectures. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:37 +09:00
Build a device tree for the Kendryte K210 into the Linux image.
riscv: K210: Add a built-in device tree The K210's bootloader does not provide a device tree. Give the ability to providea builtin one with the SOC_KENDRYTE_K210_BUILTIN_DTB option. If selected, this option result in the definition of a builtin DTB entry in the k210 sysctl driver. If defined, the builtin DTB entry points to the default k210.dts device tree file and is keyed with the vendor ID 0x4B5, the arch ID 0xE59889E6A5A04149 ("Canaan AI" in UTF-8 coded Chinese) and the impl ID 0x4D41495832303030 ("MAIX200"). These values are reported by the SiPEED MAIXDUINO board, the SiPEED MAIX Go board and the SiPEED Dan Dock board. [Thanks to Damien for the K210 IDs] Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-04-14 13:43:25 +09:00
This option should be selected if no bootloader is being used.
If unsure, say Y.
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
config ARCH_CANAAN_K210_DTB_SOURCE
RISC-V: fix incorrect type of ARCH_CANAAN_K210_DTB_SOURCE When adding the ARCH_ symbol for the builtin K210 dtb, I erroneously used the bool type for something that is quite obviously a string. Unfortunately, there is no such thing as "def_string", but in this case we can use "default" to propagate the value of SOC_CANAAN_K210_DTB_SOURCE to ARCH_CANAAN_K210_DTB_SOURCE. ARCH_CANAAN_K210_DTB_SOURCE is not user selectable, so using olddefconfig etc will update ARCH_CANAAN_K210_DTB_SOURCE to reflect any changes made to SOC_CANAAN_K210_DTB_SOURCE. Fixes: fc43211939bb ("RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN") Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/all/20230111104848.2088516-1-conor.dooley@microchip.com/ Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-01-11 10:48:49 +00:00
string
default SOC_CANAAN_K210_DTB_SOURCE
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols To facilitate a transfer from SOC_FOO to ARCH_FOO, over a release cycle, introduce some aliases so that drivers etc that use the SOC_FOO symbols can be converted. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- To me, the most straight-forward conversion looks like so: - this patch is applied in week 2 of the merge window, to avoid any conflicts with the Renesas tree - all users of the SOC_ variants can be converted over a release cycle (or more) & no trees need to merge an immutable branch. - we convert defconfig etc over after all users are converted - doing it over at least one release cycle means that `make oldconfig` will keep people's configs working as they upgrade - any new SoC families added uses ARCH_FOO
2022-11-20 20:59:41 +00:00
riscv: Use vendor name for K210 SoC support Rename configuration options and directories related to the Kendryte K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte" branding name. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:38 +09:00
config SOC_CANAAN_K210_DTB_SOURCE
string "Source file for the Canaan Kendryte K210 builtin DTB"
RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN While we cannot yet drop the SOC_ prefixed symbols, we can convert uses of these symbols within Kconfig.socs to the ARCH_ variants. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20 21:17:06 +00:00
depends on ARCH_CANAAN
depends on ARCH_CANAAN_K210_DTB_BUILTIN
riscv: Update Canaan Kendryte K210 device tree Update the Canaan Kendryte K210 base device tree k210.dtsi to define all supported peripherals of the SoC, their clocks and reset lines. The device tree file k210.dts is renamed to k210_generic.dts and becomes the default value selection of the configuration option SOC_CANAAN_K210_DTB_BUILTIN_SOURCE. No device beside the serial console is defined by this device tree. This makes this generic device tree suitable for use with a builtin initramfs with all known K210 based boards. These changes result in the K210_CLK_ACLK clock ID to be unused and removed from the dt-bindings k210-clk.h header file. Most updates to the k210.dtsi file come from Sean Anderson's work on U-Boot support for the K210. Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-02-10 14:02:23 +09:00
default "k210_generic"
riscv: Fix builtin DTB handling All SiPeed K210 MAIX boards have the exact same vendor, arch and implementation IDs, preventing differentiation to select the correct device tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. This result in this macro to be useless and mandates changing the code of the sysctl driver to change the builtin device tree suitable for the target board. Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro since it is used only for the K210 support. The code searching the builtin DTBs using the vendor, arch an implementation IDs is also removed. Support for builtin DTB falls back to the simpler and more traditional handling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarly to other architectures. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:37 +09:00
help
riscv: Use vendor name for K210 SoC support Rename configuration options and directories related to the Kendryte K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte" branding name. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:38 +09:00
Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
riscv: Fix builtin DTB handling All SiPeed K210 MAIX boards have the exact same vendor, arch and implementation IDs, preventing differentiation to select the correct device tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. This result in this macro to be useless and mandates changing the code of the sysctl driver to change the builtin device tree suitable for the target board. Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro since it is used only for the K210 support. The code searching the builtin DTBs using the vendor, arch an implementation IDs is also removed. Support for builtin DTB falls back to the simpler and more traditional handling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarly to other architectures. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:37 +09:00
for the DTS file that will be used to produce the DTB linked into the
kernel.
RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN While we cannot yet drop the SOC_ prefixed symbols, we can convert uses of these symbols within Kconfig.socs to the ARCH_ variants. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20 21:17:06 +00:00
endif # ARCH_CANAAN
riscv: Fix builtin DTB handling All SiPeed K210 MAIX boards have the exact same vendor, arch and implementation IDs, preventing differentiation to select the correct device tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. This result in this macro to be useless and mandates changing the code of the sysctl driver to change the builtin device tree suitable for the target board. Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro since it is used only for the K210 support. The code searching the builtin DTBs using the vendor, arch an implementation IDs is also removed. Support for builtin DTB falls back to the simpler and more traditional handling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarly to other architectures. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-13 22:50:37 +09:00
riscv: Kconfig.socs: Add comments Add trailing comments to endif and endmenu statements for better readability. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Link: https://lore.kernel.org/r/20220520120232.148310-4-juergh@canonical.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-05-20 14:02:32 +02:00
endmenu # "SoC selection"
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