2008-04-17 08:28:09 +04:00
/ *
* This p r o g r a m i s f r e e s o f t w a r e ; you can redistribute it and/or modify
* it u n d e r t h e t e r m s o f t h e G N U G e n e r a l P u b l i c L i c e n s e , v e r s i o n 2 , a s
* published b y t h e F r e e S o f t w a r e F o u n d a t i o n .
*
* This p r o g r a m i s d i s t r i b u t e d i n t h e h o p e t h a t i t w i l l b e u s e f u l ,
* but W I T H O U T A N Y W A R R A N T Y ; without even the implied warranty of
* MERCHANTABILITY o r F I T N E S S F O R A P A R T I C U L A R P U R P O S E . S e e t h e
* GNU G e n e r a l P u b l i c L i c e n s e f o r m o r e d e t a i l s .
*
* You s h o u l d h a v e r e c e i v e d a c o p y o f t h e G N U G e n e r a l P u b l i c L i c e n s e
* along w i t h t h i s p r o g r a m ; if not, write to the Free Software
* Foundation, 5 1 F r a n k l i n S t r e e t , F i f t h F l o o r , B o s t o n , M A 0 2 1 1 0 - 1 3 0 1 , U S A .
*
* Copyright I B M C o r p . 2 0 0 7
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* Copyright 2 0 1 1 F r e e s c a l e S e m i c o n d u c t o r , I n c .
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*
* Authors : Hollis B l a n c h a r d < h o l l i s b @us.ibm.com>
* /
# include < a s m / p p c _ a s m . h >
# include < a s m / k v m _ a s m . h >
# include < a s m / r e g . h >
# include < a s m / m m u - 4 4 x . h >
# include < a s m / p a g e . h >
# include < a s m / a s m - o f f s e t s . h >
/* The host stack layout: */
# define H O S T _ R 1 0 / * I m p l i e d b y s t w u . * /
# define H O S T _ C A L L E E _ L R 4
# define H O S T _ R U N 8
/ * r2 i s s p e c i a l : i t h o l d s ' c u r r e n t ' , a n d i t m a d e n o n v o l a t i l e i n t h e
* kernel w i t h t h e - f f i x e d - r2 g c c o p t i o n . * /
# define H O S T _ R 2 1 2
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# define H O S T _ C R 1 6
# define H O S T _ N V _ G P R S 2 0
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# define _ _ H O S T _ N V _ G P R ( n ) ( H O S T _ N V _ G P R S + ( ( n - 1 4 ) * 4 ) )
# define H O S T _ N V _ G P R ( n ) _ _ H O S T _ N V _ G P R ( _ _ R E G _ ## n )
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# define H O S T _ M I N _ S T A C K _ S I Z E ( H O S T _ N V _ G P R ( R 3 1 ) + 4 )
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# define H O S T _ S T A C K _ S I Z E ( ( ( H O S T _ M I N _ S T A C K _ S I Z E + 1 5 ) / 1 6 ) * 1 6 ) / * A l i g n . * /
# define H O S T _ S T A C K _ L R ( H O S T _ S T A C K _ S I Z E + 4 ) / * I n c a l l e r s t a c k f r a m e . * /
# define N E E D _ I N S T _ M A S K ( ( 1 < < B O O K E _ I N T E R R U P T _ P R O G R A M ) | \
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( 1 < < BOOKE_ I N T E R R U P T _ D T L B _ M I S S ) | \
( 1 < < BOOKE_ I N T E R R U P T _ D E B U G ) )
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# define N E E D _ D E A R _ M A S K ( ( 1 < < B O O K E _ I N T E R R U P T _ D A T A _ S T O R A G E ) | \
( 1 < < BOOKE_ I N T E R R U P T _ D T L B _ M I S S ) )
# define N E E D _ E S R _ M A S K ( ( 1 < < B O O K E _ I N T E R R U P T _ D A T A _ S T O R A G E ) | \
( 1 < < BOOKE_ I N T E R R U P T _ I N S T _ S T O R A G E ) | \
( 1 < < BOOKE_ I N T E R R U P T _ P R O G R A M ) | \
( 1 < < BOOKE_ I N T E R R U P T _ D T L B _ M I S S ) )
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.macro KVM_HANDLER ivor_ n r s c r a t c h s r r0
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_ GLOBAL( k v m p p c _ h a n d l e r _ \ i v o r _ n r )
/* Get pointer to vcpu and record exit number. */
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mtspr \ s c r a t c h , r4
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mfspr r4 , S P R N _ S P R G _ R V C P U
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stw r3 , V C P U _ G P R ( R 3 ) ( r4 )
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stw r5 , V C P U _ G P R ( R 5 ) ( r4 )
stw r6 , V C P U _ G P R ( R 6 ) ( r4 )
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mfspr r3 , \ s c r a t c h
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mfctr r5
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stw r3 , V C P U _ G P R ( R 4 ) ( r4 )
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stw r5 , V C P U _ C T R ( r4 )
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mfspr r3 , \ s r r0
lis r6 , k v m p p c _ r e s u m e _ h o s t @h
stw r3 , V C P U _ P C ( r4 )
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li r5 , \ i v o r _ n r
ori r6 , r6 , k v m p p c _ r e s u m e _ h o s t @l
mtctr r6
bctr
.endm
_ GLOBAL( k v m p p c _ h a n d l e r s _ s t a r t )
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KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ C R I T I C A L S P R N _ S P R G _ R S C R A T C H _ C R I T S P R N _ C S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ M A C H I N E _ C H E C K S P R N _ S P R G _ R S C R A T C H _ M C S P R N _ M C S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ D A T A _ S T O R A G E S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ I N S T _ S T O R A G E S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ E X T E R N A L S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ A L I G N M E N T S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ P R O G R A M S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ F P _ U N A V A I L S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ S Y S C A L L S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ A P _ U N A V A I L S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ D E C R E M E N T E R S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ F I T S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ W A T C H D O G S P R N _ S P R G _ R S C R A T C H _ C R I T S P R N _ C S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ D T L B _ M I S S S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ I T L B _ M I S S S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ D E B U G S P R N _ S P R G _ R S C R A T C H _ C R I T S P R N _ C S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ S P E _ U N A V A I L S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ S P E _ F P _ D A T A S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
KVM_ H A N D L E R B O O K E _ I N T E R R U P T _ S P E _ F P _ R O U N D S P R N _ S P R G _ R S C R A T C H 0 S P R N _ S R R 0
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_ GLOBAL( k v m p p c _ h a n d l e r _ l e n )
.long kvmppc_handler_1 - kvmppc_ h a n d l e r _ 0
/ * Registers :
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* SPRG_SCRATCH0 : guest r4
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* r4 : vcpu p o i n t e r
* r5 : KVM e x i t n u m b e r
* /
_ GLOBAL( k v m p p c _ r e s u m e _ h o s t )
mfcr r3
stw r3 , V C P U _ C R ( r4 )
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stw r7 , V C P U _ G P R ( R 7 ) ( r4 )
stw r8 , V C P U _ G P R ( R 8 ) ( r4 )
stw r9 , V C P U _ G P R ( R 9 ) ( r4 )
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li r6 , 1
slw r6 , r6 , r5
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# ifdef C O N F I G _ K V M _ E X I T _ T I M I N G
/* save exit time */
1 :
mfspr r7 , S P R N _ T B R U
mfspr r8 , S P R N _ T B R L
mfspr r9 , S P R N _ T B R U
cmpw r9 , r7
bne 1 b
stw r8 , V C P U _ T I M I N G _ E X I T _ T B L ( r4 )
stw r9 , V C P U _ T I M I N G _ E X I T _ T B U ( r4 )
# endif
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/* Save the faulting instruction and all GPRs for emulation. */
andi. r7 , r6 , N E E D _ I N S T _ M A S K
beq . . s k i p _ i n s t _ c o p y
mfspr r9 , S P R N _ S R R 0
mfmsr r8
ori r7 , r8 , M S R _ D S
mtmsr r7
isync
lwz r9 , 0 ( r9 )
mtmsr r8
isync
stw r9 , V C P U _ L A S T _ I N S T ( r4 )
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stw r15 , V C P U _ G P R ( R 1 5 ) ( r4 )
stw r16 , V C P U _ G P R ( R 1 6 ) ( r4 )
stw r17 , V C P U _ G P R ( R 1 7 ) ( r4 )
stw r18 , V C P U _ G P R ( R 1 8 ) ( r4 )
stw r19 , V C P U _ G P R ( R 1 9 ) ( r4 )
stw r20 , V C P U _ G P R ( R 2 0 ) ( r4 )
stw r21 , V C P U _ G P R ( R 2 1 ) ( r4 )
stw r22 , V C P U _ G P R ( R 2 2 ) ( r4 )
stw r23 , V C P U _ G P R ( R 2 3 ) ( r4 )
stw r24 , V C P U _ G P R ( R 2 4 ) ( r4 )
stw r25 , V C P U _ G P R ( R 2 5 ) ( r4 )
stw r26 , V C P U _ G P R ( R 2 6 ) ( r4 )
stw r27 , V C P U _ G P R ( R 2 7 ) ( r4 )
stw r28 , V C P U _ G P R ( R 2 8 ) ( r4 )
stw r29 , V C P U _ G P R ( R 2 9 ) ( r4 )
stw r30 , V C P U _ G P R ( R 3 0 ) ( r4 )
stw r31 , V C P U _ G P R ( R 3 1 ) ( r4 )
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. .skip_inst_copy :
/* Also grab DEAR and ESR before the host can clobber them. */
andi. r7 , r6 , N E E D _ D E A R _ M A S K
beq . . s k i p _ d e a r
mfspr r9 , S P R N _ D E A R
stw r9 , V C P U _ F A U L T _ D E A R ( r4 )
. .skip_dear :
andi. r7 , r6 , N E E D _ E S R _ M A S K
beq . . s k i p _ e s r
mfspr r9 , S P R N _ E S R
stw r9 , V C P U _ F A U L T _ E S R ( r4 )
. .skip_esr :
/* Save remaining volatile guest register state to vcpu. */
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stw r0 , V C P U _ G P R ( R 0 ) ( r4 )
stw r1 , V C P U _ G P R ( R 1 ) ( r4 )
stw r2 , V C P U _ G P R ( R 2 ) ( r4 )
stw r10 , V C P U _ G P R ( R 1 0 ) ( r4 )
stw r11 , V C P U _ G P R ( R 1 1 ) ( r4 )
stw r12 , V C P U _ G P R ( R 1 2 ) ( r4 )
stw r13 , V C P U _ G P R ( R 1 3 ) ( r4 )
stw r14 , V C P U _ G P R ( R 1 4 ) ( r4 ) / * W e n e e d a N V G P R b e l o w . * /
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mflr r3
stw r3 , V C P U _ L R ( r4 )
mfxer r3
stw r3 , V C P U _ X E R ( r4 )
/ * Restore h o s t s t a c k p o i n t e r a n d P I D b e f o r e I V P R , s i n c e t h e h o s t
* exception h a n d l e r s u s e t h e m . * /
lwz r1 , V C P U _ H O S T _ S T A C K ( r4 )
lwz r3 , V C P U _ H O S T _ P I D ( r4 )
mtspr S P R N _ P I D , r3
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# ifdef C O N F I G _ F S L _ B O O K E
/* we cheat and know that Linux doesn't use PID1 which is always 0 */
lis r3 , 0
mtspr S P R N _ P I D 1 , r3
# endif
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/ * Restore h o s t I V P R b e f o r e r e - e n a b l i n g i n t e r r u p t s . W e c h e a t a n d k n o w
* that L i n u x I V P R i s a l w a y s 0 x c00 0 0 0 0 0 . * /
lis r3 , 0 x c00 0
mtspr S P R N _ I V P R , r3
/* Switch to kernel stack and jump to handler. */
LOAD_ R E G _ A D D R ( r3 , k v m p p c _ h a n d l e _ e x i t )
mtctr r3
lwz r3 , H O S T _ R U N ( r1 )
lwz r2 , H O S T _ R 2 ( r1 )
mr r14 , r4 / * S a v e v c p u p o i n t e r . * /
bctrl / * k v m p p c _ h a n d l e _ e x i t ( ) * /
/* Restore vcpu pointer and the nonvolatiles we used. */
mr r4 , r14
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lwz r14 , V C P U _ G P R ( R 1 4 ) ( r4 )
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/* Sometimes instruction emulation must restore complete GPR state. */
andi. r5 , r3 , R E S U M E _ F L A G _ N V
beq . . s k i p _ n v _ l o a d
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lwz r15 , V C P U _ G P R ( R 1 5 ) ( r4 )
lwz r16 , V C P U _ G P R ( R 1 6 ) ( r4 )
lwz r17 , V C P U _ G P R ( R 1 7 ) ( r4 )
lwz r18 , V C P U _ G P R ( R 1 8 ) ( r4 )
lwz r19 , V C P U _ G P R ( R 1 9 ) ( r4 )
lwz r20 , V C P U _ G P R ( R 2 0 ) ( r4 )
lwz r21 , V C P U _ G P R ( R 2 1 ) ( r4 )
lwz r22 , V C P U _ G P R ( R 2 2 ) ( r4 )
lwz r23 , V C P U _ G P R ( R 2 3 ) ( r4 )
lwz r24 , V C P U _ G P R ( R 2 4 ) ( r4 )
lwz r25 , V C P U _ G P R ( R 2 5 ) ( r4 )
lwz r26 , V C P U _ G P R ( R 2 6 ) ( r4 )
lwz r27 , V C P U _ G P R ( R 2 7 ) ( r4 )
lwz r28 , V C P U _ G P R ( R 2 8 ) ( r4 )
lwz r29 , V C P U _ G P R ( R 2 9 ) ( r4 )
lwz r30 , V C P U _ G P R ( R 3 0 ) ( r4 )
lwz r31 , V C P U _ G P R ( R 3 1 ) ( r4 )
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. .skip_nv_load :
/* Should we return to the guest? */
andi. r5 , r3 , R E S U M E _ F L A G _ H O S T
beq l i g h t w e i g h t _ e x i t
srawi r3 , r3 , 2 / * S h i f t - E R R b a c k d o w n . * /
heavyweight_exit :
/* Not returning to guest. */
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# ifdef C O N F I G _ S P E
/* save guest SPEFSCR and load host SPEFSCR */
mfspr r9 , S P R N _ S P E F S C R
stw r9 , V C P U _ S P E F S C R ( r4 )
lwz r9 , V C P U _ H O S T _ S P E F S C R ( r4 )
mtspr S P R N _ S P E F S C R , r9
# endif
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/ * We a l r e a d y s a v e d g u e s t v o l a t i l e r e g i s t e r s t a t e ; now save the
* non- v o l a t i l e s . * /
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stw r15 , V C P U _ G P R ( R 1 5 ) ( r4 )
stw r16 , V C P U _ G P R ( R 1 6 ) ( r4 )
stw r17 , V C P U _ G P R ( R 1 7 ) ( r4 )
stw r18 , V C P U _ G P R ( R 1 8 ) ( r4 )
stw r19 , V C P U _ G P R ( R 1 9 ) ( r4 )
stw r20 , V C P U _ G P R ( R 2 0 ) ( r4 )
stw r21 , V C P U _ G P R ( R 2 1 ) ( r4 )
stw r22 , V C P U _ G P R ( R 2 2 ) ( r4 )
stw r23 , V C P U _ G P R ( R 2 3 ) ( r4 )
stw r24 , V C P U _ G P R ( R 2 4 ) ( r4 )
stw r25 , V C P U _ G P R ( R 2 5 ) ( r4 )
stw r26 , V C P U _ G P R ( R 2 6 ) ( r4 )
stw r27 , V C P U _ G P R ( R 2 7 ) ( r4 )
stw r28 , V C P U _ G P R ( R 2 8 ) ( r4 )
stw r29 , V C P U _ G P R ( R 2 9 ) ( r4 )
stw r30 , V C P U _ G P R ( R 3 0 ) ( r4 )
stw r31 , V C P U _ G P R ( R 3 1 ) ( r4 )
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/* Load host non-volatile register state from host stack. */
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lwz r14 , H O S T _ N V _ G P R ( R 1 4 ) ( r1 )
lwz r15 , H O S T _ N V _ G P R ( R 1 5 ) ( r1 )
lwz r16 , H O S T _ N V _ G P R ( R 1 6 ) ( r1 )
lwz r17 , H O S T _ N V _ G P R ( R 1 7 ) ( r1 )
lwz r18 , H O S T _ N V _ G P R ( R 1 8 ) ( r1 )
lwz r19 , H O S T _ N V _ G P R ( R 1 9 ) ( r1 )
lwz r20 , H O S T _ N V _ G P R ( R 2 0 ) ( r1 )
lwz r21 , H O S T _ N V _ G P R ( R 2 1 ) ( r1 )
lwz r22 , H O S T _ N V _ G P R ( R 2 2 ) ( r1 )
lwz r23 , H O S T _ N V _ G P R ( R 2 3 ) ( r1 )
lwz r24 , H O S T _ N V _ G P R ( R 2 4 ) ( r1 )
lwz r25 , H O S T _ N V _ G P R ( R 2 5 ) ( r1 )
lwz r26 , H O S T _ N V _ G P R ( R 2 6 ) ( r1 )
lwz r27 , H O S T _ N V _ G P R ( R 2 7 ) ( r1 )
lwz r28 , H O S T _ N V _ G P R ( R 2 8 ) ( r1 )
lwz r29 , H O S T _ N V _ G P R ( R 2 9 ) ( r1 )
lwz r30 , H O S T _ N V _ G P R ( R 3 0 ) ( r1 )
lwz r31 , H O S T _ N V _ G P R ( R 3 1 ) ( r1 )
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/* Return to kvm_vcpu_run(). */
lwz r4 , H O S T _ S T A C K _ L R ( r1 )
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lwz r5 , H O S T _ C R ( r1 )
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addi r1 , r1 , H O S T _ S T A C K _ S I Z E
mtlr r4
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mtcr r5
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/* r3 still contains the return code from kvmppc_handle_exit(). */
blr
/ * Registers :
* r3 : kvm_ r u n p o i n t e r
* r4 : vcpu p o i n t e r
* /
_ GLOBAL( _ _ k v m p p c _ v c p u _ r u n )
stwu r1 , - H O S T _ S T A C K _ S I Z E ( r1 )
stw r1 , V C P U _ H O S T _ S T A C K ( r4 ) / * S a v e s t a c k p o i n t e r t o v c p u . * /
/* Save host state to stack. */
stw r3 , H O S T _ R U N ( r1 )
mflr r3
stw r3 , H O S T _ S T A C K _ L R ( r1 )
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mfcr r5
stw r5 , H O S T _ C R ( r1 )
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/* Save host non-volatile register state to stack. */
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stw r14 , H O S T _ N V _ G P R ( R 1 4 ) ( r1 )
stw r15 , H O S T _ N V _ G P R ( R 1 5 ) ( r1 )
stw r16 , H O S T _ N V _ G P R ( R 1 6 ) ( r1 )
stw r17 , H O S T _ N V _ G P R ( R 1 7 ) ( r1 )
stw r18 , H O S T _ N V _ G P R ( R 1 8 ) ( r1 )
stw r19 , H O S T _ N V _ G P R ( R 1 9 ) ( r1 )
stw r20 , H O S T _ N V _ G P R ( R 2 0 ) ( r1 )
stw r21 , H O S T _ N V _ G P R ( R 2 1 ) ( r1 )
stw r22 , H O S T _ N V _ G P R ( R 2 2 ) ( r1 )
stw r23 , H O S T _ N V _ G P R ( R 2 3 ) ( r1 )
stw r24 , H O S T _ N V _ G P R ( R 2 4 ) ( r1 )
stw r25 , H O S T _ N V _ G P R ( R 2 5 ) ( r1 )
stw r26 , H O S T _ N V _ G P R ( R 2 6 ) ( r1 )
stw r27 , H O S T _ N V _ G P R ( R 2 7 ) ( r1 )
stw r28 , H O S T _ N V _ G P R ( R 2 8 ) ( r1 )
stw r29 , H O S T _ N V _ G P R ( R 2 9 ) ( r1 )
stw r30 , H O S T _ N V _ G P R ( R 3 0 ) ( r1 )
stw r31 , H O S T _ N V _ G P R ( R 3 1 ) ( r1 )
2008-04-17 08:28:09 +04:00
/* Load guest non-volatiles. */
2012-06-25 17:33:10 +04:00
lwz r14 , V C P U _ G P R ( R 1 4 ) ( r4 )
lwz r15 , V C P U _ G P R ( R 1 5 ) ( r4 )
lwz r16 , V C P U _ G P R ( R 1 6 ) ( r4 )
lwz r17 , V C P U _ G P R ( R 1 7 ) ( r4 )
lwz r18 , V C P U _ G P R ( R 1 8 ) ( r4 )
lwz r19 , V C P U _ G P R ( R 1 9 ) ( r4 )
lwz r20 , V C P U _ G P R ( R 2 0 ) ( r4 )
lwz r21 , V C P U _ G P R ( R 2 1 ) ( r4 )
lwz r22 , V C P U _ G P R ( R 2 2 ) ( r4 )
lwz r23 , V C P U _ G P R ( R 2 3 ) ( r4 )
lwz r24 , V C P U _ G P R ( R 2 4 ) ( r4 )
lwz r25 , V C P U _ G P R ( R 2 5 ) ( r4 )
lwz r26 , V C P U _ G P R ( R 2 6 ) ( r4 )
lwz r27 , V C P U _ G P R ( R 2 7 ) ( r4 )
lwz r28 , V C P U _ G P R ( R 2 8 ) ( r4 )
lwz r29 , V C P U _ G P R ( R 2 9 ) ( r4 )
lwz r30 , V C P U _ G P R ( R 3 0 ) ( r4 )
lwz r31 , V C P U _ G P R ( R 3 1 ) ( r4 )
2008-04-17 08:28:09 +04:00
2011-06-15 03:34:31 +04:00
# ifdef C O N F I G _ S P E
/* save host SPEFSCR and load guest SPEFSCR */
mfspr r3 , S P R N _ S P E F S C R
stw r3 , V C P U _ H O S T _ S P E F S C R ( r4 )
lwz r3 , V C P U _ S P E F S C R ( r4 )
mtspr S P R N _ S P E F S C R , r3
# endif
2008-04-17 08:28:09 +04:00
lightweight_exit :
stw r2 , H O S T _ R 2 ( r1 )
mfspr r3 , S P R N _ P I D
stw r3 , V C P U _ H O S T _ P I D ( r4 )
2008-07-25 22:54:53 +04:00
lwz r3 , V C P U _ S H A D O W _ P I D ( r4 )
2008-04-17 08:28:09 +04:00
mtspr S P R N _ P I D , r3
2011-06-15 03:35:14 +04:00
# ifdef C O N F I G _ F S L _ B O O K E
lwz r3 , V C P U _ S H A D O W _ P I D 1 ( r4 )
mtspr S P R N _ P I D 1 , r3
# endif
2009-01-04 01:23:09 +03:00
# ifdef C O N F I G _ 4 4 x
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iccci 0 , 0 / * X X X h a c k * /
2009-01-04 01:23:09 +03:00
# endif
2008-04-17 08:28:09 +04:00
/* Load some guest volatiles. */
2012-06-25 17:33:10 +04:00
lwz r0 , V C P U _ G P R ( R 0 ) ( r4 )
lwz r2 , V C P U _ G P R ( R 2 ) ( r4 )
lwz r9 , V C P U _ G P R ( R 9 ) ( r4 )
lwz r10 , V C P U _ G P R ( R 1 0 ) ( r4 )
lwz r11 , V C P U _ G P R ( R 1 1 ) ( r4 )
lwz r12 , V C P U _ G P R ( R 1 2 ) ( r4 )
lwz r13 , V C P U _ G P R ( R 1 3 ) ( r4 )
2008-04-17 08:28:09 +04:00
lwz r3 , V C P U _ L R ( r4 )
mtlr r3
lwz r3 , V C P U _ X E R ( r4 )
mtxer r3
/ * Switch t h e I V P R . X X X I f w e t a k e a T L B m i s s a f t e r t h i s w e ' r e s c r e w e d ,
* so h o w d o w e m a k e s u r e v c p u w o n ' t f a u l t ? * /
lis r8 , k v m p p c _ b o o k e _ h a n d l e r s @ha
lwz r8 , k v m p p c _ b o o k e _ h a n d l e r s @l(r8)
mtspr S P R N _ I V P R , r8
/* Save vcpu pointer for the exception handlers. */
2009-07-15 00:52:54 +04:00
mtspr S P R N _ S P R G _ W V C P U , r4
2008-04-17 08:28:09 +04:00
KVM: PPC: Paravirtualize SPRG4-7, ESR, PIR, MASn
This allows additional registers to be accessed by the guest
in PR-mode KVM without trapping.
SPRG4-7 are readable from userspace. On booke, KVM will sync
these registers when it enters the guest, so that accesses from
guest userspace will work. The guest kernel, OTOH, must consistently
use either the real registers or the shared area between exits. This
also applies to the already-paravirted SPRG3.
On non-booke, it's not clear to what extent SPRG4-7 are supported
(they're not architected for book3s, but exist on at least some classic
chips). They are copied in the get/set regs ioctls, but I do not see any
non-booke emulation. I also do not see any syncing with real registers
(in PR-mode) including the user-readable SPRG3. This patch should not
make that situation any worse.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-09 04:23:30 +04:00
lwz r5 , V C P U _ S H A R E D ( r4 )
2008-04-17 08:28:09 +04:00
/ * Can' t s w i t c h t h e s t a c k p o i n t e r u n t i l a f t e r I V P R i s s w i t c h e d ,
* because h o s t i n t e r r u p t h a n d l e r s w o u l d g e t c o n f u s e d . * /
2012-06-25 17:33:10 +04:00
lwz r1 , V C P U _ G P R ( R 1 ) ( r4 )
2008-04-17 08:28:09 +04:00
KVM: PPC: Paravirtualize SPRG4-7, ESR, PIR, MASn
This allows additional registers to be accessed by the guest
in PR-mode KVM without trapping.
SPRG4-7 are readable from userspace. On booke, KVM will sync
these registers when it enters the guest, so that accesses from
guest userspace will work. The guest kernel, OTOH, must consistently
use either the real registers or the shared area between exits. This
also applies to the already-paravirted SPRG3.
On non-booke, it's not clear to what extent SPRG4-7 are supported
(they're not architected for book3s, but exist on at least some classic
chips). They are copied in the get/set regs ioctls, but I do not see any
non-booke emulation. I also do not see any syncing with real registers
(in PR-mode) including the user-readable SPRG3. This patch should not
make that situation any worse.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-09 04:23:30 +04:00
/ *
* Host i n t e r r u p t h a n d l e r s m a y h a v e c l o b b e r e d t h e s e
* guest- r e a d a b l e S P R G s , o r t h e g u e s t k e r n e l m a y h a v e
* written d i r e c t l y t o t h e s h a r e d a r e a , s o w e
* need t o r e l o a d t h e m h e r e w i t h t h e g u e s t ' s v a l u e s .
* /
2012-04-25 05:27:34 +04:00
PPC_ L D ( r3 , V C P U _ S H A R E D _ S P R G 4 , r5 )
2009-07-15 00:52:54 +04:00
mtspr S P R N _ S P R G 4 W , r3
2012-04-25 05:27:34 +04:00
PPC_ L D ( r3 , V C P U _ S H A R E D _ S P R G 5 , r5 )
2009-07-15 00:52:54 +04:00
mtspr S P R N _ S P R G 5 W , r3
2012-04-25 05:27:34 +04:00
PPC_ L D ( r3 , V C P U _ S H A R E D _ S P R G 6 , r5 )
2009-07-15 00:52:54 +04:00
mtspr S P R N _ S P R G 6 W , r3
2012-04-25 05:27:34 +04:00
PPC_ L D ( r3 , V C P U _ S H A R E D _ S P R G 7 , r5 )
2009-07-15 00:52:54 +04:00
mtspr S P R N _ S P R G 7 W , r3
2008-04-17 08:28:09 +04:00
2008-12-03 00:51:57 +03:00
# ifdef C O N F I G _ K V M _ E X I T _ T I M I N G
/* save enter time */
1 :
mfspr r6 , S P R N _ T B R U
mfspr r7 , S P R N _ T B R L
mfspr r8 , S P R N _ T B R U
cmpw r8 , r6
bne 1 b
stw r7 , V C P U _ T I M I N G _ L A S T _ E N T E R _ T B L ( r4 )
stw r8 , V C P U _ T I M I N G _ L A S T _ E N T E R _ T B U ( r4 )
# endif
2008-04-17 08:28:09 +04:00
/* Finish loading guest volatiles and jump to guest. */
lwz r3 , V C P U _ C T R ( r4 )
2011-06-15 03:34:29 +04:00
lwz r5 , V C P U _ C R ( r4 )
lwz r6 , V C P U _ P C ( r4 )
lwz r7 , V C P U _ S H A D O W _ M S R ( r4 )
2008-04-17 08:28:09 +04:00
mtctr r3
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mtcr r5
mtsrr0 r6
mtsrr1 r7
2012-06-25 17:33:10 +04:00
lwz r5 , V C P U _ G P R ( R 5 ) ( r4 )
lwz r6 , V C P U _ G P R ( R 6 ) ( r4 )
lwz r7 , V C P U _ G P R ( R 7 ) ( r4 )
lwz r8 , V C P U _ G P R ( R 8 ) ( r4 )
2008-07-25 22:54:49 +04:00
/ * Clear a n y d e b u g e v e n t s w h i c h o c c u r r e d s i n c e w e d i s a b l e d M S R [ D E ] .
* XXX T h i s g i v e s u s a 3 - i n s t r u c t i o n w i n d o w i n w h i c h a b r e a k p o i n t
* intended f o r g u e s t c o n t e x t c o u l d f i r e i n t h e h o s t i n s t e a d . * /
lis r3 , 0 x f f f f
ori r3 , r3 , 0 x f f f f
mtspr S P R N _ D B S R , r3
2012-06-25 17:33:10 +04:00
lwz r3 , V C P U _ G P R ( R 3 ) ( r4 )
lwz r4 , V C P U _ G P R ( R 4 ) ( r4 )
2008-04-17 08:28:09 +04:00
rfi
2011-06-15 03:34:31 +04:00
# ifdef C O N F I G _ S P E
_ GLOBAL( k v m p p c _ s a v e _ g u e s t _ s p e )
cmpi 0 ,r3 ,0
beqlr-
SAVE_ 3 2 E V R S ( 0 , r4 , r3 , V C P U _ E V R )
evxor e v r6 , e v r6 , e v r6
evmwumiaa e v r6 , e v r6 , e v r6
li r4 ,V C P U _ A C C
evstddx e v r6 , r4 , r3 / * s a v e a c c * /
blr
_ GLOBAL( k v m p p c _ l o a d _ g u e s t _ s p e )
cmpi 0 ,r3 ,0
beqlr-
li r4 ,V C P U _ A C C
evlddx e v r6 ,r4 ,r3
evmra e v r6 ,e v r6 / * l o a d a c c * /
REST_ 3 2 E V R S ( 0 , r4 , r3 , V C P U _ E V R )
blr
# endif
