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/*
* This file contains common code that is intended to be used across
* boards so that it ' s not replicated .
*
* Copyright ( C ) 2011 Xilinx
*
* This software is licensed under the terms of the GNU General Public
* License version 2 , as published by the Free Software Foundation , and
* may be copied , distributed , and modified under those terms .
*
* This program is distributed in the hope that it will be useful ,
* but WITHOUT ANY WARRANTY ; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE . See the
* GNU General Public License for more details .
*/
# include <linux/init.h>
# include <linux/kernel.h>
# include <linux/cpumask.h>
# include <linux/platform_device.h>
# include <linux/clk.h>
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# include <linux/clk/zynq.h>
# include <linux/of_address.h>
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# include <linux/of_irq.h>
# include <linux/of_platform.h>
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# include <linux/of.h>
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# include <linux/irqchip.h>
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# include <asm/mach/arch.h>
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# include <asm/mach/map.h>
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# include <asm/mach/time.h>
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# include <asm/mach-types.h>
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# include <asm/page.h>
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# include <asm/pgtable.h>
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# include <asm/hardware/cache-l2x0.h>
# include "common.h"
static struct of_device_id zynq_of_bus_ids [ ] __initdata = {
{ . compatible = " simple-bus " , } ,
{ }
} ;
/**
* xilinx_init_machine ( ) - System specific initialization , intended to be
* called from board specific initialization .
*/
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static void __init xilinx_init_machine ( void )
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{
/*
* 64 KB way size , 8 - way associativity , parity disabled
*/
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l2x0_of_init ( 0x02060000 , 0xF0F0FFFF ) ;
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of_platform_bus_probe ( NULL , zynq_of_bus_ids , NULL ) ;
}
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# define SCU_PERIPH_PHYS 0xF8F00000
# define SCU_PERIPH_SIZE SZ_8K
# define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
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static struct map_desc scu_desc __initdata = {
. virtual = SCU_PERIPH_VIRT ,
. pfn = __phys_to_pfn ( SCU_PERIPH_PHYS ) ,
. length = SCU_PERIPH_SIZE ,
. type = MT_DEVICE ,
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} ;
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static void __init xilinx_zynq_timer_init ( void )
{
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struct device_node * np ;
void __iomem * slcr ;
np = of_find_compatible_node ( NULL , NULL , " xlnx,zynq-slcr " ) ;
slcr = of_iomap ( np , 0 ) ;
WARN_ON ( ! slcr ) ;
xilinx_zynq_clocks_init ( slcr ) ;
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xttcps_timer_init ( ) ;
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}
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/**
* xilinx_map_io ( ) - Create memory mappings needed for early I / O .
*/
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static void __init xilinx_map_io ( void )
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{
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debug_ll_io_init ( ) ;
iotable_init ( & scu_desc , 1 ) ;
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}
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static const char * xilinx_dt_match [ ] = {
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" xlnx,zynq-zc702 " ,
" xlnx,zynq-7000 " ,
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NULL
} ;
MACHINE_START ( XILINX_EP107 , " Xilinx Zynq Platform " )
. map_io = xilinx_map_io ,
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. init_irq = irqchip_init ,
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. init_machine = xilinx_init_machine ,
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. init_time = xilinx_zynq_timer_init ,
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. dt_compat = xilinx_dt_match ,
MACHINE_END