81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* RISC-V Specific Low-Level ACPI Boot Support
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*
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* Copyright (C) 2013-2014, Linaro Ltd.
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* Author: Al Stone <al.stone@linaro.org>
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* Author: Graeme Gregory <graeme.gregory@linaro.org>
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* Author: Hanjun Guo <hanjun.guo@linaro.org>
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* Author: Tomasz Nowicki <tomasz.nowicki@linaro.org>
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* Author: Naresh Bhat <naresh.bhat@linaro.org>
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*
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* Copyright (C) 2021-2023, Ventana Micro Systems Inc.
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* Author: Sunil V L <sunilvl@ventanamicro.com>
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*/
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#include <linux/acpi.h>
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#include <linux/io.h>
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#include <linux/pci.h>
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int acpi_noirq = 1; /* skip ACPI IRQ initialization */
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int acpi_disabled = 1;
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EXPORT_SYMBOL(acpi_disabled);
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int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */
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EXPORT_SYMBOL(acpi_pci_disabled);
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/*
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* __acpi_map_table() will be called before paging_init(), so early_ioremap()
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* or early_memremap() should be called here to for ACPI table mapping.
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*/
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void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size)
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{
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if (!size)
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return NULL;
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return early_memremap(phys, size);
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}
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void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
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{
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if (!map || !size)
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return;
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early_memunmap(map, size);
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}
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void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
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{
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return memremap(phys, size, MEMREMAP_WB);
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}
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#ifdef CONFIG_PCI
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/*
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* These interfaces are defined just to enable building ACPI core.
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* TODO: Update it with actual implementation when external interrupt
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* controller support is added in RISC-V ACPI.
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*/
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int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 *val)
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{
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 val)
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{
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
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{
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return -1;
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}
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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return NULL;
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}
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#endif /* CONFIG_PCI */
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