2006-12-07 09:51:35 -08:00
/ *
* arch/ i a64 / k e r n e l / r e l o c a t e _ k e r n e l . S
*
* Relocate k e x e c ' a b l e k e r n e l a n d s t a r t i t
*
* Copyright ( C ) 2 0 0 5 H e w l e t t - P a c k a r d D e v e l o p m e n t C o m p a n y , L . P .
* Copyright ( C ) 2 0 0 5 K h a l i d A z i z < k h a l i d . a z i z @hp.com>
* Copyright ( C ) 2 0 0 5 I n t e l C o r p , Z o u N a n h a i < n a n h a i . z o u @intel.com>
*
* This s o u r c e c o d e i s l i c e n s e d u n d e r t h e G N U G e n e r a l P u b l i c L i c e n s e ,
* Version 2 . S e e t h e f i l e C O P Y I N G f o r m o r e d e t a i l s .
* /
# include < a s m / a s m m a c r o . h >
# include < a s m / k r e g s . h >
# include < a s m / p a g e . h >
# include < a s m / p g t a b l e . h >
# include < a s m / m c a _ a s m . h >
/ * Must b e r e l o c a t a b l e P I C c o d e c a l l a b l e a s a C f u n c t i o n
* /
GLOBAL_ E N T R Y ( r e l o c a t e _ n e w _ k e r n e l )
.prologue
alloc r31 =ar . p f s ,4 ,0 ,0 ,0
.body
.reloc_entry :
{
rsm p s r . i | p s r . i c
mov r2 =ip
}
;;
{
flushrs / / m u s t b e f i r s t i n s n i n g r o u p
srlz. i
}
;;
dep r2 =0 ,r2 ,6 1 ,3 / / t o p h y s i c a l a d d r e s s
;;
/ / first s w i t c h t o p h y s i c a l m o d e
add r3 =1f - . r e l o c _ e n t r y , r2
movl r16 = I A 6 4 _ P S R _ A C | I A 6 4 _ P S R _ B N | I A 6 4 _ P S R _ I C
mov a r . r s c =0 / / p u t R S E i n e n f o r c e d l a z y m o d e
;;
add s p = ( m e m o r y _ s t a c k _ e n d - 1 6 - . r e l o c _ e n t r y ) ,r2
add r8 = ( r e g i s t e r _ s t a c k - . r e l o c _ e n t r y ) ,r2
;;
mov r18 =ar . r n a t
mov a r . b s p s t o r e =r8
;;
mov c r . i p s r =r16
mov c r . i i p =r3
mov c r . i f s =r0
srlz. i
;;
mov a r . r n a t =r18
[IA64] kdump: Mask INIT first in panic-kdump path
Summary:
Asserting INIT might block kdump if the system is already going to
start kdump via panic.
Description:
INIT can interrupt anywhere in panic path, so it can interrupt in
middle of kdump kicked by panic. Therefore there is a race if kdump
is kicked concurrently, via Panic and via INIT.
INIT could fail to invoke kdump if the system is already going to
start kdump via panic. It could not restart kdump from INIT handler
if some of cpus are already playing dead with INIT masked. It also
means that INIT could block kdump's progress if no monarch is entered
in the INIT rendezvous.
Panic+INIT is a rare, but possible situation since it can be assumed
that the kernel or an internal agent decides to panic the unstable
system while another external agent decides to send an INIT to the
system at same time.
How to reproduce:
Assert INIT just after panic, before all other cpus have frozen
Expected results:
continue kdump invoked by panic, or restart kdump from INIT
Actual results:
might be hang, crashdump not retrieved
Proposed Fix:
This patch masks INIT first in panic path to take the initiative on
kdump, and reuse atomic value kdump_in_progress to make sure there is
only one initiator of kdump. All INITs asserted later should be used
only for freezing all other cpus.
This mask will be removed soon by rfi in relocate_kernel.S, before jump
into kdump kernel, after all cpus are frozen and no-op INIT handler is
registered. So if INIT was in the interval while it is masked, it will
pend on the system and will received just after the rfi, and handled by
the no-op handler.
If there was a MCA event while psr.mc is 1, in theory the event will
pend on the system and will received just after the rfi same as above.
MCA handler is unregistered here at the time, so received MCA will not
reach to OS_MCA and will result in warmboot by SAL.
Note that codes in this masked interval are relatively simpler than
that in MCA/INIT handler which also executed with the mask. So it can
be said that probability of error in this interval is supposed not so
higher than that in MCA/INIT handler.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Haren Myneni <hbabu@us.ibm.com>
Cc: kexec@lists.infradead.org
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2009-08-06 14:51:57 -07:00
rfi / / n o t e : t h i s u n m a s k M C A / I N I T ( p s r . m c )
2006-12-07 09:51:35 -08:00
;;
1 :
/ / physical m o d e c o d e b e g i n
mov b6 =in1
dep r28 =0 ,i n 2 ,6 1 ,3 / / t o p h y s i c a l a d d r e s s
/ / purge a l l T C e n t r i e s
# define O ( m e m b e r ) I A 6 4 _ C P U I N F O _ ## m e m b e r # # _ O F F S E T
2009-10-29 22:34:14 +09:00
GET_ T H I S _ P A D D R ( r2 , i a64 _ c p u _ i n f o ) / / l o a d p h y s a d d r o f c p u _ i n f o i n t o r2
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;;
addl r17 =O ( P T C E _ S T R I D E ) ,r2
addl r2 =O ( P T C E _ B A S E ) ,r2
;;
ld8 r18 = [ r2 ] ,( O ( P T C E _ C O U N T ) - O ( P T C E _ B A S E ) ) ;; // r18=ptce_base
ld4 r19 = [ r2 ] ,4 / / r19 =ptce_count [ 0 ]
ld4 r21 = [ r17 ] ,4 / / r21 =ptce_stride [ 0 ]
;;
ld4 r20 = [ r2 ] / / r20 =ptce_count [ 1 ]
ld4 r22 = [ r17 ] / / r22 =ptce_stride [ 1 ]
mov r24 =r0
;;
adds r20 = - 1 ,r20
;;
# undef O
2 :
cmp. l t u p6 ,p7 =r24 ,r19
( p7 ) b r . c o n d . d p n t . f e w 4 f
mov a r . l c =r20
3 :
ptc. e r18
;;
add r18 =r22 ,r18
br. c l o o p . s p t k . f e w 3 b
;;
add r18 =r21 ,r18
add r24 =1 ,r24
;;
br. s p t k . f e w 2 b
4 :
srlz. i
;;
2007-05-08 10:00:28 -07:00
/ / purge T R e n t r y f o r k e r n e l t e x t a n d d a t a
2006-12-07 09:51:35 -08:00
movl r16 =KERNEL_START
mov r18 =KERNEL_TR_PAGE_SHIFT < < 2
;;
ptr. i r16 , r18
ptr. d r16 , r18
;;
srlz. i
;;
/ / purge T R e n t r y f o r p a l c o d e
mov r16 =in3
mov r18 =IA64_GRANULE_SHIFT < < 2
;;
ptr. i r16 ,r18
;;
srlz. i
;;
/ / purge T R e n t r y f o r s t a c k
mov r16 =IA64_KR ( C U R R E N T _ S T A C K )
;;
shl r16 =r16 ,I A 6 4 _ G R A N U L E _ S H I F T
movl r19 =PAGE_OFFSET
;;
add r16 =r19 ,r16
mov r18 =IA64_GRANULE_SHIFT < < 2
;;
ptr. d r16 ,r18
;;
srlz. i
;;
/ / copy s e g m e n t s
movl r16 =PAGE_MASK
mov r30 =in0 / / i n 0 i s p a g e _ l i s t
br. s p t k . f e w . d e s t _ p a g e
;;
.loop :
ld8 r30 = [ i n 0 ] , 8 ;;
.dest_page :
tbit. z p0 , p6 =r30 , 0 ;; // 0x1 dest page
( p6 ) a n d r17 =r30 , r16
( p6 ) b r . c o n d . s p t k . f e w . l o o p ;;
tbit. z p0 , p6 =r30 , 1 ;; // 0x2 indirect page
( p6 ) a n d i n 0 =r30 , r16
( p6 ) b r . c o n d . s p t k . f e w . l o o p ;;
tbit. z p0 , p6 =r30 , 2 ;; // 0x4 end flag
( p6 ) b r . c o n d . s p t k . f e w . e n d _ l o o p ;;
tbit. z p6 , p0 =r30 , 3 ;; // 0x8 source page
( p6 ) b r . c o n d . s p t k . f e w . l o o p
and r18 =r30 , r16
/ / simple c o p y p a g e , m a y o p t i m i z e l a t e r
movl r14 =PAGE_SIZE / 8 - 1 ;;
mov a r . l c =r14 ;;
1 :
ld8 r14 = [ r18 ] , 8 ;;
st8 [ r17 ] =r14 ;;
fc. i r17
add r17 =8 , r17
br. c t o p . s p t k . f e w 1 b
br. s p t k . f e w . l o o p
;;
.end_loop :
sync. i / / f o r f c . i
;;
srlz. i
;;
srlz. d
;;
br. c a l l . s p t k . m a n y b0 =b6 ;;
.align 32
memory_stack :
.fill 8 1 9 2 , 1 , 0
memory_stack_end :
register_stack :
.fill 8 1 9 2 , 1 , 0
register_stack_end :
relocate_new_kernel_end :
END( r e l o c a t e _ n e w _ k e r n e l )
.global relocate_new_kernel_size
relocate_new_kernel_size :
data8 r e l o c a t e _ n e w _ k e r n e l _ e n d - r e l o c a t e _ n e w _ k e r n e l
GLOBAL_ E N T R Y ( i a64 _ d u m p _ c p u _ r e g s )
.prologue
alloc l o c0 =ar . p f s ,1 ,2 ,0 ,0
.body
mov a r . r s c =0 / / p u t R S E i n e n f o r c e d l a z y m o d e
add l o c1 =4 * 8 , i n 0 / / s a v e r4 a n d r5 f i r s t
;;
{
flushrs / / f l u s h d i r t y r e g s t o b a c k i n g s t o r e
srlz. i
}
st8 [ l o c1 ] =r4 , 8
;;
st8 [ l o c1 ] =r5 , 8
;;
add l o c1 =32 * 8 , i n 0
mov r4 =ar . r n a t
;;
st8 [ i n 0 ] =r0 , 8 / / r0
st8 [ l o c1 ] =r4 , 8 / / r n a t
mov r5 =pr
;;
st8 [ i n 0 ] =r1 , 8 / / r1
st8 [ l o c1 ] =r5 , 8 / / p r
mov r4 =b0
;;
st8 [ i n 0 ] =r2 , 8 / / r2
st8 [ l o c1 ] =r4 , 8 / / b0
mov r5 =b1 ;
;;
st8 [ i n 0 ] =r3 , 2 4 / / r3
st8 [ l o c1 ] =r5 , 8 / / b1
mov r4 =b2
;;
st8 [ i n 0 ] =r6 , 8 / / r6
st8 [ l o c1 ] =r4 , 8 / / b2
mov r5 =b3
;;
st8 [ i n 0 ] =r7 , 8 / / r7
st8 [ l o c1 ] =r5 , 8 / / b3
mov r4 =b4
;;
st8 [ i n 0 ] =r8 , 8 / / r8
st8 [ l o c1 ] =r4 , 8 / / b4
mov r5 =b5
;;
st8 [ i n 0 ] =r9 , 8 / / r9
st8 [ l o c1 ] =r5 , 8 / / b5
mov r4 =b6
;;
st8 [ i n 0 ] =r10 , 8 / / r10
st8 [ l o c1 ] =r5 , 8 / / b6
mov r5 =b7
;;
st8 [ i n 0 ] =r11 , 8 / / r11
st8 [ l o c1 ] =r5 , 8 / / b7
mov r4 =b0
;;
st8 [ i n 0 ] =r12 , 8 / / r12
st8 [ l o c1 ] =r4 , 8 / / i p
mov r5 =loc0
;;
st8 [ i n 0 ] =r13 , 8 / / r13
extr. u r5 =r5 , 0 , 3 8 / / a r . p f s . p f m
mov r4 =r0 / / u s e r m a s k
;;
st8 [ i n 0 ] =r14 , 8 / / r14
st8 [ l o c1 ] =r5 , 8 / / c f m
;;
st8 [ i n 0 ] =r15 , 8 / / r15
st8 [ l o c1 ] =r4 , 8 / / u s e r m a s k
mov r5 =ar . r s c
;;
st8 [ i n 0 ] =r16 , 8 / / r16
st8 [ l o c1 ] =r5 , 8 / / a r . r s c
mov r4 =ar . b s p
;;
st8 [ i n 0 ] =r17 , 8 / / r17
st8 [ l o c1 ] =r4 , 8 / / a r . b s p
mov r5 =ar . b s p s t o r e
;;
st8 [ i n 0 ] =r18 , 8 / / r18
st8 [ l o c1 ] =r5 , 8 / / a r . b s p s t o r e
mov r4 =ar . r n a t
;;
st8 [ i n 0 ] =r19 , 8 / / r19
st8 [ l o c1 ] =r4 , 8 / / a r . r n a t
mov r5 =ar . c c v
;;
st8 [ i n 0 ] =r20 , 8 / / r20
st8 [ l o c1 ] =r5 , 8 / / a r . c c v
mov r4 =ar . u n a t
;;
st8 [ i n 0 ] =r21 , 8 / / r21
st8 [ l o c1 ] =r4 , 8 / / a r . u n a t
mov r5 = a r . f p s r
;;
st8 [ i n 0 ] =r22 , 8 / / r22
st8 [ l o c1 ] =r5 , 8 / / a r . f p s r
mov r4 = a r . u n a t
;;
st8 [ i n 0 ] =r23 , 8 / / r23
st8 [ l o c1 ] =r4 , 8 / / u n a t
mov r5 = a r . f p s r
;;
st8 [ i n 0 ] =r24 , 8 / / r24
st8 [ l o c1 ] =r5 , 8 / / f p s r
mov r4 = a r . p f s
;;
st8 [ i n 0 ] =r25 , 8 / / r25
st8 [ l o c1 ] =r4 , 8 / / a r . p f s
mov r5 = a r . l c
;;
st8 [ i n 0 ] =r26 , 8 / / r26
st8 [ l o c1 ] =r5 , 8 / / a r . l c
mov r4 = a r . e c
;;
st8 [ i n 0 ] =r27 , 8 / / r27
st8 [ l o c1 ] =r4 , 8 / / a r . e c
mov r5 = a r . c s d
;;
st8 [ i n 0 ] =r28 , 8 / / r28
st8 [ l o c1 ] =r5 , 8 / / a r . c s d
mov r4 = a r . s s d
;;
st8 [ i n 0 ] =r29 , 8 / / r29
st8 [ l o c1 ] =r4 , 8 / / a r . s s d
;;
st8 [ i n 0 ] =r30 , 8 / / r30
;;
st8 [ i n 0 ] =r31 , 8 / / r31
mov a r . p f s =loc0
;;
br. r e t . s p t k . m a n y r p
END( i a64 _ d u m p _ c p u _ r e g s )
