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#
# Renesas SH and SH Mobile PINCTRL drivers
#
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if ARCH_RENESAS || SUPERH
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config PINCTRL_SH_PFC
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select PINMUX
select PINCONF
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select GENERIC_PINCONF
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def_bool y
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help
This enables pin control drivers for SH and SH Mobile platforms
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config PINCTRL_SH_PFC_GPIO
select GPIOLIB
select PINCTRL_SH_PFC
bool
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help
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This enables pin control and GPIO drivers for SH/SH Mobile platforms
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config PINCTRL_PFC_EMEV2
def_bool y
depends on ARCH_EMEV2
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A73A4
def_bool y
depends on ARCH_R8A73A4
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_R8A7740
def_bool y
depends on ARCH_R8A7740
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_R8A7743
def_bool y
depends on ARCH_R8A7743
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7778
def_bool y
depends on ARCH_R8A7778
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7779
def_bool y
depends on ARCH_R8A7779
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7790
def_bool y
depends on ARCH_R8A7790
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7791
def_bool y
depends on ARCH_R8A7791
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7792
def_bool y
depends on ARCH_R8A7792
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7793
def_bool y
depends on ARCH_R8A7793
select PINCTRL_SH_PFC
pinctrl: sh-pfc: add R8A7794 PFC support
Add PFC support for the R8A7794 SoC including pin groups for some
on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF...
Sergei: squashed together several patches, fixed the MLB_CLK typo,
added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin
group names, removed stray new line and fixed typos in the comments
in the pinmux_config_regs[] initializer, removed the platform device
ID, took into account limited number of signals in the GPIO1/5/6
controllers, added reasonable and removed unreasonable
copyrights, modified the bindings document, renamed, added changelog.
Changes in version 5:
- resolved rejects, refreshed the patch;
- added Laurent Pinchart's ACK.
Changes in version 4:
- reused the PORT_GP_26() macro to #define PORT_GP_28().
Changes in version 3:
- removed the platform device ID;
- added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the
CPU_ALL_PORT() macro.
Changes in version 2:
- rebased the patch.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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config PINCTRL_PFC_R8A7794
def_bool y
depends on ARCH_R8A7794
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7795
def_bool y
depends on ARCH_R8A7795
select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7796
def_bool y
depends on ARCH_R8A7796
select PINCTRL_SH_PFC
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config PINCTRL_PFC_SH7203
def_bool y
depends on CPU_SUBTYPE_SH7203
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7264
def_bool y
depends on CPU_SUBTYPE_SH7264
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7269
def_bool y
depends on CPU_SUBTYPE_SH7269
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH73A0
def_bool y
depends on ARCH_SH73A0
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select PINCTRL_SH_PFC_GPIO
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select REGULATOR
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config PINCTRL_PFC_SH7720
def_bool y
depends on CPU_SUBTYPE_SH7720
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7722
def_bool y
depends on CPU_SUBTYPE_SH7722
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7723
def_bool y
depends on CPU_SUBTYPE_SH7723
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7724
def_bool y
depends on CPU_SUBTYPE_SH7724
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7734
def_bool y
depends on CPU_SUBTYPE_SH7734
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7757
def_bool y
depends on CPU_SUBTYPE_SH7757
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7785
def_bool y
depends on CPU_SUBTYPE_SH7785
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SH7786
def_bool y
depends on CPU_SUBTYPE_SH7786
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select PINCTRL_SH_PFC_GPIO
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config PINCTRL_PFC_SHX3
def_bool y
depends on CPU_SUBTYPE_SHX3
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select PINCTRL_SH_PFC_GPIO
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endif